V2021 board is now working

lib/SCSI2SD/STM32CubeMX/2021/Src/fmc.c

@@ -54,8 +54,8 @@ void MX_FMC_Init(void)
   /* Timing */
 
   // 1 clock to read the address, + 1 for synchroniser skew
-  Timing.AddressSetupTime = 2;
-  Timing.AddressHoldTime = 1;
+  Timing.AddressSetupTime = 4;
+  Timing.AddressHoldTime = 2;
 
   // Writes to device:
   //   1 for synchroniser skew (dbx also delayed)
@@ -65,12 +65,12 @@ void MX_FMC_Init(void)
   // Reads from device:
   //   3 for syncroniser
   //   1 to write back to fsmc bus.
-  Timing.DataSetupTime = 4;
+  Timing.DataSetupTime = 8;
 
   // Allow a clock for us to release signals
   // Need to avoid both devices acting as outputs
   // on the multiplexed lines at the same time.
-  Timing.BusTurnAroundDuration = 1;
+  Timing.BusTurnAroundDuration = 2;
 
   Timing.CLKDivision = 16; // Ignored for async
   Timing.DataLatency = 17; // Ignored for async

lib/SCSI2SD/src/firmware/scsiPhy.c

@@ -155,8 +155,14 @@ scsiSetDataCount(uint32_t count)
 int scsiFifoReady(void)
 {
 	__NOP();
+#ifdef STM32F4xx
+	__NOP();
+#endif
 	HAL_GPIO_ReadPin(GPIOE, FPGA_GPIO3_Pin);
 	__NOP();
+#ifdef STM32F4xx
+	__NOP();
+#endif
 	return HAL_GPIO_ReadPin(GPIOE, FPGA_GPIO3_Pin) != 0;
 }
 
@@ -167,6 +173,7 @@ scsiReadByte(void)
 
 	// Ready immediately. setDataCount resets fifos
 
+	__disable_irq();
 	while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))
 	{
 		__WFI(); // Wait for interrupt