Fix USB bug with > 4gb drives

lib/SCSI2SD/CHANGELOG

@@ -1,3 +1,6 @@
+20181011		6.2.1
+	- Fix bug in USB disk interface with disks over 4GB
+
 20180926        6.2.0
 	- Fix bug with non-512 byte sectors.
 	- Fix bug when writing with multiple SCSI devices on the chain

lib/SCSI2SD/Makefile

@@ -147,7 +147,6 @@ SRC = \
 	src/firmware/spinlock.c \
 	src/firmware/tape.c \
 	src/firmware/time.c \
-	src/firmware/trace.c \
 	src/firmware/vendor.c \
 	${USBCOMPOSITE_SRC}
 

lib/SCSI2SD/src/firmware/config.c

@@ -22,7 +22,6 @@
 #include "scsiPhy.h"
 #include "sd.h"
 #include "disk.h"
-#include "trace.h"
 #include "bootloader.h"
 #include "bsp.h"
 #include "spinlock.h"
@@ -38,7 +37,7 @@
 
 #include <string.h>
 
-static const uint16_t FIRMWARE_VERSION = 0x0620;
+static const uint16_t FIRMWARE_VERSION = 0x0621;
 
 // 1 flash row
 static const uint8_t DEFAULT_CONFIG[128] =
@@ -86,10 +85,8 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
 
 void s2s_configInit(S2S_BoardCfg* config)
 {
-
 	usbInEpState = USB_IDLE;
 
-
 	if ((blockDev.state & DISK_PRESENT) && sdDev.capacity)
 	{
 		int cfgSectors = (S2S_CFG_SIZE + 511) / 512;
@@ -222,7 +219,7 @@ debugCommand()
 	response[27] = scsiDev.lastSenseASC >> 8;
 	response[28] = scsiDev.lastSenseASC;
 	response[29] = *SCSI_STS_DBX & 0xff; // What we've read
-	response[30] = LastTrace;
+	response[30] = 0; // obsolete
 	response[31] = *SCSI_STS_DBX >> 8; // What we're writing
 	hidPacket_send(response, sizeof(response));
 }

lib/SCSI2SD/src/firmware/main.c

@@ -26,7 +26,6 @@
 #include "scsi.h"
 #include "scsiPhy.h"
 #include "time.h"
-#include "trace.h"
 #include "sdio.h"
 #include "usb_device/usb_device.h"
 #include "usb_device/usbd_composite.h"
@@ -46,7 +45,6 @@ void mainEarlyInit()
 
 void mainInit()
 {
-	traceInit();
 	s2s_timeInit();
 	s2s_ledInit();
 	s2s_fpgaInit();

lib/SCSI2SD/src/firmware/mode.c

@@ -147,6 +147,21 @@ static const uint8_t CachingPage[] =
 0x00, 0x00, // Maximum pre-fetch ceiling
 };
 
+// Old CCS SCSI-1 cache page
+static const uint8_t CCSCachingPage[] =
+{
+0x38, // Page Code
+0x0E, // Page length
+0x00, // Read cache disable
+0x00, // Prefetch threshold
+0x00, 0x00, // Max threshold / multiplier
+0x00, 0x00, // Min threshold / multiplier
+0x00, 0x00, // Reserved
+0x00, 0x00,
+0x00, 0x00,
+0x00, 0x00,
+};
+
 static const uint8_t ControlModePage[] =
 {
 0x0A, // Page code
@@ -450,6 +465,13 @@ static void doModeSense(
 		idx += sizeof(AppleVendorPage);
 	}
 
+	if (pageCode == 0x38) // Don't send unless requested
+	{
+		pageFound = 1;
+		pageIn(pc, idx, CCSCachingPage, sizeof(CCSCachingPage));
+		idx += sizeof(CCSCachingPage);
+	}
+
 	if (!pageFound)
 	{
 		// Unknown Page Code

lib/SCSI2SD/src/firmware/scsiPhy.c

@@ -21,7 +21,6 @@
 
 #include "scsi.h"
 #include "scsiPhy.h"
-#include "trace.h"
 #include "time.h"
 #include "fpga.h"
 #include "led.h"
@@ -115,8 +114,6 @@ uint8_t scsiPhyFifoSel = 0; // global
 // vector table.
 void EXTI4_IRQHandler()
 {
-	traceIrq(trace_scsiResetISR);
-
 	// Make sure that interrupt flag is set
 	if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_4) != RESET) {
 
@@ -164,7 +161,6 @@ scsiReadByte(void)
 #endif
 	scsiSetDataCount(1);
 
-	trace(trace_spinPhyRxFifo);
 	while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))
 	{
 		__WFE(); // Wait for event
@@ -203,7 +199,6 @@ scsiReadDMA(uint8_t* data, uint32_t count)
 {
 	// Prepare DMA transfer
 	dmaInProgress = 1;
-	trace(trace_doRxSingleDMA);
 
 	scsiTxDMAComplete = 1; // TODO not used much
 	scsiRxDMAComplete = 0; // TODO not used much
@@ -289,8 +284,6 @@ scsiRead(uint8_t* data, uint32_t count, int* parityError)
 		{
 			scsiReadDMA(data + i, chunk);
 
-			trace(trace_spinReadDMAPoll);
-
 			while (!scsiReadDMAPoll() && likely(!scsiDev.resetFlag))
 			{
 			};
@@ -323,13 +316,11 @@ scsiWriteByte(uint8_t value)
 		assertFail();
 	}
 #endif
-	trace(trace_spinPhyTxFifo);
 	scsiPhyTx(value);
 	scsiPhyFifoFlip();
 
 	scsiSetDataCount(1);
 
-	trace(trace_spinTxComplete);
 	while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))
 	{
 		__WFE(); // Wait for event
@@ -358,7 +349,6 @@ scsiWriteDMA(const uint8_t* data, uint32_t count)
 {
 	// Prepare DMA transfer
 	dmaInProgress = 1;
-	trace(trace_doTxSingleDMA);
 
 	scsiTxDMAComplete = 0;
 	scsiRxDMAComplete = 1;
@@ -418,8 +408,6 @@ scsiWrite(const uint8_t* data, uint32_t count)
 			chunk = chunk & 0xFFFFFFF8;
 			scsiWriteDMA(data + i, chunk);
 
-			trace(trace_spinReadDMAPoll);
-
 			while (!scsiWriteDMAPoll() && likely(!scsiDev.resetFlag))
 			{
 			}
@@ -623,10 +611,8 @@ uint32_t s2s_getScsiRateMBs()
 
 void scsiPhyReset()
 {
-	trace(trace_scsiPhyReset);
 	if (dmaInProgress)
 	{
-		trace(trace_spinDMAReset);
 		HAL_DMA_Abort(&memToFSMC);
 		HAL_DMA_Abort(&fsmcToMem);
 

lib/SCSI2SD/src/firmware/sd.c

@@ -26,7 +26,6 @@
 #include "sd.h"
 #include "led.h"
 #include "time.h"
-#include "trace.h"
 
 #include "scsiPhy.h"
 

lib/SCSI2SD/src/firmware/trace.c

@@ -1,78 +0,0 @@
-//	Copyright (C) 2015 James Laird-Wah <james@laird-wah.net>
-//
-//	This file is part of SCSI2SD.
-//
-//	SCSI2SD is free software: you can redistribute it and/or modify
-//	it under the terms of the GNU General Public License as published by
-//	the Free Software Foundation, either version 3 of the License, or
-//	(at your option) any later version.
-//
-//	SCSI2SD is distributed in the hope that it will be useful,
-//	but WITHOUT ANY WARRANTY; without even the implied warranty of
-//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-//	GNU General Public License for more details.
-//
-//	You should have received a copy of the GNU General Public License
-//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
-
-#include <stm32f2xx.h>
-#include <stdint.h>
-#include "trace.h"
-
-// configure desired baud rate on the SWV pin.
-// up to the lower of CPU_clk/2 or 33MHz
-#define BAUD_RATE 921600
-
-// Cortex-M3 Trace Port Interface Unit (TPIU)
-#define TPIU_BASE	0xe0040000
-#define MMIO32(addr) *((volatile uint32_t*)(addr))
-#define TPIU_SSPSR	MMIO32(TPIU_BASE + 0x000)
-#define TPIU_CSPSR	MMIO32(TPIU_BASE + 0x004)
-#define TPIU_ACPR	MMIO32(TPIU_BASE + 0x010)
-#define TPIU_SPPR	MMIO32(TPIU_BASE + 0x0F0)
-#define TPIU_FFSR	MMIO32(TPIU_BASE + 0x300)
-#define TPIU_FFCR	MMIO32(TPIU_BASE + 0x304)
-
-#define TPIU_CSPSR_BYTE (1 << 0)
-#define TPIU_CSPSR_HALFWORD	(1 << 1)
-#define TPIU_CSPSR_WORD	(1 << 3)
-
-#define TPIU_SPPR_SYNC	(0x0)
-#define TPIU_SPPR_ASYNC_MANCHESTER	(0x1)
-#define TPIU_SPPR_ASYNC_NRZ	(0x2)
-
-#define TPIU_FFCR_ENFCONT	(1 << 1)
-
-uint8_t LastTrace;
-
-#ifndef TRACE
-
-void traceInit(void) { }
-#else
-
-void traceInit(void) {
-	// enable the trace module clocks
-	CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-	
-	// set SWV clock = CPU clock / 2, and enable
-	CY_SET_REG8(CYDEV_MFGCFG_MLOGIC_DEBUG, 0xc); // swv_clk_sel = CPU_clk / 2, swv_clk enable
-	
-	// unlock the ETM/TPIU registers
-	*((volatile uint32_t*)0xE0000FB0) = 0xC5ACCE55;
-	
-	// NRZ is "UART mode"
-	TPIU_SPPR = TPIU_SPPR_ASYNC_NRZ;
-	// prescaler, 0 = divide by 1
-	TPIU_ACPR = (BCLK__BUS_CLK__HZ/2/BAUD_RATE) - 1;
-	// can write 1, 2 or 4 byte ports
-	TPIU_CSPSR = TPIU_CSPSR_BYTE;
-
-	// bypass formatter (puts sync & stuff in otherwise)
-	TPIU_FFCR &= ~TPIU_FFCR_ENFCONT;
-	// enable ITM, enable the first 2 stimulus ports
-	ITM->TCR = ITM_TCR_ITMENA_Msk;
-	ITM->TER = 0x3;
-	
-	trace(trace_begin);
-}
-#endif

lib/SCSI2SD/src/firmware/trace.h

@@ -1,78 +0,0 @@
-//	Copyright (C) 2015 James Laird-Wah <james@laird-wah.net>
-//
-//	This file is part of SCSI2SD.
-//
-//	SCSI2SD is free software: you can redistribute it and/or modify
-//	it under the terms of the GNU General Public License as published by
-//	the Free Software Foundation, either version 3 of the License, or
-//	(at your option) any later version.
-//
-//	SCSI2SD is distributed in the hope that it will be useful,
-//	but WITHOUT ANY WARRANTY; without even the implied warranty of
-//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-//	GNU General Public License for more details.
-//
-//	You should have received a copy of the GNU General Public License
-//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
-
-extern uint8_t LastTrace;
-
-// Trace event IDs to be output. 1 and 9 are generated as headers on ports 0
-// and 1 respectively, and should not be used.
-enum trace_event {
-	trace_begin = 0,
-
-	// function entries - SCSI
-	trace_scsiRxCompleteISR = 0x50,
-	trace_scsiTxCompleteISR,
-	trace_scsiResetISR,
-	trace_doRxSingleDMA,
-	trace_doTxSingleDMA,
-	trace_scsiPhyReset,
-
-	// spin loops - SCSI
-	trace_spinTxComplete = 0x20,
-	trace_spinReadDMAPoll,
-	trace_spinWriteDMAPoll,
-	trace_spinPhyTxFifo,
-	trace_spinPhyRxFifo,
-	trace_spinDMAReset,
-
-	// SD
-	trace_spinSpiByte = 0x30,
-	trace_spinSDRxFIFO,
-	trace_spinSDBusy,
-	trace_spinSDDMA,
-	trace_spinSDCompleteWrite,
-	trace_spinSDCompleteRead,
-
-	// completion
-	trace_sdSpiByte = 0x40,
-};
-
-void traceInit(void);
-
-#ifdef TRACE
-// normally the code spins waiting for the trace FIFO to be ready for each event
-// if you are debugging a timing-sensitive problem, define TRACE_IMPATIENT and
-// expect some dropped packets
-#ifdef TRACE_IMPATIENT
-    #define wait_fifo(port)  ;
-#else
-    #define wait_fifo(port)  while (!(ITM->PORT[port].u32));
-#endif
-
-	#include <core_cm3_psoc5.h>
-	static inline void trace(enum trace_event ch) {
-		wait_fifo(0);
-		ITM->PORT[0].u8 = ch;
-	}
-	// use a different stimulus port for ISRs to avoid a race
-	static inline void traceIrq(enum trace_event ch) {
-		wait_fifo(1);
-		ITM->PORT[1].u8 = ch;
-	}
-#else
-	#define trace(ev) LastTrace = ev
-	#define traceIrq(ev) LastTrace = ev
-#endif

lib/SCSI2SD/src/firmware/usb_device/usbd_msc.h

@@ -102,8 +102,12 @@ typedef struct
   uint16_t                 scsi_blk_size;
   uint32_t                 scsi_blk_nbr;
   
-  uint32_t                 scsi_blk_addr;
-  uint32_t                 scsi_blk_len;
+//  uint32_t                 scsi_blk_addr;
+//  uint32_t                 scsi_blk_len;
+// michael@codesrc.com: Need to support > 4gb drives
+  uint64_t                 scsi_blk_addr;
+  uint64_t                 scsi_blk_len;
+
 }
 USBD_MSC_BOT_HandleTypeDef;