|  | @@ -1,19 +1,167 @@
 | 
	
		
			
				|  |  | +diff --git a/STM32CubeMX/revF/Src/sdio.c b/STM32CubeMX/revF/Src/sdio.c
 | 
	
		
			
				|  |  | +index f2a0b7c..a00c6a8 100644
 | 
	
		
			
				|  |  | +--- a/STM32CubeMX/revF/Src/sdio.c
 | 
	
		
			
				|  |  | ++++ b/STM32CubeMX/revF/Src/sdio.c
 | 
	
		
			
				|  |  | +@@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
 | 
	
		
			
				|  |  | +   hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
 | 
	
		
			
				|  |  | +   hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
 | 
	
		
			
				|  |  | +   hsd.Init.ClockDiv = 0;
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  /*
 | 
	
		
			
				|  |  | +   if (HAL_SD_Init(&hsd) != HAL_OK)
 | 
	
		
			
				|  |  | +   {
 | 
	
		
			
				|  |  | +     Error_Handler();
 | 
	
		
			
				|  |  | +@@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
 | 
	
		
			
				|  |  | +   if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
 | 
	
		
			
				|  |  | +   {
 | 
	
		
			
				|  |  | +     Error_Handler();
 | 
	
		
			
				|  |  | +-  }
 | 
	
		
			
				|  |  | +-
 | 
	
		
			
				|  |  | ++  }*/
 | 
	
		
			
				|  |  | + }
 | 
	
		
			
				|  |  | + 
 | 
	
		
			
				|  |  | + void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
 | 
	
		
			
				|  |  | +diff --git a/STM32CubeMX/revF/Src/spi.c b/STM32CubeMX/revF/Src/spi.c
 | 
	
		
			
				|  |  | +index 8a452c4..8e4082b 100644
 | 
	
		
			
				|  |  | +--- a/STM32CubeMX/revF/Src/spi.c
 | 
	
		
			
				|  |  | ++++ b/STM32CubeMX/revF/Src/spi.c
 | 
	
		
			
				|  |  | +@@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
 | 
	
		
			
				|  |  | +   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
 | 
	
		
			
				|  |  | +   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
 | 
	
		
			
				|  |  | +   hspi1.Init.NSS = SPI_NSS_SOFT;
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  // 13.5Mbaud FPGA device allows up to 25MHz write
 | 
	
		
			
				|  |  | +   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
 | 
	
		
			
				|  |  | +   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 | 
	
		
			
				|  |  | +   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 | 
	
		
			
				|  |  | +diff --git a/STM32CubeMX/revF/Src/usbd_conf.c b/STM32CubeMX/revF/Src/usbd_conf.c
 | 
	
		
			
				|  |  | +index 65f6102..8e03767 100644
 | 
	
		
			
				|  |  | +--- a/STM32CubeMX/revF/Src/usbd_conf.c
 | 
	
		
			
				|  |  | ++++ b/STM32CubeMX/revF/Src/usbd_conf.c
 | 
	
		
			
				|  |  | +@@ -357,9 +357,11 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
 | 
	
		
			
				|  |  | +   HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
 | 
	
		
			
				|  |  | +   HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
 | 
	
		
			
				|  |  | + #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
 | 
	
		
			
				|  |  | ++  // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
 | 
	
		
			
				|  |  | +   HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
 | 
	
		
			
				|  |  | +   HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
 | 
	
		
			
				|  |  | +-  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
 | 
	
		
			
				|  |  | ++  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
 | 
	
		
			
				|  |  | ++  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
 | 
	
		
			
				|  |  | +   }
 | 
	
		
			
				|  |  | +   return USBD_OK;
 | 
	
		
			
				|  |  | + }
 | 
	
		
			
				|  |  | +diff --git a/STM32CubeMX/revF/Src/fsmc.c b/STM32CubeMX/revF/Src/fsmc.c
 | 
	
		
			
				|  |  | +index 03a1b12..1b01446 100644
 | 
	
		
			
				|  |  | +--- a/STM32CubeMX/revF/Src/fsmc.c
 | 
	
		
			
				|  |  | ++++ b/STM32CubeMX/revF/Src/fsmc.c
 | 
	
		
			
				|  |  | +@@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
 | 
	
		
			
				|  |  | +   hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
 | 
	
		
			
				|  |  | +   hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
 | 
	
		
			
				|  |  | +   /* Timing */
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  // 1 clock to read the address, + 1 for synchroniser skew
 | 
	
		
			
				|  |  | +   Timing.AddressSetupTime = 2;
 | 
	
		
			
				|  |  | +   Timing.AddressHoldTime = 1;
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  // Writes to device:
 | 
	
		
			
				|  |  | ++  //   1 for synchroniser skew (dbx also delayed)
 | 
	
		
			
				|  |  | ++  //   1 to skip hold time
 | 
	
		
			
				|  |  | ++  //   1 to write data.
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  // Reads from device:
 | 
	
		
			
				|  |  | ++  //   3 for syncroniser
 | 
	
		
			
				|  |  | ++  //   1 to write back to fsmc bus.
 | 
	
		
			
				|  |  | +   Timing.DataSetupTime = 4;
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  // Allow a clock for us to release signals
 | 
	
		
			
				|  |  | ++  // Need to avoid both devices acting as outputs
 | 
	
		
			
				|  |  | ++  // on the multiplexed lines at the same time.
 | 
	
		
			
				|  |  | +   Timing.BusTurnAroundDuration = 1;
 | 
	
		
			
				|  |  | +-  Timing.CLKDivision = 16;
 | 
	
		
			
				|  |  | +-  Timing.DataLatency = 17;
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  Timing.CLKDivision = 16; // Ignored for async
 | 
	
		
			
				|  |  | ++  Timing.DataLatency = 17; // Ignored for async
 | 
	
		
			
				|  |  | +   Timing.AccessMode = FSMC_ACCESS_MODE_A;
 | 
	
		
			
				|  |  | +   /* ExtTiming */
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +@@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
 | 
	
		
			
				|  |  | +   PE0   ------> FSMC_NBL0
 | 
	
		
			
				|  |  | +   PE1   ------> FSMC_NBL1
 | 
	
		
			
				|  |  | +   */
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
 | 
	
		
			
				|  |  | ++  // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | +   /* GPIO_InitStruct */
 | 
	
		
			
				|  |  | +   GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
 | 
	
		
			
				|  |  | +                           |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
 | 
	
		
			
				|  |  | +
 | 
	
		
			
				|  |  | +diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
 | 
	
		
			
				|  |  | +index c966c906..9d709100 100644
 | 
	
		
			
				|  |  | +--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
 | 
	
		
			
				|  |  | ++++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
 | 
	
		
			
				|  |  | +@@ -1074,6 +1074,7 @@ uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
 | 
	
		
			
				|  |  | + uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
 | 
	
		
			
				|  |  | + uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
 | 
	
		
			
				|  |  | + uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
 | 
	
		
			
				|  |  | ++uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount);
 | 
	
		
			
				|  |  | + uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
 | 
	
		
			
				|  |  | + uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
 | 
	
		
			
				|  |  | + uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
 | 
	
		
			
				|  |  | +diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
 | 
	
		
			
				|  |  | +index 4f23a455..614b6dce 100644
 | 
	
		
			
				|  |  | +--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
 | 
	
		
			
				|  |  | ++++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
 | 
	
		
			
				|  |  | +@@ -606,6 +606,31 @@ uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
 | 
	
		
			
				|  |  | +   return errorstate;
 | 
	
		
			
				|  |  | + }
 | 
	
		
			
				|  |  | + 
 | 
	
		
			
				|  |  | ++/**
 | 
	
		
			
				|  |  | ++  * @brief  Set the count of a multi-block write command
 | 
	
		
			
				|  |  | ++  * @param  SDIOx: Pointer to SDIO register base 
 | 
	
		
			
				|  |  | ++  * @retval HAL status
 | 
	
		
			
				|  |  | ++  */
 | 
	
		
			
				|  |  | ++uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount)
 | 
	
		
			
				|  |  | ++{
 | 
	
		
			
				|  |  | ++  SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 | 
	
		
			
				|  |  | ++  uint32_t errorstate;
 | 
	
		
			
				|  |  | ++  
 | 
	
		
			
				|  |  | ++  errorstate = SDMMC_CmdAppCommand(SDIOx, appCmdArg);
 | 
	
		
			
				|  |  | ++  if(errorstate == HAL_SD_ERROR_NONE)
 | 
	
		
			
				|  |  | ++  {
 | 
	
		
			
				|  |  | ++    sdmmc_cmdinit.Argument         = blockCount;
 | 
	
		
			
				|  |  | ++    sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCK_COUNT;
 | 
	
		
			
				|  |  | ++    sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 | 
	
		
			
				|  |  | ++    sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 | 
	
		
			
				|  |  | ++    sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 | 
	
		
			
				|  |  | ++    (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 | 
	
		
			
				|  |  | ++    errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);
 | 
	
		
			
				|  |  | ++  }
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | ++  return errorstate;
 | 
	
		
			
				|  |  | ++}
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | + /**
 | 
	
		
			
				|  |  | +   * @brief  Send the Write Multi Block command and check the response
 | 
	
		
			
				|  |  | +   * @param  SDIOx: Pointer to SDIO register base 
 | 
	
		
			
				|  |  |  diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
 | 
	
		
			
				|  |  | -index 569c8b1..1b8c51b 100644
 | 
	
		
			
				|  |  | +index d2a88d75..1a09028f 100644
 | 
	
		
			
				|  |  |  --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
 | 
	
		
			
				|  |  |  +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
 | 
	
		
			
				|  |  |  @@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
 | 
	
		
			
				|  |  |     /* Enable SDIO Clock */
 | 
	
		
			
				|  |  |     __HAL_SD_ENABLE(hsd);
 | 
	
		
			
				|  |  |   
 | 
	
		
			
				|  |  | -+  /* 1ms: required power up waiting time before starting the SD initialization
 | 
	
		
			
				|  |  | -+    sequence */
 | 
	
		
			
				|  |  | ++  /* 1ms: required power up waiting time before starting the SD initialization 
 | 
	
		
			
				|  |  | ++     sequence */
 | 
	
		
			
				|  |  |  +  HAL_Delay(1);
 | 
	
		
			
				|  |  |  +
 | 
	
		
			
				|  |  |     /* Identify card operating voltage */
 | 
	
		
			
				|  |  |     errorstate = SD_PowerON(hsd);
 | 
	
		
			
				|  |  |     if(errorstate != HAL_SD_ERROR_NONE)
 | 
	
		
			
				|  |  | -@@ -1227,22 +1231,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
 | 
	
		
			
				|  |  | +@@ -1247,22 +1251,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
 | 
	
		
			
				|  |  |       else
 | 
	
		
			
				|  |  |       {
 | 
	
		
			
				|  |  |         /* Enable SD DMA transfer */
 | 
	
	
		
			
				|  | @@ -47,19 +195,39 @@ index 569c8b1..1b8c51b 100644
 | 
	
		
			
				|  |  |         }
 | 
	
		
			
				|  |  |   
 | 
	
		
			
				|  |  |         /* Configure the SD DPSM (Data Path State Machine) */
 | 
	
		
			
				|  |  | -@@ -1252,6 +1256,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
 | 
	
		
			
				|  |  | +@@ -1272,6 +1276,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
 | 
	
		
			
				|  |  |         config.TransferDir   = SDIO_TRANSFER_DIR_TO_SDIO;
 | 
	
		
			
				|  |  |         config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
 | 
	
		
			
				|  |  |         config.DPSM          = SDIO_DPSM_ENABLE;
 | 
	
		
			
				|  |  |  +
 | 
	
		
			
				|  |  |  +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
 | 
	
		
			
				|  |  |  +      // data is just discarded before the dpsm is started.
 | 
	
		
			
				|  |  | -+      __HAL_SD_DMA_ENABLE(hsd);
 | 
	
		
			
				|  |  | ++      __HAL_SD_DMA_ENABLE();
 | 
	
		
			
				|  |  |  +
 | 
	
		
			
				|  |  |         (void)SDIO_ConfigData(hsd->Instance, &config);
 | 
	
		
			
				|  |  |   
 | 
	
		
			
				|  |  |         /* Read Blocks in DMA mode */
 | 
	
		
			
				|  |  | -@@ -1343,17 +1352,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  | +@@ -1343,6 +1352,19 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  | +       return HAL_ERROR;
 | 
	
		
			
				|  |  | +     }
 | 
	
		
			
				|  |  | + 
 | 
	
		
			
				|  |  | ++    if(NumberOfBlocks > 1U && hsd->SdCard.CardType == CARD_SDHC_SDXC)
 | 
	
		
			
				|  |  | ++    {
 | 
	
		
			
				|  |  | ++      /* MM: Prepare for write */
 | 
	
		
			
				|  |  | ++      errorstate = SDMMC_CmdSetBlockCount(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd) << 16, NumberOfBlocks);
 | 
	
		
			
				|  |  | ++      if(errorstate != HAL_SD_ERROR_NONE)
 | 
	
		
			
				|  |  | ++      {
 | 
	
		
			
				|  |  | ++        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
 | 
	
		
			
				|  |  | ++        hsd->ErrorCode |= errorstate;
 | 
	
		
			
				|  |  | ++        hsd->State = HAL_SD_STATE_READY;
 | 
	
		
			
				|  |  | ++        return HAL_ERROR;
 | 
	
		
			
				|  |  | ++      }
 | 
	
		
			
				|  |  | ++    }
 | 
	
		
			
				|  |  | ++
 | 
	
		
			
				|  |  | +     hsd->State = HAL_SD_STATE_BUSY;
 | 
	
		
			
				|  |  | + 
 | 
	
		
			
				|  |  | +     /* Initialize data control register */
 | 
	
		
			
				|  |  | +@@ -1367,17 +1389,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  |       if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
 | 
	
		
			
				|  |  |       {
 | 
	
		
			
				|  |  |         add *= 512U;
 | 
	
	
		
			
				|  | @@ -87,26 +255,7 @@ index 569c8b1..1b8c51b 100644
 | 
	
		
			
				|  |  |       }
 | 
	
		
			
				|  |  |   
 | 
	
		
			
				|  |  |       /* Write Blocks in Polling mode */
 | 
	
		
			
				|  |  | -@@ -1361,6 +1370,18 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  | -     {
 | 
	
		
			
				|  |  | -       hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
 | 
	
		
			
				|  |  | - 
 | 
	
		
			
				|  |  | -+      /* MM: Prepare for write */
 | 
	
		
			
				|  |  | -+/* TODO
 | 
	
		
			
				|  |  | -+      SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->RCA << 16));
 | 
	
		
			
				|  |  | -+      SDIO_CmdInitTypeDef  mm_cmdinit;
 | 
	
		
			
				|  |  | -+      mm_cmdinit.Argument         = (uint32_t)NumberOfBlocks;
 | 
	
		
			
				|  |  | -+      mm_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCK_COUNT;
 | 
	
		
			
				|  |  | -+      mm_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 | 
	
		
			
				|  |  | -+      mm_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 | 
	
		
			
				|  |  | -+      mm_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 | 
	
		
			
				|  |  | -+      (void)SDIO_SendCommand(hsd->Instance, &mm_cmdinit);
 | 
	
		
			
				|  |  | -+      SDMMC_GetCmdResp1(hsd->Instance, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);*/
 | 
	
		
			
				|  |  | -+
 | 
	
		
			
				|  |  | -       /* Write Multi Block command */
 | 
	
		
			
				|  |  | -       errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
 | 
	
		
			
				|  |  | -     }
 | 
	
		
			
				|  |  | -@@ -1382,7 +1403,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  | +@@ -1406,7 +1428,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  |       }
 | 
	
		
			
				|  |  |   
 | 
	
		
			
				|  |  |       /* Enable SDIO DMA transfer */
 | 
	
	
		
			
				|  | @@ -115,7 +264,7 @@ index 569c8b1..1b8c51b 100644
 | 
	
		
			
				|  |  |   
 | 
	
		
			
				|  |  |       /* Enable the DMA Channel */
 | 
	
		
			
				|  |  |       if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
 | 
	
		
			
				|  |  | -@@ -1403,6 +1424,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  | +@@ -1431,6 +1453,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 | 
	
		
			
				|  |  |         config.TransferDir   = SDIO_TRANSFER_DIR_TO_CARD;
 | 
	
		
			
				|  |  |         config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
 | 
	
		
			
				|  |  |         config.DPSM          = SDIO_DPSM_ENABLE;
 | 
	
	
		
			
				|  | @@ -127,103 +276,14 @@ index 569c8b1..1b8c51b 100644
 | 
	
		
			
				|  |  |         (void)SDIO_ConfigData(hsd->Instance, &config);
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				|  |  |   
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				|  |  |         return HAL_OK;
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				|  |  | -diff --git a/STM32CubeMX/revF/Src/sdio.c b/STM32CubeMX/revF/Src/sdio.c
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				|  |  | -index f2a0b7c..a00c6a8 100644
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				|  |  | ---- a/STM32CubeMX/revF/Src/sdio.c
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				|  |  | -+++ b/STM32CubeMX/revF/Src/sdio.c
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				|  |  | -@@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
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				|  |  | -   hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
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				|  |  | -   hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
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				|  |  | -   hsd.Init.ClockDiv = 0;
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				|  |  | -+
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				|  |  | -+  /*
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				|  |  | -   if (HAL_SD_Init(&hsd) != HAL_OK)
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				|  |  | -   {
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				|  |  | -     Error_Handler();
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				|  |  | -@@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
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				|  |  | -   if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
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				|  |  | -   {
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				|  |  | -     Error_Handler();
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				|  |  | --  }
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				|  |  | --
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				|  |  | -+  }*/
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				|  |  | - }
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				|  |  | - 
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				|  |  | - void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
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				|  |  | -diff --git a/STM32CubeMX/revF/Src/spi.c b/STM32CubeMX/revF/Src/spi.c
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				|  |  | -index 8a452c4..8e4082b 100644
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				|  |  | ---- a/STM32CubeMX/revF/Src/spi.c
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				|  |  | -+++ b/STM32CubeMX/revF/Src/spi.c
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				|  |  | -@@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
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				|  |  | -   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
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				|  |  | -   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
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				|  |  | -   hspi1.Init.NSS = SPI_NSS_SOFT;
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				|  |  | +@@ -1632,6 +1659,10 @@ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd)
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				|  |  | +           HAL_SD_ErrorCallback(hsd);
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				|  |  | + #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
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				|  |  | +         }
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				|  |  | ++        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
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				|  |  |  +
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				|  |  | -+  // 13.5Mbaud FPGA device allows up to 25MHz write
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				|  |  | -   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
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				|  |  | -   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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				|  |  | -   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
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				|  |  | -diff --git a/STM32CubeMX/revF/Src/usbd_conf.c b/STM32CubeMX/revF/Src/usbd_conf.c
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				|  |  | -index 65f6102..8e03767 100644
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				|  |  | ---- a/STM32CubeMX/revF/Src/usbd_conf.c
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				|  |  | -+++ b/STM32CubeMX/revF/Src/usbd_conf.c
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				|  |  | -@@ -357,9 +357,11 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
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				|  |  | -   HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
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				|  |  | -   HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
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				|  |  | - #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
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				|  |  | -+  // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
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				|  |  | -   HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
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				|  |  | -   HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
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				|  |  | --  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
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				|  |  | -+  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
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				|  |  | -+  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
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				|  |  | -   }
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				|  |  | -   return USBD_OK;
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				|  |  | - }
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				|  |  | -diff --git a/STM32CubeMX/revF/Src/fsmc.c b/STM32CubeMX/revF/Src/fsmc.c
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				|  |  | -index 03a1b12..1b01446 100644
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				|  |  | ---- a/STM32CubeMX/revF/Src/fsmc.c
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				|  |  | -+++ b/STM32CubeMX/revF/Src/fsmc.c
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				|  |  | -@@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
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				|  |  | -   hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
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				|  |  | -   hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
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				|  |  | -   /* Timing */
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				|  |  | -+
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				|  |  | -+  // 1 clock to read the address, + 1 for synchroniser skew
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				|  |  | -   Timing.AddressSetupTime = 2;
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				|  |  | -   Timing.AddressHoldTime = 1;
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				|  |  | -+
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				|  |  | -+  // Writes to device:
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				|  |  | -+  //   1 for synchroniser skew (dbx also delayed)
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				|  |  | -+  //   1 to skip hold time
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				|  |  | -+  //   1 to write data.
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				|  |  | -+
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				|  |  | -+  // Reads from device:
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				|  |  | -+  //   3 for syncroniser
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				|  |  | -+  //   1 to write back to fsmc bus.
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				|  |  | -   Timing.DataSetupTime = 4;
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				|  |  | -+
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				|  |  | -+  // Allow a clock for us to release signals
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				|  |  | -+  // Need to avoid both devices acting as outputs
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				|  |  | -+  // on the multiplexed lines at the same time.
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				|  |  | -   Timing.BusTurnAroundDuration = 1;
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				|  |  | --  Timing.CLKDivision = 16;
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				|  |  | --  Timing.DataLatency = 17;
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				|  |  | -+
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				|  |  | -+  Timing.CLKDivision = 16; // Ignored for async
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				|  |  | -+  Timing.DataLatency = 17; // Ignored for async
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				|  |  | -   Timing.AccessMode = FSMC_ACCESS_MODE_A;
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				|  |  | -   /* ExtTiming */
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				|  |  | -
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				|  |  | -@@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
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				|  |  | -   PE0   ------> FSMC_NBL0
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				|  |  | -   PE1   ------> FSMC_NBL1
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				|  |  | -   */
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				|  |  | -+
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				|  |  | -+  // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
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				|  |  | -+  // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
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				|  |  | -+
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				|  |  | -   /* GPIO_InitStruct */
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				|  |  | -   GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
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				|  |  | -                           |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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				|  |  | -
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				|  |  | ++        hsd->State = HAL_SD_STATE_READY;
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				|  |  | ++        hsd->Context = SD_CONTEXT_NONE;
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				|  |  | +       }
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				|  |  | +       if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) == 0U) && ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) == 0U))
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				|  |  | +       {
 |