|  | @@ -920,9 +920,6 @@ void writeDataLoop(uint32_t blocksize, const byte* srcptr)
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				|  |  |    // Start the first bus cycle.
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				|  |  |    FETCH_BSRR_DB();
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				|  |  |    REQ_OFF_DB_SET(bsrr_val);
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				|  |  | -#ifdef XCVR
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				|  |  | -  TRANSCEIVER_IO_SET(vTR_DBP,TR_OUTPUT)
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				|  |  | -#endif
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				|  |  |    REQ_ON();
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				|  |  |    FETCH_BSRR_DB();
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				|  |  |    WAIT_ACK_ACTIVE();
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				|  | @@ -959,9 +956,15 @@ void writeDataPhase(int len, const byte* p)
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				|  |  |    LOGN("DATAIN PHASE");
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				|  |  |    SCSI_PHASE_CHANGE(SCSI_PHASE_DATAIN);
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				|  |  |    // Bus settle delay 400ns. Following code was measured at 800ns before REQ asserted. STM32F103.
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				|  |  | +#ifdef XCVR
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				|  |  | +  TRANSCEIVER_IO_SET(vTR_DBP,TR_OUTPUT)
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				|  |  | +#endif
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				|  |  |    SCSI_DB_OUTPUT()
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				|  |  |    writeDataLoop(len, p);
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				|  |  |    SCSI_DB_INPUT()
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				|  |  | +#ifdef XCVR
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				|  |  | +  TRANSCEIVER_IO_SET(vTR_DBP,TR_INPUT)
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				|  |  | +#endif
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				|  |  |  }
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				|  |  |  
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				|  |  |  /*
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				|  | @@ -977,6 +980,9 @@ void writeDataPhaseSD(uint32_t adds, uint32_t len)
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				|  |  |    uint64_t pos = (uint64_t)adds * m_img->m_blocksize;
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				|  |  |    m_img->m_file.seekSet(pos);
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				|  |  |  
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				|  |  | +#ifdef XCVR
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				|  |  | +  TRANSCEIVER_IO_SET(vTR_DBP,TR_OUTPUT)
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				|  |  | +#endif
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				|  |  |    SCSI_DB_OUTPUT()
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				|  |  |    for(uint32_t i = 0; i < len; i++) {
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				|  |  |        // Asynchronous reads will make it faster ...
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