GD32F4: Fix wrong assignment of DMA channels (#1)

DMA Channel A and B mappings were wrong way around with
respect to the timer channels. This caused the timer update/reset
DMA request to occur before the data write request occurred.

Added comments to clarify the mapping.

lib/ZuluSCSI_platform_GD32F205/ZuluSCSI_v1_1_gpio.h

@@ -26,6 +26,8 @@
 #define SCSI_OUT_PLD4 GPIO_PIN_7
 
 // Control signals for timer based DMA acceleration
+// TIMER7_CH1 triggers DMACHA
+// TIMER7_CH3 triggers DMACHB
 #define SCSI_TIMER TIMER7
 #define SCSI_TIMER_RCU RCU_TIMER7
 #define SCSI_TIMER_OUT_PORT GPIOB

lib/ZuluSCSI_platform_GD32F450/ZuluSCSI_v1_4_gpio.h

@@ -26,6 +26,8 @@
 #define SCSI_OUT_PLD4 GPIO_PIN_7
 
 // Control signals for timer based DMA acceleration
+// TIMER0_CH1 triggers DMACHA
+// TIMER0_CH3 triggers DMACHB
 #define SCSI_TIMER TIMER0
 #define SCSI_TIMER_RCU RCU_TIMER0
 #define SCSI_TIMER_OUT_PORT GPIOB
@@ -36,14 +38,14 @@
 #define SCSI_TIMER_IN_AF GPIO_AF_1
 #define SCSI_TIMER_DMA DMA1
 #define SCSI_TIMER_DMA_RCU RCU_DMA1
-#define SCSI_TIMER_DMACHA DMA_CH4
+#define SCSI_TIMER_DMACHA DMA_CH2
 #define SCSI_TIMER_DMACHA_SUB_PERIPH DMA_SUBPERI6
-#define SCSI_TIMER_DMACHB DMA_CH2
+#define SCSI_TIMER_DMACHB DMA_CH4
 #define SCSI_TIMER_DMACHB_SUB_PERIPH DMA_SUBPERI6
-#define SCSI_TIMER_DMACHA_IRQ DMA1_Channel4_IRQHandler
-#define SCSI_TIMER_DMACHA_IRQn DMA1_Channel4_IRQn
-#define SCSI_TIMER_DMACHB_IRQ DMA1_Channel2_IRQHandler
-#define SCSI_TIMER_DMACHB_IRQn DMA1_Channel2_IRQn
+#define SCSI_TIMER_DMACHA_IRQ DMA1_Channel2_IRQHandler
+#define SCSI_TIMER_DMACHA_IRQn DMA1_Channel2_IRQn
+#define SCSI_TIMER_DMACHB_IRQ DMA1_Channel4_IRQHandler
+#define SCSI_TIMER_DMACHB_IRQn DMA1_Channel4_IRQn
 
 // SCSI input data port
 #define SCSI_IN_PORT  GPIOE

lib/ZuluSCSI_platform_GD32F450/zuluscsi_gd32f450_btldr.ld

@@ -30,12 +30,12 @@ SECTIONS
   /DISCARD/ :
   {
     *(*DMA1_Channel4_IRQHandler*)
-    *(*DMA1_Channel1_IRQHandler*)
+    *(*DMA1_Channel2_IRQHandler*)
     *(*EXTI3_IRQHandler*)
     *(*EXTI10_15_IRQHandler*)
   }
 
-  DMA1_Channel1_IRQHandler = 0;
+  DMA1_Channel2_IRQHandler = 0;
   DMA1_Channel4_IRQHandler = 0;
   EXTI10_15_IRQHandler = 0;
   EXTI3_IRQHandler = 0;