Remove shared BS2 specific code

The Pico target contains some of the same code that was part of
the BS2 target. This removes the BS2 specific files and the BS2
target now shares the Pico target's sdio_Pico.* and the
scsi_accel_target_Pico.* files.

lib/ZuluSCSI_platform_RP2040/scsi_accel_target.cpp

@@ -38,10 +38,8 @@
 #include <audio.h>
 #include <multicore.h>
 
-#ifdef ZULUSCSI_PICO
+#if defined(ZULUSCSI_PICO) || defined(ZULUSCSI_BS2)
 #include "scsi_accel_target_Pico.pio.h"
-#elif defined(ZULUSCSI_BS2)
-#include "scsi_accel_target_BS2.pio.h"
 #else
 #include "scsi_accel_target_RP2040.pio.h"
 #endif

lib/ZuluSCSI_platform_RP2040/scsi_accel_target_BS2.pio

@@ -1,124 +0,0 @@
-; ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
-;
-; ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
-;
-; https://www.gnu.org/licenses/gpl-3.0.html
-; ----
-; This program is free software: you can redistribute it and/or modify
-; it under the terms of the GNU General Public License as published by
-; the Free Software Foundation, either version 3 of the License, or
-; (at your option) any later version. 
-;
-; This program is distributed in the hope that it will be useful,
-; but WITHOUT ANY WARRANTY; without even the implied warranty of
-; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; GNU General Public License for more details. 
-;
-; You should have received a copy of the GNU General Public License
-; along with this program.  If not, see <https://www.gnu.org/licenses/>.
-
-
-; RP2040 PIO program for accelerating SCSI communication
-; Run "pioasm scsi_accel.pio scsi_accel.pio.h" to regenerate the C header from this.
-; GPIO mapping:
-; - 0-7: DB0-DB7
-; -   8: DBP
-; Side set is REQ pin
-
-.define REQ 17
-.define ACK 26
-
-; Delay from data setup to REQ assertion.
-; deskew delay + cable skew delay = 55 ns minimum
-; One clock cycle is 8 ns => delay 7 clocks
-.define REQ_DLY 7
-
-; Adds parity to data that is to be written to SCSI
-; This works by generating addresses for DMA to fetch data from.
-; Register X should be initialized to the base address of the lookup table.
-.program scsi_parity
-    pull block
-    in NULL, 1
-    in OSR, 8
-    in X, 23
-
-; Write to SCSI bus using asynchronous handshake.
-; Data is written as 32-bit words that contain the 8 data bits + 1 parity bit.
-; 23 bits in each word are discarded.
-; Number of bytes to send must be multiple of 2.
-.program scsi_accel_async_write
-    .side_set 1
-
-    pull ifempty block          side 1  ; Get data from TX FIFO
-    out pins, 9                 side 1  ; Write data and parity bit
-    out null, 23 [REQ_DLY-2]    side 1  ; Discard unused bits, wait for data preset time
-    wait 1 gpio ACK             side 1  ; Wait for ACK to be inactive
-    wait 0 gpio ACK             side 0  ; Assert REQ, wait for ACK low
-
-; Read from SCSI bus using sync or async handshake.
-; Data is returned as 32-bit words:
-; - bit  0: always zero
-; - bits 1-8: data byte
-; - bit  9: parity bit
-; - bits 10-31: lookup table address
-; Lookup table address should be loaded into register Y.
-; One dummy word should be written to TX fifo for every byte to receive.
-.program scsi_accel_read
-    .side_set 1
-
-    pull block                  side 1  ; Pull from TX fifo for counting bytes and pacing sync mode
-    wait 1 gpio ACK             side 1  ; Wait for ACK high
-    in null, 1                  side 0  ; Zero bit because lookup table entries are 16-bit
-    wait 0 gpio ACK             side 0  ; Assert REQ, wait for ACK low
-    in pins, 9                  side 1  ; Deassert REQ, read GPIO
-    in y, 22                    side 1  ; Copy parity lookup table address
-
-; Data state machine for synchronous writes.
-; Takes the lowest 9 bits of each 32 bit word and writes them to bus with REQ pulse.
-; The delay times will be rewritten by C code to match the negotiated SCSI sync speed.
-;
-; Shifts one bit to ISR per every byte transmitted. This is used to control the transfer
-; pace, the RX fifo acts as a counter to keep track of unacknowledged bytes. The C code
-; can set the syncOffset by changing autopush threshold, e.g. threshold 3 = 12 bytes offset.
-.program scsi_sync_write
-    .side_set 1
-
-    out pins, 9      [0]        side 1  ; Write data and parity bit, wait for deskew delay
-    out null, 23     [0]        side 0  ; Assert REQ, wait for assert time
-    in null, 1       [0]        side 1  ; Deassert REQ, wait for transfer period, wait for space in ACK buffer
-
-; Data pacing state machine for synchronous writes.
-; Takes one bit from ISR on every falling edge of ACK.
-; The C code should set autopull threshold to match scsi_sync_write autopush threshold.
-; System DMA will then move words from scsi_sync_write RX fifo to scsi_sync_write_pacer TX fifo.
-.program scsi_sync_write_pacer
-    wait 1 gpio ACK
-    wait 0 gpio ACK   ; Wait for falling edge on ACK
-    out null, 1       ; Let scsi_sync_write send one more byte
-
-; Data pacing state machine for synchronous reads.
-; The delay times will be rewritten by C code to match the negotiated SCSI sync speed.
-; Number of bytes to receive minus one should be loaded into register X.
-; In synchronous mode this generates the REQ pulses and dummy words.
-; In asynchronous mode it just generates dummy words to feed to scsi_accel_read.
-.program scsi_sync_read_pacer
-    .side_set 1
-
-start:
-    push block      [0]      side 1  ; Send dummy word to scsi_accel_read, wait for transfer period
-    jmp x-- start   [0]      side 0  ; Assert REQ, wait for assert time
-
-finish:
-    jmp finish      [0]      side 1
-
-; Parity checker for reads from SCSI bus.
-; Receives 16-bit words from g_scsi_parity_check_lookup
-; Bottom 8 bits are the data byte, which is passed to output FIFO
-; The 9th bit is parity valid bit, which is 1 for valid and 0 for parity error.
-.program scsi_read_parity
-parity_valid:
-    out isr, 8                ; Take the 8 data bits for passing to RX fifo
-    push block                ; Push the data to RX fifo
-    out x, 24                 ; Take the parity valid bit, and the rest of 32-bit word
-    jmp x-- parity_valid      ; If parity valid bit is 1, repeat from start
-    irq set 0                 ; Parity error, set interrupt flag

lib/ZuluSCSI_platform_RP2040/scsi_accel_target_BS2.pio.h

@@ -1,225 +0,0 @@
-// -------------------------------------------------- //
-// This file is autogenerated by pioasm; do not edit! //
-// -------------------------------------------------- //
-
-#pragma once
-
-#if !PICO_NO_HARDWARE
-#include "hardware/pio.h"
-#endif
-
-// ----------- //
-// scsi_parity //
-// ----------- //
-
-#define scsi_parity_wrap_target 0
-#define scsi_parity_wrap 3
-
-static const uint16_t scsi_parity_program_instructions[] = {
-            //     .wrap_target
-    0x80a0, //  0: pull   block                      
-    0x4061, //  1: in     null, 1                    
-    0x40e8, //  2: in     osr, 8                     
-    0x4037, //  3: in     x, 23                      
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_parity_program = {
-    .instructions = scsi_parity_program_instructions,
-    .length = 4,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_parity_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_parity_wrap_target, offset + scsi_parity_wrap);
-    return c;
-}
-#endif
-
-// ---------------------- //
-// scsi_accel_async_write //
-// ---------------------- //
-
-#define scsi_accel_async_write_wrap_target 0
-#define scsi_accel_async_write_wrap 4
-
-static const uint16_t scsi_accel_async_write_program_instructions[] = {
-            //     .wrap_target
-    0x90e0, //  0: pull   ifempty block   side 1     
-    0x7009, //  1: out    pins, 9         side 1     
-    0x7577, //  2: out    null, 23        side 1 [5] 
-    0x309a, //  3: wait   1 gpio, 26      side 1     
-    0x201a, //  4: wait   0 gpio, 26      side 0     
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_accel_async_write_program = {
-    .instructions = scsi_accel_async_write_program_instructions,
-    .length = 5,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_accel_async_write_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_accel_async_write_wrap_target, offset + scsi_accel_async_write_wrap);
-    sm_config_set_sideset(&c, 1, false, false);
-    return c;
-}
-#endif
-
-// --------------- //
-// scsi_accel_read //
-// --------------- //
-
-#define scsi_accel_read_wrap_target 0
-#define scsi_accel_read_wrap 5
-
-static const uint16_t scsi_accel_read_program_instructions[] = {
-            //     .wrap_target
-    0x90a0, //  0: pull   block           side 1     
-    0x309a, //  1: wait   1 gpio, 26      side 1     
-    0x4061, //  2: in     null, 1         side 0     
-    0x201a, //  3: wait   0 gpio, 26      side 0     
-    0x5009, //  4: in     pins, 9         side 1     
-    0x5056, //  5: in     y, 22           side 1     
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_accel_read_program = {
-    .instructions = scsi_accel_read_program_instructions,
-    .length = 6,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_accel_read_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_accel_read_wrap_target, offset + scsi_accel_read_wrap);
-    sm_config_set_sideset(&c, 1, false, false);
-    return c;
-}
-#endif
-
-// --------------- //
-// scsi_sync_write //
-// --------------- //
-
-#define scsi_sync_write_wrap_target 0
-#define scsi_sync_write_wrap 2
-
-static const uint16_t scsi_sync_write_program_instructions[] = {
-            //     .wrap_target
-    0x7009, //  0: out    pins, 9         side 1     
-    0x6077, //  1: out    null, 23        side 0     
-    0x5061, //  2: in     null, 1         side 1     
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_sync_write_program = {
-    .instructions = scsi_sync_write_program_instructions,
-    .length = 3,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_sync_write_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_sync_write_wrap_target, offset + scsi_sync_write_wrap);
-    sm_config_set_sideset(&c, 1, false, false);
-    return c;
-}
-#endif
-
-// --------------------- //
-// scsi_sync_write_pacer //
-// --------------------- //
-
-#define scsi_sync_write_pacer_wrap_target 0
-#define scsi_sync_write_pacer_wrap 2
-
-static const uint16_t scsi_sync_write_pacer_program_instructions[] = {
-            //     .wrap_target
-    0x209a, //  0: wait   1 gpio, 26                 
-    0x201a, //  1: wait   0 gpio, 26                 
-    0x6061, //  2: out    null, 1                    
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_sync_write_pacer_program = {
-    .instructions = scsi_sync_write_pacer_program_instructions,
-    .length = 3,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_sync_write_pacer_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_sync_write_pacer_wrap_target, offset + scsi_sync_write_pacer_wrap);
-    return c;
-}
-#endif
-
-// -------------------- //
-// scsi_sync_read_pacer //
-// -------------------- //
-
-#define scsi_sync_read_pacer_wrap_target 0
-#define scsi_sync_read_pacer_wrap 2
-
-static const uint16_t scsi_sync_read_pacer_program_instructions[] = {
-            //     .wrap_target
-    0x9020, //  0: push   block           side 1     
-    0x0040, //  1: jmp    x--, 0          side 0     
-    0x1002, //  2: jmp    2               side 1     
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_sync_read_pacer_program = {
-    .instructions = scsi_sync_read_pacer_program_instructions,
-    .length = 3,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_sync_read_pacer_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_sync_read_pacer_wrap_target, offset + scsi_sync_read_pacer_wrap);
-    sm_config_set_sideset(&c, 1, false, false);
-    return c;
-}
-#endif
-
-// ---------------- //
-// scsi_read_parity //
-// ---------------- //
-
-#define scsi_read_parity_wrap_target 0
-#define scsi_read_parity_wrap 4
-
-static const uint16_t scsi_read_parity_program_instructions[] = {
-            //     .wrap_target
-    0x60c8, //  0: out    isr, 8                     
-    0x8020, //  1: push   block                      
-    0x6038, //  2: out    x, 24                      
-    0x0040, //  3: jmp    x--, 0                     
-    0xc000, //  4: irq    nowait 0                   
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program scsi_read_parity_program = {
-    .instructions = scsi_read_parity_program_instructions,
-    .length = 5,
-    .origin = -1,
-};
-
-static inline pio_sm_config scsi_read_parity_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + scsi_read_parity_wrap_target, offset + scsi_read_parity_wrap);
-    return c;
-}
-#endif
-

lib/ZuluSCSI_platform_RP2040/sdio.cpp

@@ -36,10 +36,8 @@
 #include <ZuluSCSI_platform.h>
 #include <ZuluSCSI_log.h>
 
-#ifdef ZULUSCSI_PICO
+#if defined(ZULUSCSI_PICO) || defined(ZULUSCSI_BS2)
 #include "sdio_Pico.pio.h"
-#elif defined(ZULUSCSI_BS2)
-#include "sdio_BS2.pio.h"
 #else
 #include "sdio_RP2040.pio.h"
 #endif

lib/ZuluSCSI_platform_RP2040/sdio_BS2.pio

@@ -1,165 +0,0 @@
-; ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
-; 
-; ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
-; 
-; https://www.gnu.org/licenses/gpl-3.0.html
-; ----
-; This program is free software: you can redistribute it and/or modify
-; it under the terms of the GNU General Public License as published by
-; the Free Software Foundation, either version 3 of the License, or
-; (at your option) any later version. 
-; 
-; This program is distributed in the hope that it will be useful,
-; but WITHOUT ANY WARRANTY; without even the implied warranty of
-; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; GNU General Public License for more details. 
-; 
-; You should have received a copy of the GNU General Public License
-; along with this program.  If not, see <https://www.gnu.org/licenses/>.
-
-; RP2040 PIO program for implementing SD card access in SDIO mode
-; Run "pioasm rp2040_sdio.pio rp2040_sdio.pio.h" to regenerate the C header from this.
-
-
-; The RP2040 official work-in-progress code at
-; https://github.com/raspberrypi/pico-extras/tree/master/src/rp2_common/pico_sd_card
-; may be useful reference, but this is independent implementation.
-;
-; For official SDIO specifications, refer to:
-; https://www.sdcard.org/downloads/pls/
-; "SDIO Physical Layer Simplified Specification Version 8.00"
-
-; Clock settings
-; For 3.3V communication the available speeds are:
-; - Default speed: max. 25 MHz clock
-; - High speed:    max. 50 MHz clock
-;
-; From the default RP2040 clock speed of 125 MHz, the closest dividers
-; are 3 for 41.7 MHz and 5 for 25 MHz. The CPU can apply further divider
-; through state machine registers for the initial handshake.
-;
-; Because data is written on the falling edge and read on the rising
-; edge, it is preferrable to have a long 0 state and short 1 state.
-;.define CLKDIV 3
-.define CLKDIV 5
-.define D0 ((CLKDIV + 1) / 2 - 1)
-.define D1 (CLKDIV/2 - 1)
-.define SDIO_CLK_GPIO 10
-
-; State machine 0 is used to:
-; - generate continuous clock on SDIO_CLK
-; - send CMD packets
-; - receive response packets
-;
-; Pin mapping for this state machine:
-; - Sideset    : CLK
-; - IN/OUT/SET : CMD
-; - JMP_PIN    : CMD
-;
-; The commands to send are put on TX fifo and must have two words:
-; Word 0 bits 31-24: Number of bits in command minus one (usually 47)
-; Word 0 bits 23-00: First 24 bits of the command packet, shifted out MSB first
-; Word 1 bits 31-08: Last 24 bits of the command packet, shifted out MSB first
-; Word 1 bits 07-00: Number of bits in response minus one (usually 47), or 0 if no response
-;
-; The response is put on RX fifo, starting with the MSB.
-; Partial last word will be padded with zero bits at the top.
-;
-; The state machine EXECCTRL should be set so that STATUS indicates TX FIFO < 2
-; and that AUTOPULL and AUTOPUSH are enabled.
-
-.program sdio_cmd_clk
-    .side_set 1
-
-    mov OSR, NULL       side 1 [D1]    ; Make sure OSR is full of zeros to prevent autopull
-
-wait_cmd:
-    mov Y, !STATUS      side 0 [D0]    ; Check if TX FIFO has data
-    jmp !Y wait_cmd     side 1 [D1]
-
-load_cmd:
-    out NULL, 32        side 0 [D0]    ; Load first word (trigger autopull)
-    out X, 8            side 1 [D1]    ; Number of bits to send
-    set pins, 1         side 0 [D0]    ; Initial state of CMD is high
-    set pindirs, 1      side 1 [D1]    ; Set SDIO_CMD as output
-
-send_cmd:
-    out pins, 1         side 0 [D0]    ; Write output on falling edge of CLK
-    jmp X-- send_cmd    side 1 [D1]
-
-prep_resp:
-    set pindirs, 0      side 0 [D0]    ; Set SDIO_CMD as input
-    out X, 8            side 1 [D1]    ; Get number of bits in response
-    nop                 side 0 [D0]    ; For clock alignment
-    jmp !X resp_done    side 1 [D1]    ; Check if we expect a response
-
-wait_resp:
-    nop                  side 0 [D0]
-    jmp PIN wait_resp    side 1 [D1]    ; Loop until SDIO_CMD = 0
-
-    ; Note: input bits are read at the same time as we write CLK=0.
-    ; Because the host controls the clock, the read happens before
-    ; the card sees the falling clock edge. This gives maximum time
-    ; for the data bit to settle.
-read_resp:
-    in PINS, 1          side 0 [D0]    ; Read input data bit
-    jmp X-- read_resp   side 1 [D1]    ; Loop to receive all data bits
-
-resp_done:
-    push                side 0 [D0]    ; Push the remaining part of response
-
-; State machine 1 is used to send and receive data blocks.
-; Pin mapping for this state machine:
-; - IN / OUT: SDIO_D0-D3
-; - GPIO defined at beginning of this file: SDIO_CLK
-
-; Data reception program
-; This program will wait for initial start of block token and then
-; receive a data block. The application must set number of nibbles
-; to receive minus 1 to Y register before running this program.
-.program sdio_data_rx
-
-wait_start:
-    mov X, Y                               ; Reinitialize number of nibbles to receive
-    wait 0 pin 0                           ; Wait for zero state on D0
-    wait 1 gpio SDIO_CLK_GPIO  [CLKDIV-1]  ; Wait for rising edge and then whole clock cycle
-
-rx_data:
-    in PINS, 4                 [CLKDIV-2]  ; Read nibble
-    jmp X--, rx_data
-
-; Data transmission program
-;
-; Before running this program, pindirs should be set as output
-; and register X should be initialized with the number of nibbles
-; to send minus 1 (typically 8 + 1024 + 16 + 1 - 1 = 1048)
-; and register Y with the number of response bits minus 1 (typically 31).
-;
-; Words written to TX FIFO must be:
-; - Word 0: start token 0xFFFFFFF0
-; - Word 1-128: transmitted data (512 bytes)
-; - Word 129-130: CRC checksum
-; - Word 131: end token 0xFFFFFFFF
-;
-; After the card reports idle status, RX FIFO will get a word that
-; contains the D0 line response from card.
-
-.program sdio_data_tx
-    wait 0 gpio SDIO_CLK_GPIO  
-    wait 1 gpio SDIO_CLK_GPIO  [CLKDIV + D1 - 1]; Synchronize so that write occurs on falling edge
-
-tx_loop:
-    out PINS, 4                [D0]    ; Write nibble and wait for whole clock cycle
-    jmp X-- tx_loop            [D1]
-
-    set pindirs, 0x00          [D0]    ; Set data bus as input
-
-.wrap_target
-response_loop:
-    in PINS, 1                 [D1]    ; Read D0 on rising edge
-    jmp Y--, response_loop     [D0]
-
-wait_idle:
-    wait 1 pin 0               [D1]    ; Wait for card to indicate idle condition
-    push                       [D0]    ; Push the response token
-.wrap

lib/ZuluSCSI_platform_RP2040/sdio_BS2.pio.h

@@ -1,121 +0,0 @@
-// -------------------------------------------------- //
-// This file is autogenerated by pioasm; do not edit! //
-// -------------------------------------------------- //
-
-#pragma once
-
-#if !PICO_NO_HARDWARE
-#include "hardware/pio.h"
-#endif
-
-// ------------ //
-// sdio_cmd_clk //
-// ------------ //
-
-#define sdio_cmd_clk_wrap_target 0
-#define sdio_cmd_clk_wrap 17
-
-static const uint16_t sdio_cmd_clk_program_instructions[] = {
-            //     .wrap_target
-    0xb1e3, //  0: mov    osr, null       side 1 [1] 
-    0xa24d, //  1: mov    y, !status      side 0 [2] 
-    0x1161, //  2: jmp    !y, 1           side 1 [1] 
-    0x6260, //  3: out    null, 32        side 0 [2] 
-    0x7128, //  4: out    x, 8            side 1 [1] 
-    0xe201, //  5: set    pins, 1         side 0 [2] 
-    0xf181, //  6: set    pindirs, 1      side 1 [1] 
-    0x6201, //  7: out    pins, 1         side 0 [2] 
-    0x1147, //  8: jmp    x--, 7          side 1 [1] 
-    0xe280, //  9: set    pindirs, 0      side 0 [2] 
-    0x7128, // 10: out    x, 8            side 1 [1] 
-    0xa242, // 11: nop                    side 0 [2] 
-    0x1131, // 12: jmp    !x, 17          side 1 [1] 
-    0xa242, // 13: nop                    side 0 [2] 
-    0x11cd, // 14: jmp    pin, 13         side 1 [1] 
-    0x4201, // 15: in     pins, 1         side 0 [2] 
-    0x114f, // 16: jmp    x--, 15         side 1 [1] 
-    0x8220, // 17: push   block           side 0 [2] 
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program sdio_cmd_clk_program = {
-    .instructions = sdio_cmd_clk_program_instructions,
-    .length = 18,
-    .origin = -1,
-};
-
-static inline pio_sm_config sdio_cmd_clk_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + sdio_cmd_clk_wrap_target, offset + sdio_cmd_clk_wrap);
-    sm_config_set_sideset(&c, 1, false, false);
-    return c;
-}
-#endif
-
-// ------------ //
-// sdio_data_rx //
-// ------------ //
-
-#define sdio_data_rx_wrap_target 0
-#define sdio_data_rx_wrap 4
-
-static const uint16_t sdio_data_rx_program_instructions[] = {
-            //     .wrap_target
-    0xa022, //  0: mov    x, y                       
-    0x2020, //  1: wait   0 pin, 0                   
-    0x248a, //  2: wait   1 gpio, 10             [4] 
-    0x4304, //  3: in     pins, 4                [3] 
-    0x0043, //  4: jmp    x--, 3                     
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program sdio_data_rx_program = {
-    .instructions = sdio_data_rx_program_instructions,
-    .length = 5,
-    .origin = -1,
-};
-
-static inline pio_sm_config sdio_data_rx_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + sdio_data_rx_wrap_target, offset + sdio_data_rx_wrap);
-    return c;
-}
-#endif
-
-// ------------ //
-// sdio_data_tx //
-// ------------ //
-
-#define sdio_data_tx_wrap_target 5
-#define sdio_data_tx_wrap 8
-
-static const uint16_t sdio_data_tx_program_instructions[] = {
-    0x200a, //  0: wait   0 gpio, 10                 
-    0x258a, //  1: wait   1 gpio, 10             [5] 
-    0x6204, //  2: out    pins, 4                [2] 
-    0x0142, //  3: jmp    x--, 2                 [1] 
-    0xe280, //  4: set    pindirs, 0             [2] 
-            //     .wrap_target
-    0x4101, //  5: in     pins, 1                [1] 
-    0x0285, //  6: jmp    y--, 5                 [2] 
-    0x21a0, //  7: wait   1 pin, 0               [1] 
-    0x8220, //  8: push   block                  [2] 
-            //     .wrap
-};
-
-#if !PICO_NO_HARDWARE
-static const struct pio_program sdio_data_tx_program = {
-    .instructions = sdio_data_tx_program_instructions,
-    .length = 9,
-    .origin = -1,
-};
-
-static inline pio_sm_config sdio_data_tx_program_get_default_config(uint offset) {
-    pio_sm_config c = pio_get_default_sm_config();
-    sm_config_set_wrap(&c, offset + sdio_data_tx_wrap_target, offset + sdio_data_tx_wrap);
-    return c;
-}
-#endif
-

platformio.ini

@@ -128,18 +128,7 @@ build_flags =
 ; Variant of RP2040 platform, based on Raspberry Pico board and a carrier PCB
 ; Differs in pinout from ZuluSCSI_RP2040 platform, but shares most of the code.
 [env:ZuluSCSI_BS2]
-platform = raspberrypi@1.9.0
-framework = arduino
-board = ZuluSCSI_RP2040
-extra_scripts = src/build_bootloader.py
-board_build.ldscript = lib/ZuluSCSI_platform_RP2040/rp2040.ld
-ldscript_bootloader = lib/ZuluSCSI_platform_RP2040/rp2040_btldr.ld
-lib_deps =
-    SdFat=https://github.com/rabbitholecomputing/SdFat#2.2.0-gpt
-    minIni
-    ZuluSCSI_platform_RP2040
-    SCSI2SD
-    CUEParser
+extends = env:ZuluSCSI_RP2040
 build_flags =
     -O2 -Isrc -ggdb -g3
     -Wall -Wno-sign-compare -Wno-ignored-qualifiers