|  | @@ -50,13 +50,12 @@ void MX_FMC_Init(void)
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				|  |  |    hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
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				|  |  |    hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
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				|  |  |    hsram1.Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
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				|  |  | -  // WE MAY start writing another 512 bytes before this FIFO is empty!
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				|  |  |  
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				|  |  |    hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
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				|  |  |    /* Timing */
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				|  |  |  
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				|  |  |    // 1 clock to read the address, + 1 for synchroniser skew
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				|  |  | -  Timing.AddressSetupTime = 5;
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				|  |  | +  Timing.AddressSetupTime = 4;
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				|  |  |    Timing.AddressHoldTime = 2;
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				|  |  |  
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				|  |  |    // Writes to device:
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				|  | @@ -67,12 +66,12 @@ void MX_FMC_Init(void)
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				|  |  |    // Reads from device:
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				|  |  |    //   3 for syncroniser
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				|  |  |    //   1 to write back to fsmc bus.
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				|  |  | -  Timing.DataSetupTime = 9;
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				|  |  | +  Timing.DataSetupTime = 8;
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				|  |  |  
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				|  |  |    // Allow a clock for us to release signals
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				|  |  |    // Need to avoid both devices acting as outputs
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				|  |  |    // on the multiplexed lines at the same time.
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				|  |  | -  Timing.BusTurnAroundDuration = 3;
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				|  |  | +  Timing.BusTurnAroundDuration = 2;
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				|  |  |  
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				|  |  |    Timing.CLKDivision = 16; // Ignored for async
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				|  |  |    Timing.DataLatency = 17; // Ignored for async
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