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@@ -0,0 +1,229 @@
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+diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
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+index 569c8b1..1b8c51b 100644
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+--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
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++++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
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+@@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
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+ /* Enable SDIO Clock */
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+ __HAL_SD_ENABLE(hsd);
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+
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++ /* 1ms: required power up waiting time before starting the SD initialization
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++ sequence */
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++ HAL_Delay(1);
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++
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+ /* Identify card operating voltage */
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+ errorstate = SD_PowerON(hsd);
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+ if(errorstate != HAL_SD_ERROR_NONE)
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+@@ -1227,22 +1231,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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+ else
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+ {
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+ /* Enable SD DMA transfer */
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+- __HAL_SD_DMA_ENABLE(hsd);
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++ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
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+
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+ if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
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+ {
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+ add *= 512U;
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+- }
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+
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+- /* Set Block Size for Card */
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+- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
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+- if(errorstate != HAL_SD_ERROR_NONE)
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+- {
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+- /* Clear all the static flags */
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+- __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
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+- hsd->ErrorCode |= errorstate;
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+- hsd->State = HAL_SD_STATE_READY;
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+- return HAL_ERROR;
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++ /* Set Block Size for Card */
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++ errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
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++ if(errorstate != HAL_SD_ERROR_NONE)
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++ {
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++ /* Clear all the static flags */
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++ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
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++ hsd->ErrorCode |= errorstate;
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++ hsd->State = HAL_SD_STATE_READY;
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++ return HAL_ERROR;
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++ }
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+ }
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+
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+ /* Configure the SD DPSM (Data Path State Machine) */
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+@@ -1252,6 +1256,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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+ config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
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+ config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
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+ config.DPSM = SDIO_DPSM_ENABLE;
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++
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++ // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
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++ // data is just discarded before the dpsm is started.
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++ __HAL_SD_DMA_ENABLE(hsd);
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++
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+ (void)SDIO_ConfigData(hsd->Instance, &config);
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+
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+ /* Read Blocks in DMA mode */
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+@@ -1343,17 +1352,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+ if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
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+ {
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+ add *= 512U;
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+- }
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+
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+- /* Set Block Size for Card */
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+- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
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+- if(errorstate != HAL_SD_ERROR_NONE)
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+- {
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+- /* Clear all the static flags */
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+- __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
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+- hsd->ErrorCode |= errorstate;
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+- hsd->State = HAL_SD_STATE_READY;
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+- return HAL_ERROR;
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++ /* Set Block Size for Card */
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++ errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
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++ if(errorstate != HAL_SD_ERROR_NONE)
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++ {
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++ /* Clear all the static flags */
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++ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
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++ hsd->ErrorCode |= errorstate;
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++ hsd->State = HAL_SD_STATE_READY;
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++ return HAL_ERROR;
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++ }
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+ }
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+
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+ /* Write Blocks in Polling mode */
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+@@ -1361,6 +1370,18 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+ {
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+ hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
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+
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++ /* MM: Prepare for write */
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++/* TODO
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++ SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->RCA << 16));
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++ SDIO_CmdInitTypeDef mm_cmdinit;
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++ mm_cmdinit.Argument = (uint32_t)NumberOfBlocks;
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++ mm_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT;
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++ mm_cmdinit.Response = SDIO_RESPONSE_SHORT;
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++ mm_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
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++ mm_cmdinit.CPSM = SDIO_CPSM_ENABLE;
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++ (void)SDIO_SendCommand(hsd->Instance, &mm_cmdinit);
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++ SDMMC_GetCmdResp1(hsd->Instance, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);*/
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++
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+ /* Write Multi Block command */
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+ errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
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+ }
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+@@ -1382,7 +1403,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+ }
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+
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+ /* Enable SDIO DMA transfer */
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+- __HAL_SD_DMA_ENABLE(hsd);
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++ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
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+
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+ /* Enable the DMA Channel */
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+ if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
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+@@ -1403,6 +1424,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+ config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD;
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+ config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
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+ config.DPSM = SDIO_DPSM_ENABLE;
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++
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++ // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
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++ // data is just discarded before the dpsm is started.
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++ __HAL_SD_DMA_ENABLE();
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++
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+ (void)SDIO_ConfigData(hsd->Instance, &config);
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+
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+ return HAL_OK;
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+diff --git a/STM32CubeMX/revF/Src/sdio.c b/STM32CubeMX/revF/Src/sdio.c
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+index f2a0b7c..a00c6a8 100644
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+--- a/STM32CubeMX/revF/Src/sdio.c
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++++ b/STM32CubeMX/revF/Src/sdio.c
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+@@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
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+ hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
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+ hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
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+ hsd.Init.ClockDiv = 0;
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++
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++ /*
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+ if (HAL_SD_Init(&hsd) != HAL_OK)
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+ {
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+ Error_Handler();
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+@@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
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+ if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
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+ {
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+ Error_Handler();
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+- }
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+-
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++ }*/
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+ }
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+
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+ void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
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+diff --git a/STM32CubeMX/revF/Src/spi.c b/STM32CubeMX/revF/Src/spi.c
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+index 8a452c4..8e4082b 100644
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+--- a/STM32CubeMX/revF/Src/spi.c
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++++ b/STM32CubeMX/revF/Src/spi.c
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+@@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
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+ hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
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+ hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
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+ hspi1.Init.NSS = SPI_NSS_SOFT;
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++
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++ // 13.5Mbaud FPGA device allows up to 25MHz write
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+ hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
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+ hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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+ hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
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+diff --git a/STM32CubeMX/revF/Src/usbd_conf.c b/STM32CubeMX/revF/Src/usbd_conf.c
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+index 65f6102..8e03767 100644
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+--- a/STM32CubeMX/revF/Src/usbd_conf.c
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++++ b/STM32CubeMX/revF/Src/usbd_conf.c
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+@@ -357,9 +357,11 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
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+ HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
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+ HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
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+ #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
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++ // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
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+ HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
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+ HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
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+- HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
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++ HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
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++ HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
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+ }
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+ return USBD_OK;
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+ }
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+diff --git a/STM32CubeMX/revF/Src/fsmc.c b/STM32CubeMX/revF/Src/fsmc.c
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+index 03a1b12..1b01446 100644
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+--- a/STM32CubeMX/revF/Src/fsmc.c
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++++ b/STM32CubeMX/revF/Src/fsmc.c
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+@@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
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+ hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
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+ hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
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+ /* Timing */
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++
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++ // 1 clock to read the address, + 1 for synchroniser skew
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+ Timing.AddressSetupTime = 2;
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+ Timing.AddressHoldTime = 1;
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++
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++ // Writes to device:
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++ // 1 for synchroniser skew (dbx also delayed)
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++ // 1 to skip hold time
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++ // 1 to write data.
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++
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++ // Reads from device:
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++ // 3 for syncroniser
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++ // 1 to write back to fsmc bus.
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+ Timing.DataSetupTime = 4;
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++
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++ // Allow a clock for us to release signals
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++ // Need to avoid both devices acting as outputs
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++ // on the multiplexed lines at the same time.
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+ Timing.BusTurnAroundDuration = 1;
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+- Timing.CLKDivision = 16;
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+- Timing.DataLatency = 17;
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++
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++ Timing.CLKDivision = 16; // Ignored for async
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++ Timing.DataLatency = 17; // Ignored for async
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+ Timing.AccessMode = FSMC_ACCESS_MODE_A;
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+ /* ExtTiming */
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+
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+@@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
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+ PE0 ------> FSMC_NBL0
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+ PE1 ------> FSMC_NBL1
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+ */
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++
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++ // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
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++ // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
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++
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+ /* GPIO_InitStruct */
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+ GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
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+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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+
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