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3.5" Board redesign!

- A few GPIO ports for expansion.
- SD SPI signals brought to a header.
- Reduced solder stencil holes for PSoC to reduce bridging
- Increased solder stencil holes for micro SD to reduce cold joints
- Added external LED support
- 3.5" mounting hole positions fixed
- Added 2.5" mounting holes for use with 2.5" to 3.5" bracket.
Michael McMaster 11 years ago
parent
commit
ff05c3e856

+ 177 - 114
lib/SCSI2SD/hardware/scsi2sd.cmd

@@ -1,5 +1,182 @@
 # Pin name action command file
 
+# Start of element J8
+ChangePinName(J8, 11, 11)
+ChangePinName(J8, 12, 12)
+ChangePinName(J8, 13, 13)
+ChangePinName(J8, 14, 14)
+ChangePinName(J8, 15, 15)
+ChangePinName(J8, 16, 16)
+ChangePinName(J8, 6, 6)
+ChangePinName(J8, 7, 7)
+ChangePinName(J8, 8, 8)
+ChangePinName(J8, 9, 9)
+ChangePinName(J8, 10, 10)
+ChangePinName(J8, 5, 5)
+ChangePinName(J8, 1, 1)
+ChangePinName(J8, 4, 4)
+ChangePinName(J8, 3, 3)
+ChangePinName(J8, 2, 2)
+
+# Start of element J11
+ChangePinName(J11, 8, 8)
+ChangePinName(J11, 7, 7)
+ChangePinName(J11, 6, 6)
+ChangePinName(J11, 5, 5)
+ChangePinName(J11, 4, 4)
+ChangePinName(J11, 3, 3)
+ChangePinName(J11, 2, 2)
+ChangePinName(J11, 1, 1)
+
+# Start of element J12
+ChangePinName(J12, 11, 11)
+ChangePinName(J12, 12, 12)
+ChangePinName(J12, 13, 13)
+ChangePinName(J12, 14, 14)
+ChangePinName(J12, 15, 15)
+ChangePinName(J12, 16, 16)
+ChangePinName(J12, 17, 17)
+ChangePinName(J12, 18, 18)
+ChangePinName(J12, 6, 6)
+ChangePinName(J12, 7, 7)
+ChangePinName(J12, 8, 8)
+ChangePinName(J12, 9, 9)
+ChangePinName(J12, 10, 10)
+ChangePinName(J12, 5, 5)
+ChangePinName(J12, 1, 1)
+ChangePinName(J12, 4, 4)
+ChangePinName(J12, 3, 3)
+ChangePinName(J12, 2, 2)
+
+# Start of element R6
+ChangePinName(R6, 1, 1)
+ChangePinName(R6, 2, 2)
+
+# Start of element Q1
+ChangePinName(Q1, S, S)
+ChangePinName(Q1, D, D)
+ChangePinName(Q1, G, G)
+
+# Start of element R7
+ChangePinName(R7, 1, 1)
+ChangePinName(R7, 2, 2)
+
+# Start of element J10
+ChangePinName(J10, 1, 1)
+ChangePinName(J10, 2, 2)
+
+# Start of element J7
+ChangePinName(J7, 1, 1)
+ChangePinName(J7, 2, 2)
+
+# Start of element D1
+ChangePinName(D1, 1, cathode)
+ChangePinName(D1, 2, anode)
+
+# Start of element J3
+ChangePinName(J3, 1, 1)
+ChangePinName(J3, 2, 2)
+
+# Start of element C1
+ChangePinName(C1, 2, 2)
+ChangePinName(C1, 1, 1)
+
+# Start of element J2
+ChangePinName(J2, 50, 50)
+ChangePinName(J2, 49, 49)
+ChangePinName(J2, 48, 48)
+ChangePinName(J2, 47, 47)
+ChangePinName(J2, 46, 46)
+ChangePinName(J2, 45, 45)
+ChangePinName(J2, 44, 44)
+ChangePinName(J2, 43, 43)
+ChangePinName(J2, 42, 42)
+ChangePinName(J2, 41, 41)
+ChangePinName(J2, 40, 40)
+ChangePinName(J2, 39, 39)
+ChangePinName(J2, 38, 38)
+ChangePinName(J2, 37, 37)
+ChangePinName(J2, 36, 36)
+ChangePinName(J2, 35, 35)
+ChangePinName(J2, 34, 34)
+ChangePinName(J2, 33, 33)
+ChangePinName(J2, 32, 32)
+ChangePinName(J2, 31, 31)
+ChangePinName(J2, 30, 30)
+ChangePinName(J2, 29, 29)
+ChangePinName(J2, 28, 28)
+ChangePinName(J2, 27, 27)
+ChangePinName(J2, 26, 26)
+ChangePinName(J2, 25, 25)
+ChangePinName(J2, 24, 24)
+ChangePinName(J2, 23, 23)
+ChangePinName(J2, 22, 22)
+ChangePinName(J2, 21, 21)
+ChangePinName(J2, 20, 20)
+ChangePinName(J2, 19, 19)
+ChangePinName(J2, 18, 18)
+ChangePinName(J2, 17, 17)
+ChangePinName(J2, 16, 16)
+ChangePinName(J2, 15, 15)
+ChangePinName(J2, 14, 14)
+ChangePinName(J2, 13, 13)
+ChangePinName(J2, 12, 12)
+ChangePinName(J2, 11, 11)
+ChangePinName(J2, 10, 10)
+ChangePinName(J2, 9, 9)
+ChangePinName(J2, 8, 8)
+ChangePinName(J2, 7, 7)
+ChangePinName(J2, 6, 6)
+ChangePinName(J2, 5, 5)
+ChangePinName(J2, 4, 4)
+ChangePinName(J2, 3, 3)
+ChangePinName(J2, 2, 2)
+ChangePinName(J2, 1, 1)
+
+# Start of element F1
+ChangePinName(F1, 2, 2)
+ChangePinName(F1, 1, 1)
+
+# Start of element D2
+ChangePinName(D2, 1, cathode)
+ChangePinName(D2, 2, anode)
+
+# Start of element C4
+ChangePinName(C4, 2, 2)
+ChangePinName(C4, 1, 1)
+
+# Start of element C2
+ChangePinName(C2, 2, 2)
+ChangePinName(C2, 1, 1)
+
+# Start of element J1
+ChangePinName(J1, 4, +5V)
+ChangePinName(J1, 3, GND)
+ChangePinName(J1, 2, GND)
+ChangePinName(J1, 1, +12V)
+
+# Start of element J9
+ChangePinName(J9, 11, 11)
+ChangePinName(J9, 12, 12)
+ChangePinName(J9, 13, 13)
+ChangePinName(J9, 14, 14)
+ChangePinName(J9, 15, 15)
+ChangePinName(J9, 16, 16)
+ChangePinName(J9, 19, 19)
+ChangePinName(J9, 17, 17)
+ChangePinName(J9, 20, 20)
+ChangePinName(J9, 18, 18)
+ChangePinName(J9, 6, 6)
+ChangePinName(J9, 7, 7)
+ChangePinName(J9, 8, 8)
+ChangePinName(J9, 9, 9)
+ChangePinName(J9, 10, 10)
+ChangePinName(J9, 5, 5)
+ChangePinName(J9, 1, 1)
+ChangePinName(J9, 4, 4)
+ChangePinName(J9, 3, 3)
+ChangePinName(J9, 2, 2)
+
 # Start of element J6
 ChangePinName(J6, 10, \_CD\_)
 ChangePinName(J6, 9, GND)
@@ -59,30 +236,10 @@ ChangePinName(D3, 2, anode)
 ChangePinName(F2, 2, 2)
 ChangePinName(F2, 1, 1)
 
-# Start of element F1
-ChangePinName(F1, 2, 2)
-ChangePinName(F1, 1, 1)
-
-# Start of element D1
-ChangePinName(D1, 1, cathode)
-ChangePinName(D1, 2, anode)
-
-# Start of element D2
-ChangePinName(D2, 1, cathode)
-ChangePinName(D2, 2, anode)
-
-# Start of element J3
-ChangePinName(J3, 1, 1)
-ChangePinName(J3, 2, 2)
-
 # Start of element C14
 ChangePinName(C14, 2, 2)
 ChangePinName(C14, 1, 1)
 
-# Start of element C4
-ChangePinName(C4, 2, 2)
-ChangePinName(C4, 1, 1)
-
 # Start of element C7
 ChangePinName(C7, 2, 2)
 ChangePinName(C7, 1, 1)
@@ -215,34 +372,6 @@ ChangePinName(U1, 3, P2[7])
 ChangePinName(U1, 2, P2[6])
 ChangePinName(U1, 1, P2[5])
 
-# Start of element R12
-ChangePinName(R12, 1, 1)
-ChangePinName(R12, 2, 2)
-
-# Start of element R11
-ChangePinName(R11, 1, 1)
-ChangePinName(R11, 2, 2)
-
-# Start of element R10
-ChangePinName(R10, 1, 1)
-ChangePinName(R10, 2, 2)
-
-# Start of element R9
-ChangePinName(R9, 1, 1)
-ChangePinName(R9, 2, 2)
-
-# Start of element R8
-ChangePinName(R8, 1, 1)
-ChangePinName(R8, 2, 2)
-
-# Start of element R7
-ChangePinName(R7, 1, 1)
-ChangePinName(R7, 2, 2)
-
-# Start of element R6
-ChangePinName(R6, 1, 1)
-ChangePinName(R6, 2, 2)
-
 # Start of element C26
 ChangePinName(C26, 2, 2)
 ChangePinName(C26, 1, 1)
@@ -315,10 +444,6 @@ ChangePinName(J4, 4, 4)
 ChangePinName(J4, 3, 3)
 ChangePinName(J4, 2, 2)
 
-# Start of element C1
-ChangePinName(C1, 2, 2)
-ChangePinName(C1, 1, 1)
-
 # Start of element U5
 ChangePinName(U5, 8, \_Y3\_)
 ChangePinName(U5, 9, A3)
@@ -367,68 +492,6 @@ ChangePinName(U3, 3, A1)
 ChangePinName(U3, 2, \_Y0\_)
 ChangePinName(U3, 1, A0)
 
-# Start of element C2
-ChangePinName(C2, 2, 2)
-ChangePinName(C2, 1, 1)
-
 # Start of element C22
 ChangePinName(C22, 2, 2)
 ChangePinName(C22, 1, 1)
-
-# Start of element J1
-ChangePinName(J1, 4, +5V)
-ChangePinName(J1, 3, GND)
-ChangePinName(J1, 2, GND)
-ChangePinName(J1, 1, +12V)
-
-# Start of element J2
-ChangePinName(J2, 50, 50)
-ChangePinName(J2, 49, 49)
-ChangePinName(J2, 48, 48)
-ChangePinName(J2, 47, 47)
-ChangePinName(J2, 46, 46)
-ChangePinName(J2, 45, 45)
-ChangePinName(J2, 44, 44)
-ChangePinName(J2, 43, 43)
-ChangePinName(J2, 42, 42)
-ChangePinName(J2, 41, 41)
-ChangePinName(J2, 40, 40)
-ChangePinName(J2, 39, 39)
-ChangePinName(J2, 38, 38)
-ChangePinName(J2, 37, 37)
-ChangePinName(J2, 36, 36)
-ChangePinName(J2, 35, 35)
-ChangePinName(J2, 34, 34)
-ChangePinName(J2, 33, 33)
-ChangePinName(J2, 32, 32)
-ChangePinName(J2, 31, 31)
-ChangePinName(J2, 30, 30)
-ChangePinName(J2, 29, 29)
-ChangePinName(J2, 28, 28)
-ChangePinName(J2, 27, 27)
-ChangePinName(J2, 26, 26)
-ChangePinName(J2, 25, 25)
-ChangePinName(J2, 24, 24)
-ChangePinName(J2, 23, 23)
-ChangePinName(J2, 22, 22)
-ChangePinName(J2, 21, 21)
-ChangePinName(J2, 20, 20)
-ChangePinName(J2, 19, 19)
-ChangePinName(J2, 18, 18)
-ChangePinName(J2, 17, 17)
-ChangePinName(J2, 16, 16)
-ChangePinName(J2, 15, 15)
-ChangePinName(J2, 14, 14)
-ChangePinName(J2, 13, 13)
-ChangePinName(J2, 12, 12)
-ChangePinName(J2, 11, 11)
-ChangePinName(J2, 10, 10)
-ChangePinName(J2, 9, 9)
-ChangePinName(J2, 8, 8)
-ChangePinName(J2, 7, 7)
-ChangePinName(J2, 6, 6)
-ChangePinName(J2, 5, 5)
-ChangePinName(J2, 4, 4)
-ChangePinName(J2, 3, 3)
-ChangePinName(J2, 2, 2)
-ChangePinName(J2, 1, 1)

+ 98 - 76
lib/SCSI2SD/hardware/scsi2sd.net

@@ -1,76 +1,98 @@
-unnamed_net27	R5-1 J5-2 
-unnamed_net26	R4-1 J5-3 
-unnamed_net25	J5-4 
-unnamed_net24	D3-2 F2-2 
-unnamed_net23	J5-1 F2-1 
-unnamed_net22	D1-2 J3-1 
-drive_5V	F1-2 D2-2 J3-2 
-unnamed_net21	R1-1 R2-1 C14-2 C7-2 U2-2 
-unnamed_net20	U1-55 
-unnamed_net19	U1-42 
-unnamed_net18	R5-2 U1-36 
-unnamed_net17	R4-2 U1-35 
-unnamed_net16	U1-25 
-unnamed_net15	U1-22 
-unnamed_net14	U1-11 
-SD_DAT2	J6-1 U1-49 R12-1 
-\_SD_CS\_	J6-2 U1-48 R11-1 
-SD_MOSI	J6-3 U1-47 R10-1 
-\_SD_CD\_	J6-10 U1-51 R9-1 
-SD_SCK	J6-5 U1-46 R8-1 
-SD_MISO	J6-7 U1-45 R7-1 
-SD_DAT1	J6-8 U1-44 R6-1 
-unnamed_net13	U1-86 U1-39 C20-2 
-unnamed_net12	U1-63 C27-2 
-unnamed_net11	U1-68 LED1-2 
-unnamed_net10	R3-1 LED1-1 
-unnamed_net9	U1-23 J4-6 
-unnamed_net8	U1-24 J4-8 
-unnamed_net7	U1-15 J4-10 
-unnamed_net6	U1-21 J4-4 
-unnamed_net5	U1-20 J4-2 
-DB0	U1-92 U5-9 
-DB2	U1-90 U5-11 
-DB4	U1-85 U5-13 
-DB1	U1-91 U5-5 
-DB3	U1-89 U5-3 
-DB5	U1-84 U5-1 
-DB6	U1-83 U4-9 
-DBP	U1-81 U4-11 
-BSY	U1-79 U4-13 
-DB7	U1-82 U4-5 
-ATN	U1-80 U4-3 
-ACK	U1-78 U4-1 
-RST	U1-77 U3-9 
-SEL	U1-74 U3-11 
-REQ	U1-72 U3-13 
-MSG	U1-76 U3-5 
-C/D	U1-73 U3-3 
-I/O	U1-71 U3-1 
-5V	D3-1 U6-3 C12-2 C26-2 U1-65 C24-2 U1-88 C8-2 C19-2 U1-37 C23-2 U1-100 C17-2 U1-75 C21-2 R3-2 U1-26 C9-2 J4-1 C11-2 U5-14 C10-2 U4-14 C3-2 U3-14 D2-1 C4-2 C2-2 
-3.3V	U6-2 C13-2 R12-2 R11-2 R10-2 R9-2 R8-2 R7-2 R6-2 U1-50 C28-2 J6-4 C22-2 
-unnamed_net4	F1-1 J1-4 
-unnamed_net3	J1-1 
-\_I/O\_	R2-2 U1-19 U3-2 J2-50 
-\_REQ\_	R2-3 U1-18 U3-12 J2-48 
-\_C/D\_	R2-4 U1-17 U3-4 J2-46 
-\_SEL\_	R2-5 U1-16 U3-10 J2-44 
-\_MSG\_	R2-6 U1-9 U3-6 J2-42 
-\_RST\_	R2-7 U1-8 U3-8 J2-40 
-\_ACK\_	R2-8 U1-7 U4-2 J2-38 
-\_BSY\_	R2-9 U1-6 U4-12 J2-36 
-\_ATN\_	R2-10 U1-5 U4-4 J2-32 
-unnamed_net2	D1-1 U2-3 C5-2 C1-2 J2-26 
-unnamed_net1	J2-25 
-\_DBP\_	R1-2 U1-95 U4-10 J2-18 
-\_DB7\_	R1-3 U1-96 U4-6 J2-16 
-\_DB6\_	R1-4 U1-97 U4-8 J2-14 
-\_DB5\_	R1-5 U1-98 U5-2 J2-12 
-\_DB4\_	R1-6 U1-99 U5-12 J2-10 
-\_DB3\_	R1-7 U1-1 U5-4 J2-8 
-\_DB2\_	R1-8 U1-2 U5-10 J2-6 
-\_DB1\_	R1-9 U1-3 U5-6 J2-4 
-\_DB0\_	R1-10 U1-4 U5-8 J2-2 
-GND	J6-9 J6-6 J5-5 C14-1 C4-1 C7-1 U6-1 U2-1 C12-1 C13-1 C5-1 C8-1 U1-87 U1-93 U1-94 U1-52 U1-53 U1-54 U1-56 U1-57 U1-58 U1-59 U1-60 U1-61 U1-62 U1-64 U1-66 U1-67 U1-69 U1-70 U1-43 U1-41 U1-40 U1-38 \
- U1-34 U1-33 U1-32 U1-31 U1-30 U1-29 U1-28 U1-27 U1-14 U1-13 U1-12 U1-10 C26-1 C20-1 C27-1 C19-1 C24-1 C23-1 C17-1 C21-1 C28-1 C11-1 C10-1 C3-1 C9-1 J4-7 J4-9 J4-5 J4-3 C1-1 U5-7 U4-7 U3-7 C2-1 C22-1 \
- J1-3 J1-2 J2-34 J2-30 J2-28 J2-22 J2-24 J2-20 J2-49 J2-47 J2-45 J2-43 J2-41 J2-39 J2-37 J2-35 J2-33 J2-31 J2-29 J2-27 J2-19 J2-17 J2-15 J2-13 J2-11 J2-9 J2-7 J2-5 J2-3 J2-23 J2-21 J2-1 
+unnamed_net50	R6-2 Q1-G 
+unnamed_net49	Q1-D R7-1 
+unnamed_net48	R7-2 J10-1 
+unnamed_net47	D1-2 J3-1 
+unnamed_net46	J2-25 
+drive_5V	J3-2 F1-2 D2-2 
+unnamed_net45	J7-2 F1-1 J1-4 
+unnamed_net44	J1-1 
+unnamed_net43	J9-19 
+unnamed_net42	J9-17 
+unnamed_net41	J6-8 
+unnamed_net40	J6-1 
+unnamed_net39	R5-1 J5-2 
+unnamed_net38	R4-1 J5-3 
+unnamed_net37	J5-4 
+unnamed_net36	D3-2 F2-2 
+unnamed_net35	J5-1 F2-1 
+unnamed_net34	R1-1 R2-1 C14-2 C7-2 U2-2 
+unnamed_net33	D1-1 C1-2 J2-26 U2-3 C5-2 
+unnamed_net32	J12-7 U1-51 
+unnamed_net31	J12-5 U1-52 
+unnamed_net30	J12-3 U1-53 
+unnamed_net29	J12-1 U1-54 
+unnamed_net28	U1-55 
+unnamed_net27	J11-7 U1-67 
+unnamed_net26	J11-5 U1-68 
+unnamed_net25	J11-3 U1-69 
+unnamed_net24	J11-1 U1-70 
+unnamed_net23	R6-1 U1-71 
+\_SD_CD\_	J12-17 J6-10 U1-49 
+\_SD_CS\_	J12-15 J6-2 U1-48 
+SD_MOSI	J12-13 J6-3 U1-47 
+SD_SCK	J12-11 J6-5 U1-46 
+SD_MISO	J12-9 J6-7 U1-45 
+unnamed_net22	U1-42 
+unnamed_net21	R5-2 U1-36 
+unnamed_net20	R4-2 U1-35 
+unnamed_net19	J8-15 U1-34 
+unnamed_net18	J8-13 U1-33 
+unnamed_net17	J8-11 U1-32 
+unnamed_net16	J8-9 U1-31 
+unnamed_net15	J8-7 U1-30 
+unnamed_net14	J8-5 U1-29 
+unnamed_net13	J8-3 U1-28 
+unnamed_net12	J8-1 U1-27 
+unnamed_net11	J9-3 U1-25 
+unnamed_net10	U1-11 
+unnamed_net9	U1-86 U1-39 C20-2 
+unnamed_net8	U1-63 C27-2 
+unnamed_net7	U1-72 LED1-2 
+unnamed_net6	R3-1 LED1-1 
+unnamed_net5	J9-13 U1-23 J4-6 
+unnamed_net4	J9-5 U1-24 J4-8 
+unnamed_net3	J9-15 U1-15 J4-10 
+unnamed_net2	J9-9 U1-21 J4-4 
+unnamed_net1	J9-7 U1-20 J4-2 
+\_DB0\_	J2-2 R1-2 U1-19 U5-8 
+DB0	U1-17 U5-9 
+\_DB2\_	J2-6 R1-4 U1-9 U5-10 
+DB2	U1-7 U5-11 
+\_DB4\_	J2-10 R1-6 U1-5 U5-12 
+DB4	U1-3 U5-13 
+\_DB1\_	J2-4 R1-3 U1-18 U5-6 
+DB1	U1-16 U5-5 
+\_DB3\_	J2-8 R1-5 U1-8 U5-4 
+DB3	U1-6 U5-3 
+\_DB5\_	J2-12 R1-7 U1-4 U5-2 
+DB5	U1-2 U5-1 
+\_DB6\_	J2-14 R1-8 U1-1 U4-8 
+DB6	U1-98 U4-9 
+\_DBP\_	J2-18 R1-10 U1-96 U4-10 
+DBP	U1-94 U4-11 
+\_BSY\_	J2-36 R2-3 U1-92 U4-12 
+BSY	U1-90 U4-13 
+\_DB7\_	J2-16 R1-9 U1-99 U4-6 
+DB7	U1-97 U4-5 
+\_ATN\_	J2-32 R2-2 U1-95 U4-4 
+ATN	U1-93 U4-3 
+\_ACK\_	J2-38 R2-4 U1-91 U4-2 
+ACK	U1-89 U4-1 
+\_RST\_	J2-40 R2-5 U1-85 U3-8 
+RST	U1-83 U3-9 
+\_SEL\_	J2-44 R2-7 U1-81 U3-10 
+SEL	U1-79 U3-11 
+\_REQ\_	J2-48 R2-9 U1-77 U3-12 
+REQ	U1-74 U3-13 
+5V	J8-2 J11-2 D2-1 C4-2 C2-2 D3-1 U6-3 C12-2 C26-2 U1-65 C24-2 U1-88 C8-2 C19-2 U1-37 C23-2 U1-100 C17-2 U1-75 C21-2 R3-2 J9-1 J9-2 U1-26 C9-2 J4-1 C11-2 U5-14 C10-2 U4-14 C3-2 U3-14 
+\_MSG\_	J2-42 R2-6 U1-84 U3-6 
+MSG	U1-82 U3-5 
+\_C/D\_	J2-46 R2-8 U1-80 U3-4 
+C/D	U1-78 U3-3 
+\_I/O\_	J2-50 R2-10 U1-76 U3-2 
+I/O	U1-73 U3-1 
+3.3V	J12-2 J10-2 U6-2 C13-2 U1-50 C28-2 J6-4 C22-2 
+GND	J8-12 J8-14 J8-16 J8-6 J8-8 J8-10 J8-4 J11-8 J11-6 J11-4 J12-12 J12-14 J12-16 J12-18 J12-6 J12-8 J12-10 J12-4 Q1-S J7-1 C1-1 J2-34 J2-30 J2-28 J2-22 J2-24 J2-20 J2-49 J2-47 J2-45 J2-43 J2-41 J2-39 \
+ J2-37 J2-35 J2-33 J2-31 J2-29 J2-27 J2-19 J2-17 J2-15 J2-13 J2-11 J2-9 J2-7 J2-5 J2-3 J2-23 J2-21 J2-1 C4-1 C2-1 J1-3 J1-2 J9-11 J9-20 J9-12 J9-14 J9-16 J9-18 J9-6 J9-8 J9-10 J9-4 J6-9 J6-6 J5-5 \
+ C14-1 C7-1 U6-1 U2-1 C12-1 C13-1 C5-1 C8-1 U1-87 U1-56 U1-57 U1-58 U1-59 U1-60 U1-61 U1-62 U1-64 U1-66 U1-44 U1-43 U1-41 U1-40 U1-38 U1-22 U1-14 U1-13 U1-12 U1-10 C26-1 C20-1 C27-1 C19-1 C24-1 C23-1 \
+ C17-1 C21-1 C28-1 C11-1 C10-1 C3-1 C9-1 J4-7 J4-9 J4-5 J4-3 U5-7 U4-7 U3-7 C22-1 

File diff suppressed because it is too large
+ 820 - 666
lib/SCSI2SD/hardware/scsi2sd.pcb


File diff suppressed because it is too large
+ 122 - 629
lib/SCSI2SD/hardware/scsi2sd.sch


+ 119 - 0
lib/SCSI2SD/hardware/symbols/TQFP100_14_reflow.fp

@@ -0,0 +1,119 @@
+Element[0x00000000 "Square Quad-side flat pack" "" "TQFP100_14" 0 0 -2000 -6000 0 100 0x00000000]
+(
+	# left row
+	Pad[-33500  -23622  -30110  -23622  1102  3000 1402 "1" "1"  0x00000100]
+	Pad[-33500  -21654  -30110  -21654  1102  3000 1402 "2" "2"  0x00000100]
+	Pad[-33500  -19685  -30110  -19685  1102  3000 1402 "3" "3"  0x00000100]
+	Pad[-33500  -17717  -30110  -17717  1102  3000 1402 "4" "4"  0x00000100]
+	Pad[-33500  -15748  -30110  -15748  1102  3000 1402 "5" "5"  0x00000100]
+	Pad[-33500  -13780  -30110  -13780  1102  3000 1402 "6" "6"  0x00000100]
+	Pad[-33500  -11811  -30110  -11811  1102  3000 1402 "7" "7"  0x00000100]
+	Pad[-33500  -9843  -30110  -9843  1102  3000 1402 "8" "8"  0x00000100]
+	Pad[-33500  -7874  -30110  -7874  1102  3000 1402 "9" "9"  0x00000100]
+	Pad[-33500  -5906  -30110  -5906  1102  3000 1402 "10" "10"  0x00000100]
+	Pad[-33500  -3937  -30110  -3937  1102  3000 1402 "11" "11"  0x00000100]
+	Pad[-33500  -1969  -30110  -1969  1102  3000 1402 "12" "12"  0x00000100]
+	Pad[-33500  0  -30110  0  1102  3000 1402 "13" "13"  0x00000100]
+	Pad[-33500  1968  -30110  1968  1102  3000 1402 "14" "14"  0x00000100]
+	Pad[-33500  3937  -30110  3937  1102  3000 1402 "15" "15"  0x00000100]
+	Pad[-33500  5905  -30110  5905  1102  3000 1402 "16" "16"  0x00000100]
+	Pad[-33500  7874  -30110  7874  1102  3000 1402 "17" "17"  0x00000100]
+	Pad[-33500  9842  -30110  9842  1102  3000 1402 "18" "18"  0x00000100]
+	Pad[-33500  11811  -30110  11811  1102  3000 1402 "19" "19"  0x00000100]
+	Pad[-33500  13779  -30110  13779  1102  3000 1402 "20" "20"  0x00000100]
+	Pad[-33500  15748  -30110  15748  1102  3000 1402 "21" "21"  0x00000100]
+	Pad[-33500  17716  -30110  17716  1102  3000 1402 "22" "22"  0x00000100]
+	Pad[-33500  19685  -30110  19685  1102  3000 1402 "23" "23"  0x00000100]
+	Pad[-33500  21653  -30110  21653  1102  3000 1402 "24" "24"  0x00000100]
+	Pad[-33500  23622  -30110  23622  1102  3000 1402 "25" "25"  0x00000100]
+	# bottom row
+	Pad[-23622 33500  -23622  30110  1102  3000 1402 "26" "26"  0x00000900]
+	Pad[-21654 33500  -21654  30110  1102  3000 1402 "27" "27"  0x00000900]
+	Pad[-19685 33500  -19685  30110  1102  3000 1402 "28" "28"  0x00000900]
+	Pad[-17717 33500  -17717  30110  1102  3000 1402 "29" "29"  0x00000900]
+	Pad[-15748 33500  -15748  30110  1102  3000 1402 "30" "30"  0x00000900]
+	Pad[-13780 33500  -13780  30110  1102  3000 1402 "31" "31"  0x00000900]
+	Pad[-11811 33500  -11811  30110  1102  3000 1402 "32" "32"  0x00000900]
+	Pad[-9843 33500  -9843  30110  1102  3000 1402 "33" "33"  0x00000900]
+	Pad[-7874 33500  -7874  30110  1102  3000 1402 "34" "34"  0x00000900]
+	Pad[-5906 33500  -5906  30110  1102  3000 1402 "35" "35"  0x00000900]
+	Pad[-3937 33500  -3937  30110  1102  3000 1402 "36" "36"  0x00000900]
+	Pad[-1969 33500  -1969  30110  1102  3000 1402 "37" "37"  0x00000900]
+	Pad[0 33500  0  30110  1102  3000 1402 "38" "38"  0x00000900]
+	Pad[1968 33500  1968  30110  1102  3000 1402 "39" "39"  0x00000900]
+	Pad[3937 33500  3937  30110  1102  3000 1402 "40" "40"  0x00000900]
+	Pad[5905 33500  5905  30110  1102  3000 1402 "41" "41"  0x00000900]
+	Pad[7874 33500  7874  30110  1102  3000 1402 "42" "42"  0x00000900]
+	Pad[9842 33500  9842  30110  1102  3000 1402 "43" "43"  0x00000900]
+	Pad[11811 33500  11811  30110  1102  3000 1402 "44" "44"  0x00000900]
+	Pad[13779 33500  13779  30110  1102  3000 1402 "45" "45"  0x00000900]
+	Pad[15748 33500  15748  30110  1102  3000 1402 "46" "46"  0x00000900]
+	Pad[17716 33500  17716  30110  1102  3000 1402 "47" "47"  0x00000900]
+	Pad[19685 33500  19685  30110  1102  3000 1402 "48" "48"  0x00000900]
+	Pad[21653 33500  21653  30110  1102  3000 1402 "49" "49"  0x00000900]
+	Pad[23622 33500  23622  30110  1102  3000 1402 "50" "50"  0x00000900]
+	# right row
+	Pad[33500  23622  30110  23622  1102  3000 1402 "51" "51"  0x00000100]
+	Pad[33500  21654  30110  21654  1102  3000 1402 "52" "52"  0x00000100]
+	Pad[33500  19685  30110  19685  1102  3000 1402 "53" "53"  0x00000100]
+	Pad[33500  17717  30110  17717  1102  3000 1402 "54" "54"  0x00000100]
+	Pad[33500  15748  30110  15748  1102  3000 1402 "55" "55"  0x00000100]
+	Pad[33500  13780  30110  13780  1102  3000 1402 "56" "56"  0x00000100]
+	Pad[33500  11811  30110  11811  1102  3000 1402 "57" "57"  0x00000100]
+	Pad[33500  9843  30110  9843  1102  3000 1402 "58" "58"  0x00000100]
+	Pad[33500  7874  30110  7874  1102  3000 1402 "59" "59"  0x00000100]
+	Pad[33500  5906  30110  5906  1102  3000 1402 "60" "60"  0x00000100]
+	Pad[33500  3937  30110  3937  1102  3000 1402 "61" "61"  0x00000100]
+	Pad[33500  1969  30110  1969  1102  3000 1402 "62" "62"  0x00000100]
+	Pad[33500  0  30110  0  1102  3000 1402 "63" "63"  0x00000100]
+	Pad[33500  -1968  30110  -1968  1102  3000 1402 "64" "64"  0x00000100]
+	Pad[33500  -3937  30110  -3937  1102  3000 1402 "65" "65"  0x00000100]
+	Pad[33500  -5905  30110  -5905  1102  3000 1402 "66" "66"  0x00000100]
+	Pad[33500  -7874  30110  -7874  1102  3000 1402 "67" "67"  0x00000100]
+	Pad[33500  -9842  30110  -9842  1102  3000 1402 "68" "68"  0x00000100]
+	Pad[33500  -11811  30110  -11811  1102  3000 1402 "69" "69"  0x00000100]
+	Pad[33500  -13779  30110  -13779  1102  3000 1402 "70" "70"  0x00000100]
+	Pad[33500  -15748  30110  -15748  1102  3000 1402 "71" "71"  0x00000100]
+	Pad[33500  -17716  30110  -17716  1102  3000 1402 "72" "72"  0x00000100]
+	Pad[33500  -19685  30110  -19685  1102  3000 1402 "73" "73"  0x00000100]
+	Pad[33500  -21653  30110  -21653  1102  3000 1402 "74" "74"  0x00000100]
+	Pad[33500  -23622  30110  -23622  1102  3000 1402 "75" "75"  0x00000100]
+	# top row
+	Pad[23622 -33500  23622  -30110  1102  3000 1402 "76" "76"  0x00000900]
+	Pad[21654 -33500  21654  -30110  1102  3000 1402 "77" "77"  0x00000900]
+	Pad[19685 -33500  19685  -30110  1102  3000 1402 "78" "78"  0x00000900]
+	Pad[17717 -33500  17717  -30110  1102  3000 1402 "79" "79"  0x00000900]
+	Pad[15748 -33500  15748  -30110  1102  3000 1402 "80" "80"  0x00000900]
+	Pad[13780 -33500  13780  -30110  1102  3000 1402 "81" "81"  0x00000900]
+	Pad[11811 -33500  11811  -30110  1102  3000 1402 "82" "82"  0x00000900]
+	Pad[9843 -33500  9843  -30110  1102  3000 1402 "83" "83"  0x00000900]
+	Pad[7874 -33500  7874  -30110  1102  3000 1402 "84" "84"  0x00000900]
+	Pad[5906 -33500  5906  -30110  1102  3000 1402 "85" "85"  0x00000900]
+	Pad[3937 -33500  3937  -30110  1102  3000 1402 "86" "86"  0x00000900]
+	Pad[1969 -33500  1969  -30110  1102  3000 1402 "87" "87"  0x00000900]
+	Pad[0 -33500  0  -30110  1102  3000 1402 "88" "88"  0x00000900]
+	Pad[-1968 -33500  -1968  -30110  1102  3000 1402 "89" "89"  0x00000900]
+	Pad[-3937 -33500  -3937  -30110  1102  3000 1402 "90" "90"  0x00000900]
+	Pad[-5905 -33500  -5905  -30110  1102  3000 1402 "91" "91"  0x00000900]
+	Pad[-7874 -33500  -7874  -30110  1102  3000 1402 "92" "92"  0x00000900]
+	Pad[-9842 -33500  -9842  -30110  1102  3000 1402 "93" "93"  0x00000900]
+	Pad[-11811 -33500  -11811  -30110  1102  3000 1402 "94" "94"  0x00000900]
+	Pad[-13779 -33500  -13779  -30110  1102  3000 1402 "95" "95"  0x00000900]
+	Pad[-15748 -33500  -15748  -30110  1102  3000 1402 "96" "96"  0x00000900]
+	Pad[-17716 -33500  -17716  -30110  1102  3000 1402 "97" "97"  0x00000900]
+	Pad[-19685 -33500  -19685  -30110  1102  3000 1402 "98" "98"  0x00000900]
+	Pad[-21653 -33500  -21653  -30110  1102  3000 1402 "99" "99"  0x00000900]
+	Pad[-23622 -33500  -23622  -30110  1102  3000 1402 "100" "100"  0x00000900]
+	# exposed paddle (if this is an exposed paddle part) 
+	# top
+	ElementLine[-24259 -27159 27159 -27159 800]
+	# right
+	ElementLine[27159 -27159 27159 27159 800]
+	# bottom
+	ElementLine[27159 27159 -27159 27159 800]
+	# left
+	ElementLine[-27159 27159 -27159 -24259 800]
+	# angled corner
+	ElementLine[-27159 -24259 -24259 -27159 800]
+	ElementArc[-24259 -24259 1000 1000 0 360 800]
+)

+ 8 - 8
lib/SCSI2SD/hardware/symbols/wurth-microsd.fp

@@ -1,14 +1,14 @@
 
 Element["" "" "" "" 58000 53000 0 0 0 100 ""]
 (
-	Pad[-7555 -17555 -7555 -14799 3150 1200 3750 "1" "1" "square"]
-	Pad[-3224 -15980 -3224 -13224 3150 1200 3750 "2" "2" "square"]
-	Pad[1106 -17555 1106 -14799 3150 1200 3750 "3" "3" "square"]
-	Pad[5437 -18343 5437 -15587 3150 1200 3750 "4" "4" "square"]
-	Pad[9768 -17555 9768 -14799 3150 1200 3750 "5" "5" "square"]
-	Pad[14098 -18343 14098 -15587 3150 1200 3750 "6" "6" "square"]
-	Pad[18429 -17555 18429 -14799 3150 1200 3750 "7" "7" "square"]
-	Pad[22760 -17555 22760 -14799 3150 1200 3750 "8" "8" "square"]
+	Pad[-7555 -19299 -7555 -14799 3150 1200 3750 "1" "1" "square"]
+	Pad[-3224 -17724 -3224 -13224 3150 1200 3750 "2" "2" "square"]
+	Pad[1106 -19299 1106 -14799 3150 1200 3750 "3" "3" "square"]
+	Pad[5437 -20087 5437 -15587 3150 1200 3750 "4" "4" "square"]
+	Pad[9768 -19299 9768 -14799 3150 1200 3750 "5" "5" "square"]
+	Pad[14098 -20087 14098 -15587 3150 1200 3750 "6" "6" "square"]
+	Pad[18429 -19299 18429 -14799 3150 1200 3750 "7" "7" "square"]
+	Pad[22760 -19299 22760 -14799 3150 1200 3750 "8" "8" "square"]
 	Pad[25909 -28185 25909 -26217 5512 1200 6112 "9" "9" "square"]
 	Pad[18035 24571 19610 24571 5512 1200 6112 "10" "10" "square,edge2"]
 	Pad[-4406 24571 -2831 24571 5512 1200 6112 "10" "10" "square"]

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