# This is the template file for creating symbols with tragesym # every line starting with '#' is a comment line. [options] # wordswap swaps labels if the pin is on the right side an looks like this: # "PB1 (CLK)". That's useful for micro controller port labels # rotate_labels rotates the pintext of top and bottom pins # this is useful for large symbols like FPGAs with more than 100 pins # sort_labels will sort the pins by it's labels # useful for address ports, busses, ... wordswap=yes rotate_labels=yes sort_labels=no generate_pinseq=yes sym_width=1000 pinwidthvertical=400 pinwidthhorizontal=400 [geda_attr] # name will be printed in the top of the symbol # name is only some graphical text, not an attribute # version specifies a gschem version. # if you have a device with slots, you'll have to use slot= and slotdef= # use comment= if there are special information you want to add version=20060113 1 name=7406 device=7406 refdes=U? footprint=SO14 description=Hex Inverter (Open Drain) documentation=http://www.nxp.com/products/logic/buffers_inverters_drivers/N74F06D.html author=Michael McMaster dist-license=gpl3+ use-license=gpl3+ numslots=0 #slot=1 #slotdef=1: #slotdef=2: #slotdef=3: #slotdef=4: #comment= #comment= #comment= [pins] # tabseparated list of pin descriptions # ---------------------------------------- # pinnr is the physical number of the pin # seq is the pinseq= attribute, leave it blank if it doesn't matter # type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr) # style can be (line,dot,clk,dotclk,spacer,none). none if only want to add a net # posit. can be (l,r,t,b) or empty for nets. # net specifies the name of the net. Vcc or GND for example. # label represents the pinlabel. # negation lines can be added with "\_" example: \_enable\_ # if you want to write a "\" use "\\" as escape sequence #----------------------------------------------------- #pinnr seq type style posit. net label #----------------------------------------------------- 1 in line l A0 2 out line l \_Y0\_ 3 in line l A1 4 out line l \_Y1\_ 5 in line l A2 6 out line l \_Y2\_ 7 pwr line l GND GND 14 pwr line r Vcc 13 in line r A5 12 out line r \_Y5\_ 11 in line r A4 10 out line r \_Y4\_ 9 in line r A3 8 out line r \_Y3\_