rp2040_sdio.pio 6.2 KB

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  1. ; ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
  2. ;
  3. ; ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
  4. ;
  5. ; https://www.gnu.org/licenses/gpl-3.0.html
  6. ; ----
  7. ; This program is free software: you can redistribute it and/or modify
  8. ; it under the terms of the GNU General Public License as published by
  9. ; the Free Software Foundation, either version 3 of the License, or
  10. ; (at your option) any later version. 
  11. ;
  12. ; This program is distributed in the hope that it will be useful,
  13. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15. ; GNU General Public License for more details. 
  16. ;
  17. ; You should have received a copy of the GNU General Public License
  18. ; along with this program.  If not, see <https://www.gnu.org/licenses/>.; RP2040 PIO program for implementing SD card access in SDIO mode
  19. ; Run "pioasm rp2040_sdio.pio rp2040_sdio.pio.h" to regenerate the C header from this.
  20. ; The RP2040 official work-in-progress code at
  21. ; https://github.com/raspberrypi/pico-extras/tree/master/src/rp2_common/pico_sd_card
  22. ; may be useful reference, but this is independent implementation.
  23. ;
  24. ; For official SDIO specifications, refer to:
  25. ; https://www.sdcard.org/downloads/pls/
  26. ; "SDIO Physical Layer Simplified Specification Version 8.00"
  27. ; Clock settings
  28. ; For 3.3V communication the available speeds are:
  29. ; - Default speed: max. 25 MHz clock
  30. ; - High speed: max. 50 MHz clock
  31. ;
  32. ; From the default RP2040 clock speed of 125 MHz, the closest dividers
  33. ; are 3 for 41.7 MHz and 5 for 25 MHz. The CPU can apply further divider
  34. ; through state machine registers for the initial handshake.
  35. ;
  36. ; Because data is written on the falling edge and read on the rising
  37. ; edge, it is preferrable to have a long 0 state and short 1 state.
  38. ;.define CLKDIV 3
  39. .define CLKDIV 5
  40. .define D0 ((CLKDIV + 1) / 2 - 1)
  41. .define D1 (CLKDIV/2 - 1)
  42. .define SDIO_CLK_GPIO 10
  43. ; State machine 0 is used to:
  44. ; - generate continuous clock on SDIO_CLK
  45. ; - send CMD packets
  46. ; - receive response packets
  47. ;
  48. ; Pin mapping for this state machine:
  49. ; - Sideset : CLK
  50. ; - IN/OUT/SET : CMD
  51. ; - JMP_PIN : CMD
  52. ;
  53. ; The commands to send are put on TX fifo and must have two words:
  54. ; Word 0 bits 31-24: Number of bits in command minus one (usually 47)
  55. ; Word 0 bits 23-00: First 24 bits of the command packet, shifted out MSB first
  56. ; Word 1 bits 31-08: Last 24 bits of the command packet, shifted out MSB first
  57. ; Word 1 bits 07-00: Number of bits in response minus one (usually 47), or 0 if no response
  58. ;
  59. ; The response is put on RX fifo, starting with the MSB.
  60. ; Partial last word will be padded with zero bits at the top.
  61. ;
  62. ; The state machine EXECCTRL should be set so that STATUS indicates TX FIFO < 2
  63. ; and that AUTOPULL and AUTOPUSH are enabled.
  64. .program sdio_cmd_clk
  65. .side_set 1
  66. mov OSR, NULL side 1 [D1] ; Make sure OSR is full of zeros to prevent autopull
  67. wait_cmd:
  68. mov Y, !STATUS side 0 [D0] ; Check if TX FIFO has data
  69. jmp !Y wait_cmd side 1 [D1]
  70. load_cmd:
  71. out NULL, 32 side 0 [D0] ; Load first word (trigger autopull)
  72. out X, 8 side 1 [D1] ; Number of bits to send
  73. set pins, 1 side 0 [D0] ; Initial state of CMD is high
  74. set pindirs, 1 side 1 [D1] ; Set SDIO_CMD as output
  75. send_cmd:
  76. out pins, 1 side 0 [D0] ; Write output on falling edge of CLK
  77. jmp X-- send_cmd side 1 [D1]
  78. prep_resp:
  79. set pindirs, 0 side 0 [D0] ; Set SDIO_CMD as input
  80. out X, 8 side 1 [D1] ; Get number of bits in response
  81. nop side 0 [D0] ; For clock alignment
  82. jmp !X resp_done side 1 [D1] ; Check if we expect a response
  83. wait_resp:
  84. nop side 0 [D0]
  85. jmp PIN wait_resp side 1 [D1] ; Loop until SDIO_CMD = 0
  86. ; Note: input bits are read at the same time as we write CLK=0.
  87. ; Because the host controls the clock, the read happens before
  88. ; the card sees the falling clock edge. This gives maximum time
  89. ; for the data bit to settle.
  90. read_resp:
  91. in PINS, 1 side 0 [D0] ; Read input data bit
  92. jmp X-- read_resp side 1 [D1] ; Loop to receive all data bits
  93. resp_done:
  94. push side 0 [D0] ; Push the remaining part of response
  95. ; State machine 1 is used to send and receive data blocks.
  96. ; Pin mapping for this state machine:
  97. ; - IN / OUT: SDIO_D0-D3
  98. ; - GPIO defined at beginning of this file: SDIO_CLK
  99. ; Data reception program
  100. ; This program will wait for initial start of block token and then
  101. ; receive a data block. The application must set number of nibbles
  102. ; to receive minus 1 to Y register before running this program.
  103. .program sdio_data_rx
  104. wait_start:
  105. mov X, Y ; Reinitialize number of nibbles to receive
  106. wait 0 pin 0 ; Wait for zero state on D0
  107. wait 1 gpio SDIO_CLK_GPIO [CLKDIV-1] ; Wait for rising edge and then whole clock cycle
  108. rx_data:
  109. in PINS, 4 [CLKDIV-2] ; Read nibble
  110. jmp X--, rx_data
  111. ; Data transmission program
  112. ;
  113. ; Before running this program, pindirs should be set as output
  114. ; and register X should be initialized with the number of nibbles
  115. ; to send minus 1 (typically 8 + 1024 + 16 + 1 - 1 = 1048)
  116. ; and register Y with the number of response bits minus 1 (typically 31).
  117. ;
  118. ; Words written to TX FIFO must be:
  119. ; - Word 0: start token 0xFFFFFFF0
  120. ; - Word 1-128: transmitted data (512 bytes)
  121. ; - Word 129-130: CRC checksum
  122. ; - Word 131: end token 0xFFFFFFFF
  123. ;
  124. ; After the card reports idle status, RX FIFO will get a word that
  125. ; contains the D0 line response from card.
  126. .program sdio_data_tx
  127. wait 0 gpio SDIO_CLK_GPIO
  128. wait 1 gpio SDIO_CLK_GPIO [CLKDIV + D1 - 1]; Synchronize so that write occurs on falling edge
  129. tx_loop:
  130. out PINS, 4 [D0] ; Write nibble and wait for whole clock cycle
  131. jmp X-- tx_loop [D1]
  132. set pindirs, 0x00 [D0] ; Set data bus as input
  133. .wrap_target
  134. response_loop:
  135. in PINS, 1 [D1] ; Read D0 on rising edge
  136. jmp Y--, response_loop [D0]
  137. wait_idle:
  138. wait 1 pin 0 [D1] ; Wait for card to indicate idle condition
  139. push [D0] ; Push the response token
  140. .wrap