ZuluSCSI_platform.cpp 31 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version. 
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details. 
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "ZuluSCSI_platform.h"
  22. #include "gd32f20x_sdio.h"
  23. #include "gd32f20x_fmc.h"
  24. #include "gd32f20x_fwdgt.h"
  25. #include "ZuluSCSI_log.h"
  26. #include "ZuluSCSI_config.h"
  27. #include "usbd_conf.h"
  28. #include "usb_serial.h"
  29. #include "greenpak.h"
  30. #include <SdFat.h>
  31. #include <scsi.h>
  32. #include <assert.h>
  33. #include <audio.h>
  34. #include <ZuluSCSI_audio.h>
  35. extern SdFs SD;
  36. extern bool g_rawdrive_active;
  37. extern "C" {
  38. const char *g_platform_name = PLATFORM_NAME;
  39. static bool g_enable_apple_quirks = false;
  40. bool g_direct_mode = false;
  41. ZuluSCSIVersion_t g_zuluscsi_version = ZSVersion_unknown;
  42. bool g_moved_select_in = false;
  43. static bool g_led_blinking = false;
  44. // hw_config.cpp c functions
  45. #include "platform_hw_config.h"
  46. // usb_log_poll() is called through function pointer to
  47. // avoid including USB in SD card bootloader.
  48. static void (*g_usb_log_poll_func)(void);
  49. static void usb_log_poll();
  50. /*************************/
  51. /* Timing functions */
  52. /*************************/
  53. static volatile uint32_t g_millisecond_counter;
  54. static volatile uint32_t g_watchdog_timeout;
  55. static uint32_t g_ns_to_cycles; // Q0.32 fixed point format
  56. static void watchdog_handler(uint32_t *sp);
  57. unsigned long millis()
  58. {
  59. return g_millisecond_counter;
  60. }
  61. void delay(unsigned long ms)
  62. {
  63. uint32_t start = g_millisecond_counter;
  64. while ((uint32_t)(g_millisecond_counter - start) < ms);
  65. }
  66. void delay_ns(unsigned long ns)
  67. {
  68. uint32_t CNT_start = DWT->CYCCNT;
  69. if (ns <= 100) return; // Approximate call overhead
  70. ns -= 100;
  71. uint32_t cycles = ((uint64_t)ns * g_ns_to_cycles) >> 32;
  72. while ((uint32_t)(DWT->CYCCNT - CNT_start) < cycles);
  73. }
  74. void SysTick_Handler_inner(uint32_t *sp)
  75. {
  76. g_millisecond_counter++;
  77. if (g_watchdog_timeout > 0)
  78. {
  79. g_watchdog_timeout--;
  80. const uint32_t busreset_time = WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT;
  81. if (g_watchdog_timeout <= busreset_time)
  82. {
  83. if (!scsiDev.resetFlag)
  84. {
  85. logmsg("WATCHDOG TIMEOUT at PC ", sp[6], " LR ", sp[5], " attempting bus reset");
  86. scsiDev.resetFlag = 1;
  87. }
  88. if (g_watchdog_timeout == 0)
  89. {
  90. watchdog_handler(sp);
  91. }
  92. }
  93. }
  94. }
  95. __attribute__((interrupt, naked))
  96. void SysTick_Handler(void)
  97. {
  98. // Take note of stack pointer so that we can print debug
  99. // info in watchdog handler.
  100. asm("mrs r0, msp\n"
  101. "b SysTick_Handler_inner": : : "r0");
  102. }
  103. // This function is called by scsiPhy.cpp.
  104. // It resets the systick counter to give 1 millisecond of uninterrupted transfer time.
  105. // The total number of skips is kept track of to keep the correct time on average.
  106. void SysTick_Handle_PreEmptively()
  107. {
  108. static int skipped_clocks = 0;
  109. __disable_irq();
  110. uint32_t loadval = SysTick->LOAD;
  111. skipped_clocks += loadval - SysTick->VAL;
  112. SysTick->VAL = 0;
  113. if (skipped_clocks > loadval)
  114. {
  115. // We have skipped enough ticks that it is time to fake a call
  116. // to SysTick interrupt handler.
  117. skipped_clocks -= loadval;
  118. uint32_t stack_frame[8] = {0};
  119. stack_frame[6] = (uint32_t)__builtin_return_address(0);
  120. SysTick_Handler_inner(stack_frame);
  121. }
  122. __enable_irq();
  123. }
  124. uint32_t platform_sys_clock_in_hz()
  125. {
  126. return rcu_clock_freq_get(CK_SYS);
  127. }
  128. /***************/
  129. /* GPIO init */
  130. /***************/
  131. #ifdef PLATFORM_VERSION_1_1_PLUS
  132. static void init_audio_gpio()
  133. {
  134. gpio_pin_remap1_config(GPIO_PCF5, GPIO_PCF5_SPI1_IO_REMAP1, ENABLE);
  135. gpio_pin_remap1_config(GPIO_PCF5, GPIO_PCF5_SPI1_NSCK_REMAP1, ENABLE);
  136. gpio_pin_remap1_config(GPIO_PCF4, GPIO_PCF4_SPI1_SCK_PD3_REMAP, ENABLE);
  137. gpio_init(I2S_CK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, I2S_CK_PIN);
  138. gpio_init(I2S_SD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, I2S_SD_PIN);
  139. gpio_init(I2S_WS_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, I2S_WS_PIN);
  140. }
  141. #endif
  142. // Method of determining whichi scsi board is being used
  143. static ZuluSCSIVersion_t get_zuluscsi_version()
  144. {
  145. #ifdef DIGITAL_VERSION_DETECT_PORT
  146. bool pull_down;
  147. bool pull_up;
  148. gpio_init(DIGITAL_VERSION_DETECT_PORT, GPIO_MODE_IPU, 0, DIGITAL_VERSION_DETECT_PIN);
  149. delay_us(10);
  150. pull_up = SET == gpio_input_bit_get(DIGITAL_VERSION_DETECT_PORT, DIGITAL_VERSION_DETECT_PIN);
  151. gpio_init(DIGITAL_VERSION_DETECT_PORT, GPIO_MODE_IPD, 0, DIGITAL_VERSION_DETECT_PIN);
  152. delay_us(10);
  153. pull_down = RESET == gpio_input_bit_get(DIGITAL_VERSION_DETECT_PORT, DIGITAL_VERSION_DETECT_PIN);
  154. if (pull_up && pull_down)
  155. return ZSVersion_v1_1;
  156. if (pull_down && !pull_up)
  157. return ZSVersion_v1_1_ODE;
  158. if (pull_up && !pull_down)
  159. {
  160. return ZSVersion_v1_2;
  161. }
  162. #endif // DIGITAL_DETECT_VERSION
  163. return ZSVersion_unknown;
  164. }
  165. // Initialize SPI and GPIO configuration
  166. // Clock has already been initialized by system_gd32f20x.c
  167. void platform_init()
  168. {
  169. SystemCoreClockUpdate();
  170. // Enable SysTick to drive millis()
  171. g_millisecond_counter = 0;
  172. SysTick_Config(SystemCoreClock / 1000U);
  173. NVIC_SetPriority(SysTick_IRQn, 0x00U);
  174. // Enable DWT counter to drive delay_ns()
  175. g_ns_to_cycles = ((uint64_t)SystemCoreClock << 32) / 1000000000;
  176. CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
  177. DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
  178. // Enable debug output on SWO pin
  179. DBG_CTL |= DBG_CTL_TRACE_IOEN;
  180. if (TPI->ACPR == 0)
  181. {
  182. CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
  183. TPI->ACPR = SystemCoreClock / 2000000 - 1; // 2 Mbps baudrate for SWO
  184. // TPI->ACPR = SystemCoreClock / 30000000 - 1; // 30 Mbps baudrate for SWO
  185. TPI->SPPR = 2;
  186. TPI->FFCR = 0x100; // TPIU packet framing disabled
  187. // DWT->CTRL |= (1 << DWT_CTRL_EXCTRCENA_Pos);
  188. // DWT->CTRL |= (1 << DWT_CTRL_CYCTAP_Pos)
  189. // | (15 << DWT_CTRL_POSTPRESET_Pos)
  190. // | (1 << DWT_CTRL_PCSAMPLENA_Pos)
  191. // | (3 << DWT_CTRL_SYNCTAP_Pos)
  192. // | (1 << DWT_CTRL_CYCCNTENA_Pos);
  193. ITM->LAR = 0xC5ACCE55;
  194. ITM->TCR = (1 << ITM_TCR_DWTENA_Pos)
  195. | (1 << ITM_TCR_SYNCENA_Pos)
  196. | (1 << ITM_TCR_ITMENA_Pos);
  197. ITM->TER = 0xFFFFFFFF; // Enable all stimulus ports
  198. }
  199. // Enable needed clocks for GPIO
  200. rcu_periph_clock_enable(RCU_AF);
  201. rcu_periph_clock_enable(RCU_GPIOA);
  202. rcu_periph_clock_enable(RCU_GPIOB);
  203. rcu_periph_clock_enable(RCU_GPIOC);
  204. rcu_periph_clock_enable(RCU_GPIOD);
  205. rcu_periph_clock_enable(RCU_GPIOE);
  206. // Switch to SWD debug port (disable JTAG) to release PB4 as GPIO
  207. gpio_pin_remap_config(GPIO_SWJ_SWDPENABLE_REMAP, ENABLE);
  208. // SCSI pins.
  209. // Initialize open drain outputs to high.
  210. SCSI_RELEASE_OUTPUTS();
  211. // determine the ZulusSCSI board version
  212. g_zuluscsi_version = get_zuluscsi_version();
  213. g_moved_select_in = g_zuluscsi_version == ZSVersion_v1_1_ODE || g_zuluscsi_version == ZSVersion_v1_2;
  214. // Init SCSI pins GPIOs
  215. gpio_init(SCSI_OUT_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_DATA_MASK | SCSI_OUT_REQ);
  216. gpio_init(SCSI_OUT_IO_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_IO_PIN);
  217. gpio_init(SCSI_OUT_CD_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_CD_PIN);
  218. gpio_init(SCSI_OUT_SEL_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_SEL_PIN);
  219. gpio_init(SCSI_OUT_MSG_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_MSG_PIN);
  220. gpio_init(SCSI_OUT_RST_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_RST_PIN);
  221. gpio_init(SCSI_OUT_BSY_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_BSY_PIN);
  222. gpio_init(SCSI_IN_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_IN_MASK);
  223. gpio_init(SCSI_ATN_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ATN_PIN);
  224. gpio_init(SCSI_BSY_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_BSY_PIN);
  225. gpio_init(SCSI_ACK_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ACK_PIN);
  226. gpio_init(SCSI_RST_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_RST_PIN);
  227. // Terminator enable
  228. gpio_bit_set(SCSI_TERM_EN_PORT, SCSI_TERM_EN_PIN);
  229. gpio_init(SCSI_TERM_EN_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, SCSI_TERM_EN_PIN);
  230. #ifndef SD_USE_SDIO
  231. // SD card pins using SPI
  232. gpio_init(SD_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SD_CS_PIN);
  233. gpio_init(SD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_CLK_PIN);
  234. gpio_init(SD_PORT, GPIO_MODE_IPU, 0, SD_MISO_PIN);
  235. gpio_init(SD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_MOSI_PIN);
  236. #else
  237. // SD card pins using SDIO
  238. gpio_init(SD_SDIO_DATA_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_SDIO_D0 | SD_SDIO_D1 | SD_SDIO_D2 | SD_SDIO_D3);
  239. gpio_init(SD_SDIO_CLK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_SDIO_CLK);
  240. gpio_init(SD_SDIO_CMD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_SDIO_CMD);
  241. #endif
  242. #ifdef PLATFORM_VERSION_1_1_PLUS
  243. if (g_zuluscsi_version == ZSVersion_v1_1)
  244. {
  245. // SCSI Select
  246. gpio_init(SCSI_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_SEL_PIN);
  247. // DIP switches
  248. gpio_init(DIP_PORT, GPIO_MODE_IPD, 0, DIPSW1_PIN | DIPSW2_PIN | DIPSW3_PIN);
  249. gpio_init(EJECT_1_PORT, GPIO_MODE_IPU, 0, EJECT_1_PIN);
  250. gpio_init(EJECT_2_PORT, GPIO_MODE_IPU, 0, EJECT_2_PIN);
  251. }
  252. else if (g_zuluscsi_version == ZSVersion_v1_1_ODE)
  253. {
  254. // SCSI Select
  255. gpio_init(SCSI_ODE_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ODE_SEL_PIN);
  256. // DIP switches
  257. gpio_init(ODE_DIP_PORT, GPIO_MODE_IPD, 0, ODE_DIPSW1_PIN | ODE_DIPSW2_PIN | ODE_DIPSW3_PIN);
  258. // Buttons
  259. gpio_init(EJECT_BTN_PORT, GPIO_MODE_IPU, 0, EJECT_BTN_PIN);
  260. gpio_init(USER_BTN_PORT, GPIO_MODE_IPU, 0, USER_BTN_PIN);
  261. init_audio_gpio();
  262. g_audio_enabled = true;
  263. }
  264. else if (g_zuluscsi_version == ZSVersion_v1_2)
  265. {
  266. // SCSI Select
  267. gpio_init(SCSI_ODE_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ODE_SEL_PIN);
  268. // General settings DIP switch
  269. gpio_init(V1_2_DIPSW_TERM_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_TERM_PIN);
  270. gpio_init(V1_2_DIPSW_DBG_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_DBG_PIN);
  271. gpio_init(V1_2_DIPSW_QUIRKS_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_QUIRKS_PIN);
  272. // Direct/Raw Mode Select
  273. gpio_init(V1_2_DIPSW_DIRECT_MODE_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_DIRECT_MODE_PIN);
  274. // SCSI ID dip switch
  275. gpio_init(DIPSW_SCSI_ID_BIT_PORT, GPIO_MODE_IPD, 0, DIPSW_SCSI_ID_BIT_PINS);
  276. // Device select BCD rotary DIP switch
  277. gpio_init(DIPROT_DEVICE_SEL_BIT_PORT, GPIO_MODE_IPD, 0, DIPROT_DEVICE_SEL_BIT_PINS);
  278. // Buttons
  279. gpio_init(EJECT_BTN_PORT, GPIO_MODE_IPU, 0, EJECT_BTN_PIN);
  280. gpio_init(USER_BTN_PORT, GPIO_MODE_IPU, 0, USER_BTN_PIN);
  281. LED_EJECT_OFF();
  282. gpio_init(LED_EJECT_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, LED_EJECT_PIN);
  283. }
  284. #else
  285. // SCSI Select
  286. gpio_init(SCSI_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_SEL_PIN);
  287. // DIP switches
  288. gpio_init(DIP_PORT, GPIO_MODE_IPD, 0, DIPSW1_PIN | DIPSW2_PIN | DIPSW3_PIN);
  289. // Ejection buttons
  290. gpio_init(EJECT_1_PORT, GPIO_MODE_IPU, 0, EJECT_1_PIN);
  291. gpio_init(EJECT_2_PORT, GPIO_MODE_IPU, 0, EJECT_2_PIN);
  292. #endif // PLATFORM_VERSION_1_1_PLUS
  293. // LED pins
  294. gpio_bit_set(LED_PORT, LED_PINS);
  295. gpio_init(LED_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, LED_PINS);
  296. // SWO trace pin on PB3
  297. gpio_init(GPIOB, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_3);
  298. }
  299. static void set_termination(uint32_t port, uint32_t pin, const char *switch_name)
  300. {
  301. if (gpio_input_bit_get(port, pin))
  302. {
  303. logmsg(switch_name, " is ON: Enabling SCSI termination");
  304. gpio_bit_reset(SCSI_TERM_EN_PORT, SCSI_TERM_EN_PIN);
  305. }
  306. else
  307. {
  308. logmsg(switch_name, " is OFF: Disabling SCSI termination");
  309. }
  310. }
  311. static bool get_debug(uint32_t port, uint32_t pin, const char *switch_name)
  312. {
  313. if (gpio_input_bit_get(port, pin))
  314. {
  315. logmsg(switch_name, " is ON: Enabling debug messages");
  316. return true;
  317. }
  318. logmsg(switch_name, " is OFF: Disabling debug messages");
  319. return false;
  320. }
  321. static bool get_quirks(uint32_t port, uint32_t pin, const char *switch_name)
  322. {
  323. if (gpio_input_bit_get(port, pin))
  324. {
  325. logmsg(switch_name, " is ON: Enabling Apple quirks by default");
  326. return true;
  327. }
  328. logmsg(switch_name, " is OFF: Disabling Apple quirks mode by default");
  329. return false;
  330. }
  331. #ifdef PLATFORM_VERSION_1_1_PLUS
  332. static bool get_direct_mode(uint32_t port, uint32_t pin, const char *switch_name)
  333. {
  334. if (!gpio_input_bit_get(port, pin))
  335. {
  336. logmsg(switch_name, " is OFF: Enabling direct/raw mode");
  337. return true;
  338. }
  339. logmsg(switch_name, " is ON: Disabling direct/raw mode");
  340. return false;
  341. }
  342. #endif
  343. void platform_late_init()
  344. {
  345. // Initialize usb for CDC serial output
  346. usb_serial_init();
  347. g_usb_log_poll_func = &usb_log_poll;
  348. logmsg("Platform: ", g_platform_name);
  349. logmsg("FW Version: ", g_log_firmwareversion);
  350. #ifdef PLATFORM_VERSION_1_1_PLUS
  351. if (ZSVersion_v1_1 == g_zuluscsi_version)
  352. {
  353. logmsg("Board Version: ZuluSCSI v1.1 Standard Edition");
  354. set_termination(DIP_PORT, DIPSW3_PIN, "DIPSW3");
  355. g_log_debug = get_debug(DIP_PORT, DIPSW2_PIN, "DIPSW2");
  356. g_enable_apple_quirks = get_quirks(DIP_PORT, DIPSW1_PIN, "DIPSW1");
  357. greenpak_load_firmware();
  358. }
  359. else if (ZSVersion_v1_1_ODE == g_zuluscsi_version)
  360. {
  361. logmsg("Board Version: ZuluSCSI v1.1 ODE");
  362. logmsg("ODE - Optical Drive Emulator");
  363. set_termination(ODE_DIP_PORT, ODE_DIPSW3_PIN, "DIPSW3");
  364. g_log_debug = get_debug(ODE_DIP_PORT, ODE_DIPSW2_PIN, "DIPSW2");
  365. g_enable_apple_quirks = get_quirks(ODE_DIP_PORT, ODE_DIPSW1_PIN, "DIPSW1");
  366. audio_setup();
  367. }
  368. else if (ZSVersion_v1_2 == g_zuluscsi_version)
  369. {
  370. logmsg("Board Version: ZuluSCSI v1.2");
  371. hw_config_init_gpios();
  372. set_termination(V1_2_DIPSW_TERM_PORT, V1_2_DIPSW_TERM_PIN, "DIPSW4");
  373. g_log_debug = get_debug(V1_2_DIPSW_DBG_PORT, V1_2_DIPSW_DBG_PIN, "DIPSW3");
  374. g_direct_mode = get_direct_mode(V1_2_DIPSW_DIRECT_MODE_PORT, V1_2_DIPSW_DIRECT_MODE_PIN, "DIPSW2");
  375. g_enable_apple_quirks = get_quirks(V1_2_DIPSW_QUIRKS_PORT, V1_2_DIPSW_QUIRKS_PIN, "DIPSW1");
  376. hw_config_init_state(g_direct_mode);
  377. }
  378. #else // PLATFORM_VERSION_1_1_PLUS - ZuluSCSI v1.0 and v1.0 minis gpio config
  379. #ifdef ZULUSCSI_V1_0_mini
  380. logmsg("SCSI termination is always on");
  381. #elif defined(ZULUSCSI_V1_0)
  382. set_termination(DIP_PORT, DIPSW3_PIN, "DIPSW3");
  383. g_log_debug = get_debug(DIP_PORT, DIPSW2_PIN, "DIPSW2");
  384. g_enable_apple_quirks = get_quirks(DIP_PORT, DIPSW1_PIN, "DIPSW1");
  385. #endif // ZULUSCSI_V1_0_mini
  386. #endif // PLATFORM_VERSION_1_1_PLUS
  387. }
  388. void platform_post_sd_card_init()
  389. {
  390. #ifdef PLATFORM_VERSION_1_1_PLUS
  391. if (ZSVersion_v1_2 == g_zuluscsi_version && g_scsi_settings.getSystem()->enableCDAudio)
  392. {
  393. logmsg("Audio enabled - an external audio DAC is required on the I2S expansion header");
  394. init_audio_gpio();
  395. g_audio_enabled = true;
  396. audio_setup();
  397. }
  398. #endif
  399. }
  400. void platform_write_led(bool state)
  401. {
  402. if (g_led_blinking) return;
  403. if (state)
  404. gpio_bit_reset(LED_PORT, LED_PINS);
  405. else
  406. gpio_bit_set(LED_PORT, LED_PINS);
  407. }
  408. void platform_set_blink_status(bool status)
  409. {
  410. g_led_blinking = status;
  411. }
  412. void platform_write_led_override(bool state)
  413. {
  414. if (state)
  415. gpio_bit_reset(LED_PORT, LED_PINS);
  416. else
  417. gpio_bit_set(LED_PORT, LED_PINS);
  418. }
  419. void platform_disable_led(void)
  420. {
  421. gpio_init(LED_PORT, GPIO_MODE_IPU, 0, LED_PINS);
  422. logmsg("Disabling status LED");
  423. }
  424. /*****************************************/
  425. /* Supply voltage monitor */
  426. /*****************************************/
  427. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  428. // This works by sampling the Vrefint, which has
  429. // a voltage of 1.2 V, allowing to calculate the VDD voltage.
  430. static void adc_poll()
  431. {
  432. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  433. static bool initialized = false;
  434. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  435. if (!initialized)
  436. {
  437. rcu_periph_clock_enable(RCU_ADC0);
  438. adc_enable(ADC0);
  439. adc_calibration_enable(ADC0);
  440. adc_tempsensor_vrefint_enable();
  441. adc_inserted_channel_config(ADC0, 0, ADC_CHANNEL_17, ADC_SAMPLETIME_239POINT5);
  442. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC0_1_2_EXTTRIG_INSERTED_NONE);
  443. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  444. adc_software_trigger_enable(ADC0, ADC_INSERTED_CHANNEL);
  445. initialized = true;
  446. }
  447. // Read previous result and start new one
  448. int adc_value = ADC_IDATA0(ADC0);
  449. adc_software_trigger_enable(ADC0, ADC_INSERTED_CHANNEL);
  450. // adc_value = 1200mV * 4096 / Vdd
  451. // => Vdd = 1200mV * 4096 / adc_value
  452. // To avoid wasting time on division, compare against
  453. // limit directly.
  454. const int limit = (1200 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  455. if (adc_value > limit)
  456. {
  457. // Warn once, and then again if we detect even a lower drop.
  458. int vdd_mV = (1200 * 4096) / adc_value;
  459. if (vdd_mV < lowest_vdd_seen)
  460. {
  461. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  462. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  463. }
  464. }
  465. #endif
  466. }
  467. /*****************************************/
  468. /* Debug logging and watchdog */
  469. /*****************************************/
  470. // Send log data to USB UART if USB is connected.
  471. // Data is retrieved from the shared log ring buffer and
  472. // this function sends as much as fits in USB CDC buffer.
  473. static void usb_log_poll()
  474. {
  475. static uint32_t logpos = 0;
  476. if (usb_serial_ready())
  477. {
  478. // Retrieve pointer to log start and determine number of bytes available.
  479. uint32_t available = 0;
  480. const char *data = log_get_buffer(&logpos, &available);
  481. // Limit to CDC packet size
  482. uint32_t len = available;
  483. if (len == 0) return;
  484. if (len > USB_CDC_DATA_PACKET_SIZE) len = USB_CDC_DATA_PACKET_SIZE;
  485. // Update log position by the actual number of bytes sent
  486. // If USB CDC buffer is full, this may be 0
  487. usb_serial_send((uint8_t*)data, len);
  488. logpos -= available - len;
  489. }
  490. }
  491. /*****************************************/
  492. /* Crash handlers */
  493. /*****************************************/
  494. // Writes log data to the PB3 SWO pin
  495. void platform_log(const char *s)
  496. {
  497. while (*s)
  498. {
  499. // Write to SWO pin
  500. while (ITM->PORT[0].u32 == 0);
  501. ITM->PORT[0].u8 = *s++;
  502. }
  503. }
  504. void platform_emergency_log_save()
  505. {
  506. if (g_rawdrive_active)
  507. return;
  508. #ifdef ZULUSCSI_HARDWARE_CONFIG
  509. if (g_hw_config.is_active())
  510. return;
  511. #endif
  512. platform_set_sd_callback(NULL, NULL);
  513. SD.begin(SD_CONFIG_CRASH);
  514. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  515. if (!crashfile.isOpen())
  516. {
  517. // Try to reinitialize
  518. int max_retry = 10;
  519. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  520. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  521. }
  522. uint32_t startpos = 0;
  523. crashfile.write(log_get_buffer(&startpos));
  524. crashfile.write(log_get_buffer(&startpos));
  525. crashfile.flush();
  526. crashfile.close();
  527. }
  528. extern uint32_t _estack;
  529. __attribute__((noinline))
  530. void show_hardfault(uint32_t *sp)
  531. {
  532. uint32_t pc = sp[6];
  533. uint32_t lr = sp[5];
  534. uint32_t cfsr = SCB->CFSR;
  535. logmsg("--------------");
  536. logmsg("CRASH!");
  537. logmsg("Platform: ", g_platform_name);
  538. logmsg("FW Version: ", g_log_firmwareversion);
  539. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  540. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  541. logmsg("CFSR: ", cfsr);
  542. logmsg("SP: ", (uint32_t)sp);
  543. logmsg("PC: ", pc);
  544. logmsg("LR: ", lr);
  545. logmsg("R0: ", sp[0]);
  546. logmsg("R1: ", sp[1]);
  547. logmsg("R2: ", sp[2]);
  548. logmsg("R3: ", sp[3]);
  549. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  550. for (int i = 0; i < 8; i++)
  551. {
  552. if (p == &_estack) break; // End of stack
  553. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  554. p += 4;
  555. }
  556. platform_emergency_log_save();
  557. while (1)
  558. {
  559. if (g_usb_log_poll_func) g_usb_log_poll_func();
  560. // Flash the crash address on the LED
  561. // Short pulse means 0, long pulse means 1
  562. int base_delay = 1000;
  563. for (int i = 31; i >= 0; i--)
  564. {
  565. LED_OFF();
  566. for (int j = 0; j < base_delay; j++) delay_ns(100000);
  567. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  568. LED_ON();
  569. for (int j = 0; j < delay; j++) delay_ns(100000);
  570. LED_OFF();
  571. }
  572. for (int j = 0; j < base_delay * 10; j++) delay_ns(100000);
  573. }
  574. }
  575. __attribute__((naked, interrupt))
  576. void HardFault_Handler(void)
  577. {
  578. // Copies stack pointer into first argument
  579. asm("mrs r0, msp\n"
  580. "b show_hardfault": : : "r0");
  581. }
  582. __attribute__((naked, interrupt))
  583. void MemManage_Handler(void)
  584. {
  585. asm("mrs r0, msp\n"
  586. "b show_hardfault": : : "r0");
  587. }
  588. __attribute__((naked, interrupt))
  589. void BusFault_Handler(void)
  590. {
  591. asm("mrs r0, msp\n"
  592. "b show_hardfault": : : "r0");
  593. }
  594. __attribute__((naked, interrupt))
  595. void UsageFault_Handler(void)
  596. {
  597. asm("mrs r0, msp\n"
  598. "b show_hardfault": : : "r0");
  599. }
  600. void __assert_func(const char *file, int line, const char *func, const char *expr)
  601. {
  602. uint32_t dummy = 0;
  603. logmsg("--------------");
  604. logmsg("ASSERT FAILED!");
  605. logmsg("Platform: ", g_platform_name);
  606. logmsg("FW Version: ", g_log_firmwareversion);
  607. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  608. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  609. logmsg("Assert failed: ", file , ":", line, " in ", func, ":", expr);
  610. uint32_t *p = (uint32_t*)((uint32_t)&dummy & ~3);
  611. for (int i = 0; i < 8; i++)
  612. {
  613. if (p == &_estack) break; // End of stack
  614. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  615. p += 4;
  616. }
  617. platform_emergency_log_save();
  618. while(1)
  619. {
  620. if (g_usb_log_poll_func) g_usb_log_poll_func();
  621. LED_OFF();
  622. for (int j = 0; j < 1000; j++) delay_ns(100000);
  623. LED_ON();
  624. for (int j = 0; j < 1000; j++) delay_ns(100000);
  625. }
  626. }
  627. } /* extern "C" */
  628. static void watchdog_handler(uint32_t *sp)
  629. {
  630. logmsg("-------------- WATCHDOG TIMEOUT");
  631. show_hardfault(sp);
  632. }
  633. void platform_reset_watchdog()
  634. {
  635. // This uses a software watchdog based on systick timer interrupt.
  636. // It gives us opportunity to collect better debug info than the
  637. // full hardware reset that would be caused by hardware watchdog.
  638. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  639. // USB log is polled here also to make sure any log messages in fault states
  640. // get passed to USB.
  641. usb_log_poll();
  642. }
  643. void platform_reset_mcu()
  644. {
  645. // reset in 2 sec ( 1 / (40KHz / 32) * 2500 == 2sec)
  646. fwdgt_config(2500, FWDGT_PSC_DIV32);
  647. fwdgt_enable();
  648. }
  649. // Poll function that is called every few milliseconds.
  650. // Can be left empty or used for platform-specific processing.
  651. void platform_poll()
  652. {
  653. #ifdef ENABLE_AUDIO_OUTPUT
  654. audio_poll();
  655. #endif
  656. adc_poll();
  657. usb_log_poll();
  658. }
  659. uint8_t platform_get_buttons()
  660. {
  661. // Buttons are active low: internal pull-up is enabled,
  662. // and when button is pressed the pin goes low.
  663. uint8_t buttons = 0;
  664. #ifdef PLATFORM_VERSION_1_1_PLUS
  665. if (g_zuluscsi_version == ZSVersion_v1_1_ODE || g_zuluscsi_version == ZSVersion_v1_2)
  666. {
  667. if (!gpio_input_bit_get(EJECT_BTN_PORT, EJECT_BTN_PIN)) buttons |= 1;
  668. if (!gpio_input_bit_get(USER_BTN_PORT, USER_BTN_PIN)) buttons |= 4;
  669. }
  670. else
  671. {
  672. if (!gpio_input_bit_get(EJECT_1_PORT, EJECT_1_PIN)) buttons |= 1;
  673. if (!gpio_input_bit_get(EJECT_2_PORT, EJECT_2_PIN)) buttons |= 2;
  674. }
  675. #else
  676. if (!gpio_input_bit_get(EJECT_1_PORT, EJECT_1_PIN)) buttons |= 1;
  677. if (!gpio_input_bit_get(EJECT_2_PORT, EJECT_2_PIN)) buttons |= 2;
  678. #endif
  679. // Simple debouncing logic: handle button releases after 100 ms delay.
  680. static uint32_t debounce;
  681. static uint8_t buttons_debounced = 0;
  682. if (buttons != 0)
  683. {
  684. buttons_debounced = buttons;
  685. debounce = millis();
  686. }
  687. else if ((uint32_t)(millis() - debounce) > 100)
  688. {
  689. buttons_debounced = 0;
  690. }
  691. #ifdef PLATFORM_VERSION_1_1_PLUS
  692. if(g_zuluscsi_version == ZSVersion_v1_1_ODE || g_zuluscsi_version == ZSVersion_v1_2)
  693. {
  694. static uint8_t previous = 0x00;
  695. uint8_t bitmask = buttons_debounced & USER_BTN_MASK;
  696. uint8_t ejectors = (previous ^ bitmask) & previous;
  697. previous = bitmask;
  698. if (ejectors & USER_BTN_MASK)
  699. {
  700. logmsg("User button pressed - feature not yet implemented");
  701. }
  702. }
  703. #endif
  704. return buttons_debounced;
  705. }
  706. /***********************/
  707. /* Flash reprogramming */
  708. /***********************/
  709. bool platform_rewrite_flash_page(uint32_t offset, uint8_t buffer[PLATFORM_FLASH_PAGE_SIZE])
  710. {
  711. if (offset == 0)
  712. {
  713. if (buffer[3] != 0x20 || buffer[7] != 0x08)
  714. {
  715. logmsg("Invalid firmware file, starts with: ", bytearray(buffer, 16));
  716. return false;
  717. }
  718. }
  719. dbgmsg("Writing flash at offset ", offset, " data ", bytearray(buffer, 4));
  720. assert(offset % PLATFORM_FLASH_PAGE_SIZE == 0);
  721. assert(offset >= PLATFORM_BOOTLOADER_SIZE);
  722. fmc_unlock();
  723. fmc_bank0_unlock();
  724. fmc_state_enum status;
  725. status = fmc_page_erase(FLASH_BASE + offset);
  726. if (status != FMC_READY)
  727. {
  728. logmsg("Erase failed: ", (int)status);
  729. return false;
  730. }
  731. uint32_t *buf32 = (uint32_t*)buffer;
  732. uint32_t num_words = PLATFORM_FLASH_PAGE_SIZE / 4;
  733. for (int i = 0; i < num_words; i++)
  734. {
  735. status = fmc_word_program(FLASH_BASE + offset + i * 4, buf32[i]);
  736. if (status != FMC_READY)
  737. {
  738. logmsg("Flash write failed: ", (int)status);
  739. return false;
  740. }
  741. }
  742. fmc_lock();
  743. for (int i = 0; i < num_words; i++)
  744. {
  745. uint32_t expected = buf32[i];
  746. uint32_t actual = *(volatile uint32_t*)(FLASH_BASE + offset + i * 4);
  747. if (actual != expected)
  748. {
  749. logmsg("Flash verify failed at offset ", offset + i * 4, " got ", actual, " expected ", expected);
  750. return false;
  751. }
  752. }
  753. return true;
  754. }
  755. void platform_boot_to_main_firmware()
  756. {
  757. uint32_t *mainprogram_start = (uint32_t*)(0x08000000 + PLATFORM_BOOTLOADER_SIZE);
  758. SCB->VTOR = (uint32_t)mainprogram_start;
  759. __asm__(
  760. "msr msp, %0\n\t"
  761. "bx %1" : : "r" (mainprogram_start[0]),
  762. "r" (mainprogram_start[1]) : "memory");
  763. }
  764. /**************************************/
  765. /* SCSI configuration based on DIPSW1 */
  766. /**************************************/
  767. void platform_config_hook(S2S_TargetCfg *config)
  768. {
  769. // Enable Apple quirks by dip switch
  770. if (g_enable_apple_quirks)
  771. {
  772. if (config->quirks == S2S_CFG_QUIRKS_NONE)
  773. {
  774. config->quirks = S2S_CFG_QUIRKS_APPLE;
  775. }
  776. }
  777. }
  778. /**********************************************/
  779. /* Mapping from data bytes to GPIO BOP values */
  780. /**********************************************/
  781. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  782. #define X(n) (\
  783. ((n & 0x01) ? (SCSI_OUT_DB0 << 16) : SCSI_OUT_DB0) | \
  784. ((n & 0x02) ? (SCSI_OUT_DB1 << 16) : SCSI_OUT_DB1) | \
  785. ((n & 0x04) ? (SCSI_OUT_DB2 << 16) : SCSI_OUT_DB2) | \
  786. ((n & 0x08) ? (SCSI_OUT_DB3 << 16) : SCSI_OUT_DB3) | \
  787. ((n & 0x10) ? (SCSI_OUT_DB4 << 16) : SCSI_OUT_DB4) | \
  788. ((n & 0x20) ? (SCSI_OUT_DB5 << 16) : SCSI_OUT_DB5) | \
  789. ((n & 0x40) ? (SCSI_OUT_DB6 << 16) : SCSI_OUT_DB6) | \
  790. ((n & 0x80) ? (SCSI_OUT_DB7 << 16) : SCSI_OUT_DB7) | \
  791. (PARITY(n) ? (SCSI_OUT_DBP << 16) : SCSI_OUT_DBP) | \
  792. (SCSI_OUT_REQ) \
  793. )
  794. const uint32_t g_scsi_out_byte_to_bop[256] =
  795. {
  796. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  797. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  798. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  799. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  800. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  801. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  802. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  803. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  804. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  805. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  806. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  807. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  808. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  809. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  810. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  811. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  812. };
  813. #undef X