ZuluSCSI_platform.cpp 30 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version. 
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details. 
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "ZuluSCSI_platform.h"
  22. #include "gd32f20x_sdio.h"
  23. #include "gd32f20x_fmc.h"
  24. #include "gd32f20x_fwdgt.h"
  25. #include "ZuluSCSI_log.h"
  26. #include "ZuluSCSI_config.h"
  27. #include "usbd_conf.h"
  28. #include "usb_serial.h"
  29. #include "greenpak.h"
  30. #include <SdFat.h>
  31. #include <scsi.h>
  32. #include <assert.h>
  33. #include <audio.h>
  34. #include <ZuluSCSI_audio.h>
  35. extern SdFs SD;
  36. extern bool g_rawdrive_active;
  37. extern "C" {
  38. const char *g_platform_name = PLATFORM_NAME;
  39. static bool g_enable_apple_quirks = false;
  40. bool g_direct_mode = false;
  41. ZuluSCSIVersion_t g_zuluscsi_version = ZSVersion_unknown;
  42. bool g_moved_select_in = false;
  43. // hw_config.cpp c functions
  44. #include "platform_hw_config.h"
  45. /*************************/
  46. /* Timing functions */
  47. /*************************/
  48. static volatile uint32_t g_millisecond_counter;
  49. static volatile uint32_t g_watchdog_timeout;
  50. static uint32_t g_ns_to_cycles; // Q0.32 fixed point format
  51. static void watchdog_handler(uint32_t *sp);
  52. unsigned long millis()
  53. {
  54. return g_millisecond_counter;
  55. }
  56. void delay(unsigned long ms)
  57. {
  58. uint32_t start = g_millisecond_counter;
  59. while ((uint32_t)(g_millisecond_counter - start) < ms);
  60. }
  61. void delay_ns(unsigned long ns)
  62. {
  63. uint32_t CNT_start = DWT->CYCCNT;
  64. if (ns <= 100) return; // Approximate call overhead
  65. ns -= 100;
  66. uint32_t cycles = ((uint64_t)ns * g_ns_to_cycles) >> 32;
  67. while ((uint32_t)(DWT->CYCCNT - CNT_start) < cycles);
  68. }
  69. void SysTick_Handler_inner(uint32_t *sp)
  70. {
  71. g_millisecond_counter++;
  72. if (g_watchdog_timeout > 0)
  73. {
  74. g_watchdog_timeout--;
  75. const uint32_t busreset_time = WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT;
  76. if (g_watchdog_timeout <= busreset_time)
  77. {
  78. if (!scsiDev.resetFlag)
  79. {
  80. logmsg("WATCHDOG TIMEOUT at PC ", sp[6], " LR ", sp[5], " attempting bus reset");
  81. scsiDev.resetFlag = 1;
  82. }
  83. if (g_watchdog_timeout == 0)
  84. {
  85. watchdog_handler(sp);
  86. }
  87. }
  88. }
  89. }
  90. __attribute__((interrupt, naked))
  91. void SysTick_Handler(void)
  92. {
  93. // Take note of stack pointer so that we can print debug
  94. // info in watchdog handler.
  95. asm("mrs r0, msp\n"
  96. "b SysTick_Handler_inner": : : "r0");
  97. }
  98. // This function is called by scsiPhy.cpp.
  99. // It resets the systick counter to give 1 millisecond of uninterrupted transfer time.
  100. // The total number of skips is kept track of to keep the correct time on average.
  101. void SysTick_Handle_PreEmptively()
  102. {
  103. static int skipped_clocks = 0;
  104. __disable_irq();
  105. uint32_t loadval = SysTick->LOAD;
  106. skipped_clocks += loadval - SysTick->VAL;
  107. SysTick->VAL = 0;
  108. if (skipped_clocks > loadval)
  109. {
  110. // We have skipped enough ticks that it is time to fake a call
  111. // to SysTick interrupt handler.
  112. skipped_clocks -= loadval;
  113. uint32_t stack_frame[8] = {0};
  114. stack_frame[6] = (uint32_t)__builtin_return_address(0);
  115. SysTick_Handler_inner(stack_frame);
  116. }
  117. __enable_irq();
  118. }
  119. uint32_t platform_sys_clock_in_hz()
  120. {
  121. return rcu_clock_freq_get(CK_SYS);
  122. }
  123. /***************/
  124. /* GPIO init */
  125. /***************/
  126. #ifdef PLATFORM_VERSION_1_1_PLUS
  127. static void init_audio_gpio()
  128. {
  129. gpio_pin_remap1_config(GPIO_PCF5, GPIO_PCF5_SPI1_IO_REMAP1, ENABLE);
  130. gpio_pin_remap1_config(GPIO_PCF5, GPIO_PCF5_SPI1_NSCK_REMAP1, ENABLE);
  131. gpio_pin_remap1_config(GPIO_PCF4, GPIO_PCF4_SPI1_SCK_PD3_REMAP, ENABLE);
  132. gpio_init(I2S_CK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, I2S_CK_PIN);
  133. gpio_init(I2S_SD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, I2S_SD_PIN);
  134. gpio_init(I2S_WS_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, I2S_WS_PIN);
  135. }
  136. #endif
  137. // Method of determining whichi scsi board is being used
  138. static ZuluSCSIVersion_t get_zuluscsi_version()
  139. {
  140. #ifdef DIGITAL_VERSION_DETECT_PORT
  141. bool pull_down;
  142. bool pull_up;
  143. gpio_init(DIGITAL_VERSION_DETECT_PORT, GPIO_MODE_IPU, 0, DIGITAL_VERSION_DETECT_PIN);
  144. delay_us(10);
  145. pull_up = SET == gpio_input_bit_get(DIGITAL_VERSION_DETECT_PORT, DIGITAL_VERSION_DETECT_PIN);
  146. gpio_init(DIGITAL_VERSION_DETECT_PORT, GPIO_MODE_IPD, 0, DIGITAL_VERSION_DETECT_PIN);
  147. delay_us(10);
  148. pull_down = RESET == gpio_input_bit_get(DIGITAL_VERSION_DETECT_PORT, DIGITAL_VERSION_DETECT_PIN);
  149. if (pull_up && pull_down)
  150. return ZSVersion_v1_1;
  151. if (pull_down && !pull_up)
  152. return ZSVersion_v1_1_ODE;
  153. if (pull_up && !pull_down)
  154. {
  155. return ZSVersion_v1_2;
  156. }
  157. #endif // DIGITAL_DETECT_VERSION
  158. return ZSVersion_unknown;
  159. }
  160. // Initialize SPI and GPIO configuration
  161. // Clock has already been initialized by system_gd32f20x.c
  162. void platform_init()
  163. {
  164. SystemCoreClockUpdate();
  165. // Enable SysTick to drive millis()
  166. g_millisecond_counter = 0;
  167. SysTick_Config(SystemCoreClock / 1000U);
  168. NVIC_SetPriority(SysTick_IRQn, 0x00U);
  169. // Enable DWT counter to drive delay_ns()
  170. g_ns_to_cycles = ((uint64_t)SystemCoreClock << 32) / 1000000000;
  171. CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
  172. DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
  173. // Enable debug output on SWO pin
  174. DBG_CTL |= DBG_CTL_TRACE_IOEN;
  175. if (TPI->ACPR == 0)
  176. {
  177. CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
  178. TPI->ACPR = SystemCoreClock / 2000000 - 1; // 2 Mbps baudrate for SWO
  179. // TPI->ACPR = SystemCoreClock / 30000000 - 1; // 30 Mbps baudrate for SWO
  180. TPI->SPPR = 2;
  181. TPI->FFCR = 0x100; // TPIU packet framing disabled
  182. // DWT->CTRL |= (1 << DWT_CTRL_EXCTRCENA_Pos);
  183. // DWT->CTRL |= (1 << DWT_CTRL_CYCTAP_Pos)
  184. // | (15 << DWT_CTRL_POSTPRESET_Pos)
  185. // | (1 << DWT_CTRL_PCSAMPLENA_Pos)
  186. // | (3 << DWT_CTRL_SYNCTAP_Pos)
  187. // | (1 << DWT_CTRL_CYCCNTENA_Pos);
  188. ITM->LAR = 0xC5ACCE55;
  189. ITM->TCR = (1 << ITM_TCR_DWTENA_Pos)
  190. | (1 << ITM_TCR_SYNCENA_Pos)
  191. | (1 << ITM_TCR_ITMENA_Pos);
  192. ITM->TER = 0xFFFFFFFF; // Enable all stimulus ports
  193. }
  194. // Enable needed clocks for GPIO
  195. rcu_periph_clock_enable(RCU_AF);
  196. rcu_periph_clock_enable(RCU_GPIOA);
  197. rcu_periph_clock_enable(RCU_GPIOB);
  198. rcu_periph_clock_enable(RCU_GPIOC);
  199. rcu_periph_clock_enable(RCU_GPIOD);
  200. rcu_periph_clock_enable(RCU_GPIOE);
  201. // Switch to SWD debug port (disable JTAG) to release PB4 as GPIO
  202. gpio_pin_remap_config(GPIO_SWJ_SWDPENABLE_REMAP, ENABLE);
  203. // SCSI pins.
  204. // Initialize open drain outputs to high.
  205. SCSI_RELEASE_OUTPUTS();
  206. // determine the ZulusSCSI board version
  207. g_zuluscsi_version = get_zuluscsi_version();
  208. g_moved_select_in = g_zuluscsi_version == ZSVersion_v1_1_ODE || g_zuluscsi_version == ZSVersion_v1_2;
  209. // Init SCSI pins GPIOs
  210. gpio_init(SCSI_OUT_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_DATA_MASK | SCSI_OUT_REQ);
  211. gpio_init(SCSI_OUT_IO_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_IO_PIN);
  212. gpio_init(SCSI_OUT_CD_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_CD_PIN);
  213. gpio_init(SCSI_OUT_SEL_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_SEL_PIN);
  214. gpio_init(SCSI_OUT_MSG_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_MSG_PIN);
  215. gpio_init(SCSI_OUT_RST_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_RST_PIN);
  216. gpio_init(SCSI_OUT_BSY_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SCSI_OUT_BSY_PIN);
  217. gpio_init(SCSI_IN_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_IN_MASK);
  218. gpio_init(SCSI_ATN_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ATN_PIN);
  219. gpio_init(SCSI_BSY_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_BSY_PIN);
  220. gpio_init(SCSI_ACK_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ACK_PIN);
  221. gpio_init(SCSI_RST_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_RST_PIN);
  222. // Terminator enable
  223. gpio_bit_set(SCSI_TERM_EN_PORT, SCSI_TERM_EN_PIN);
  224. gpio_init(SCSI_TERM_EN_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, SCSI_TERM_EN_PIN);
  225. #ifndef SD_USE_SDIO
  226. // SD card pins using SPI
  227. gpio_init(SD_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SD_CS_PIN);
  228. gpio_init(SD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_CLK_PIN);
  229. gpio_init(SD_PORT, GPIO_MODE_IPU, 0, SD_MISO_PIN);
  230. gpio_init(SD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_MOSI_PIN);
  231. #else
  232. // SD card pins using SDIO
  233. gpio_init(SD_SDIO_DATA_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_SDIO_D0 | SD_SDIO_D1 | SD_SDIO_D2 | SD_SDIO_D3);
  234. gpio_init(SD_SDIO_CLK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_SDIO_CLK);
  235. gpio_init(SD_SDIO_CMD_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, SD_SDIO_CMD);
  236. #endif
  237. #ifdef PLATFORM_VERSION_1_1_PLUS
  238. if (g_zuluscsi_version == ZSVersion_v1_1)
  239. {
  240. // SCSI Select
  241. gpio_init(SCSI_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_SEL_PIN);
  242. // DIP switches
  243. gpio_init(DIP_PORT, GPIO_MODE_IPD, 0, DIPSW1_PIN | DIPSW2_PIN | DIPSW3_PIN);
  244. gpio_init(EJECT_1_PORT, GPIO_MODE_IPU, 0, EJECT_1_PIN);
  245. gpio_init(EJECT_2_PORT, GPIO_MODE_IPU, 0, EJECT_2_PIN);
  246. }
  247. else if (g_zuluscsi_version == ZSVersion_v1_1_ODE)
  248. {
  249. // SCSI Select
  250. gpio_init(SCSI_ODE_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ODE_SEL_PIN);
  251. // DIP switches
  252. gpio_init(ODE_DIP_PORT, GPIO_MODE_IPD, 0, ODE_DIPSW1_PIN | ODE_DIPSW2_PIN | ODE_DIPSW3_PIN);
  253. // Buttons
  254. gpio_init(EJECT_BTN_PORT, GPIO_MODE_IPU, 0, EJECT_BTN_PIN);
  255. gpio_init(USER_BTN_PORT, GPIO_MODE_IPU, 0, USER_BTN_PIN);
  256. init_audio_gpio();
  257. g_audio_enabled = true;
  258. }
  259. else if (g_zuluscsi_version == ZSVersion_v1_2)
  260. {
  261. // SCSI Select
  262. gpio_init(SCSI_ODE_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_ODE_SEL_PIN);
  263. // General settings DIP switch
  264. gpio_init(V1_2_DIPSW_TERM_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_TERM_PIN);
  265. gpio_init(V1_2_DIPSW_DBG_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_DBG_PIN);
  266. gpio_init(V1_2_DIPSW_QUIRKS_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_QUIRKS_PIN);
  267. // Direct/Raw Mode Select
  268. gpio_init(V1_2_DIPSW_DIRECT_MODE_PORT, GPIO_MODE_IPD, 0, V1_2_DIPSW_DIRECT_MODE_PIN);
  269. // SCSI ID dip switch
  270. gpio_init(DIPSW_SCSI_ID_BIT_PORT, GPIO_MODE_IPD, 0, DIPSW_SCSI_ID_BIT_PINS);
  271. // Device select BCD rotary DIP switch
  272. gpio_init(DIPROT_DEVICE_SEL_BIT_PORT, GPIO_MODE_IPD, 0, DIPROT_DEVICE_SEL_BIT_PINS);
  273. // Buttons
  274. gpio_init(EJECT_BTN_PORT, GPIO_MODE_IPU, 0, EJECT_BTN_PIN);
  275. gpio_init(USER_BTN_PORT, GPIO_MODE_IPU, 0, USER_BTN_PIN);
  276. LED_EJECT_OFF();
  277. gpio_init(LED_EJECT_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, LED_EJECT_PIN);
  278. }
  279. #else
  280. // SCSI Select
  281. gpio_init(SCSI_SEL_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_SEL_PIN);
  282. // DIP switches
  283. gpio_init(DIP_PORT, GPIO_MODE_IPD, 0, DIPSW1_PIN | DIPSW2_PIN | DIPSW3_PIN);
  284. // Ejection buttons
  285. gpio_init(EJECT_1_PORT, GPIO_MODE_IPU, 0, EJECT_1_PIN);
  286. gpio_init(EJECT_2_PORT, GPIO_MODE_IPU, 0, EJECT_2_PIN);
  287. #endif // PLATFORM_VERSION_1_1_PLUS
  288. // LED pins
  289. gpio_bit_set(LED_PORT, LED_PINS);
  290. gpio_init(LED_PORT, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, LED_PINS);
  291. // SWO trace pin on PB3
  292. gpio_init(GPIOB, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_3);
  293. }
  294. static void set_termination(uint32_t port, uint32_t pin, const char *switch_name)
  295. {
  296. if (gpio_input_bit_get(port, pin))
  297. {
  298. logmsg(switch_name, " is ON: Enabling SCSI termination");
  299. gpio_bit_reset(SCSI_TERM_EN_PORT, SCSI_TERM_EN_PIN);
  300. }
  301. else
  302. {
  303. logmsg(switch_name, " is OFF: Disabling SCSI termination");
  304. }
  305. }
  306. static bool get_debug(uint32_t port, uint32_t pin, const char *switch_name)
  307. {
  308. if (gpio_input_bit_get(port, pin))
  309. {
  310. logmsg(switch_name, " is ON: Enabling debug messages");
  311. return true;
  312. }
  313. logmsg(switch_name, " is OFF: Disabling debug messages");
  314. return false;
  315. }
  316. static bool get_quirks(uint32_t port, uint32_t pin, const char *switch_name)
  317. {
  318. if (gpio_input_bit_get(port, pin))
  319. {
  320. logmsg(switch_name, " is ON: Enabling Apple quirks by default");
  321. return true;
  322. }
  323. logmsg(switch_name, " is OFF: Disabling Apple quirks mode by default");
  324. return false;
  325. }
  326. #ifdef PLATFORM_VERSION_1_1_PLUS
  327. static bool get_direct_mode(uint32_t port, uint32_t pin, const char *switch_name)
  328. {
  329. if (!gpio_input_bit_get(port, pin))
  330. {
  331. logmsg(switch_name, " is OFF: Enabling direct/raw mode");
  332. return true;
  333. }
  334. logmsg(switch_name, " is ON: Disabling direct/raw mode");
  335. return false;
  336. }
  337. #endif
  338. void platform_late_init()
  339. {
  340. // Initialize usb for CDC serial output
  341. usb_serial_init();
  342. logmsg("Platform: ", g_platform_name);
  343. logmsg("FW Version: ", g_log_firmwareversion);
  344. #ifdef PLATFORM_VERSION_1_1_PLUS
  345. if (ZSVersion_v1_1 == g_zuluscsi_version)
  346. {
  347. logmsg("Board Version: ZuluSCSI v1.1 Standard Edition");
  348. set_termination(DIP_PORT, DIPSW3_PIN, "DIPSW3");
  349. g_log_debug = get_debug(DIP_PORT, DIPSW2_PIN, "DIPSW2");
  350. g_enable_apple_quirks = get_quirks(DIP_PORT, DIPSW1_PIN, "DIPSW1");
  351. greenpak_load_firmware();
  352. }
  353. else if (ZSVersion_v1_1_ODE == g_zuluscsi_version)
  354. {
  355. logmsg("Board Version: ZuluSCSI v1.1 ODE");
  356. logmsg("ODE - Optical Drive Emulator");
  357. set_termination(ODE_DIP_PORT, ODE_DIPSW3_PIN, "DIPSW3");
  358. g_log_debug = get_debug(ODE_DIP_PORT, ODE_DIPSW2_PIN, "DIPSW2");
  359. g_enable_apple_quirks = get_quirks(ODE_DIP_PORT, ODE_DIPSW1_PIN, "DIPSW1");
  360. audio_setup();
  361. }
  362. else if (ZSVersion_v1_2 == g_zuluscsi_version)
  363. {
  364. logmsg("Board Version: ZuluSCSI v1.2");
  365. hw_config_init_gpios();
  366. set_termination(V1_2_DIPSW_TERM_PORT, V1_2_DIPSW_TERM_PIN, "DIPSW4");
  367. g_log_debug = get_debug(V1_2_DIPSW_DBG_PORT, V1_2_DIPSW_DBG_PIN, "DIPSW3");
  368. g_direct_mode = get_direct_mode(V1_2_DIPSW_DIRECT_MODE_PORT, V1_2_DIPSW_DIRECT_MODE_PIN, "DIPSW2");
  369. g_enable_apple_quirks = get_quirks(V1_2_DIPSW_QUIRKS_PORT, V1_2_DIPSW_QUIRKS_PIN, "DIPSW1");
  370. hw_config_init_state(g_direct_mode);
  371. }
  372. #else // PLATFORM_VERSION_1_1_PLUS - ZuluSCSI v1.0 and v1.0 minis gpio config
  373. #ifdef ZULUSCSI_V1_0_mini
  374. logmsg("SCSI termination is always on");
  375. #elif defined(ZULUSCSI_V1_0)
  376. set_termination(DIP_PORT, DIPSW3_PIN, "DIPSW3");
  377. g_log_debug = get_debug(DIP_PORT, DIPSW2_PIN, "DIPSW2");
  378. g_enable_apple_quirks = get_quirks(DIP_PORT, DIPSW1_PIN, "DIPSW1");
  379. #endif // ZULUSCSI_V1_0_mini
  380. #endif // PLATFORM_VERSION_1_1_PLUS
  381. }
  382. void platform_post_sd_card_init()
  383. {
  384. #ifdef PLATFORM_VERSION_1_1_PLUS
  385. if (ZSVersion_v1_2 == g_zuluscsi_version && g_scsi_settings.getSystem()->enableCDAudio)
  386. {
  387. logmsg("Audio enabled - an external audio DAC is required on the I2S expansion header");
  388. init_audio_gpio();
  389. g_audio_enabled = true;
  390. audio_setup();
  391. }
  392. #endif
  393. }
  394. void platform_disable_led(void)
  395. {
  396. gpio_init(LED_PORT, GPIO_MODE_IPU, 0, LED_PINS);
  397. logmsg("Disabling status LED");
  398. }
  399. /*****************************************/
  400. /* Supply voltage monitor */
  401. /*****************************************/
  402. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  403. // This works by sampling the Vrefint, which has
  404. // a voltage of 1.2 V, allowing to calculate the VDD voltage.
  405. static void adc_poll()
  406. {
  407. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  408. static bool initialized = false;
  409. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  410. if (!initialized)
  411. {
  412. rcu_periph_clock_enable(RCU_ADC0);
  413. adc_enable(ADC0);
  414. adc_calibration_enable(ADC0);
  415. adc_tempsensor_vrefint_enable();
  416. adc_inserted_channel_config(ADC0, 0, ADC_CHANNEL_17, ADC_SAMPLETIME_239POINT5);
  417. adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC0_1_2_EXTTRIG_INSERTED_NONE);
  418. adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
  419. adc_software_trigger_enable(ADC0, ADC_INSERTED_CHANNEL);
  420. initialized = true;
  421. }
  422. // Read previous result and start new one
  423. int adc_value = ADC_IDATA0(ADC0);
  424. adc_software_trigger_enable(ADC0, ADC_INSERTED_CHANNEL);
  425. // adc_value = 1200mV * 4096 / Vdd
  426. // => Vdd = 1200mV * 4096 / adc_value
  427. // To avoid wasting time on division, compare against
  428. // limit directly.
  429. const int limit = (1200 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  430. if (adc_value > limit)
  431. {
  432. // Warn once, and then again if we detect even a lower drop.
  433. int vdd_mV = (1200 * 4096) / adc_value;
  434. if (vdd_mV < lowest_vdd_seen)
  435. {
  436. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  437. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  438. }
  439. }
  440. #endif
  441. }
  442. /*****************************************/
  443. /* Debug logging and watchdog */
  444. /*****************************************/
  445. // Send log data to USB UART if USB is connected.
  446. // Data is retrieved from the shared log ring buffer and
  447. // this function sends as much as fits in USB CDC buffer.
  448. static void usb_log_poll()
  449. {
  450. static uint32_t logpos = 0;
  451. if (usb_serial_ready())
  452. {
  453. // Retrieve pointer to log start and determine number of bytes available.
  454. uint32_t available = 0;
  455. const char *data = log_get_buffer(&logpos, &available);
  456. // Limit to CDC packet size
  457. uint32_t len = available;
  458. if (len == 0) return;
  459. if (len > USB_CDC_DATA_PACKET_SIZE) len = USB_CDC_DATA_PACKET_SIZE;
  460. // Update log position by the actual number of bytes sent
  461. // If USB CDC buffer is full, this may be 0
  462. usb_serial_send((uint8_t*)data, len);
  463. logpos -= available - len;
  464. }
  465. }
  466. /*****************************************/
  467. /* Crash handlers */
  468. /*****************************************/
  469. // Writes log data to the PB3 SWO pin
  470. void platform_log(const char *s)
  471. {
  472. while (*s)
  473. {
  474. // Write to SWO pin
  475. while (ITM->PORT[0].u32 == 0);
  476. ITM->PORT[0].u8 = *s++;
  477. }
  478. }
  479. void platform_emergency_log_save()
  480. {
  481. if (g_rawdrive_active)
  482. return;
  483. #ifdef ZULUSCSI_HARDWARE_CONFIG
  484. if (g_hw_config.is_active())
  485. return;
  486. #endif
  487. platform_set_sd_callback(NULL, NULL);
  488. SD.begin(SD_CONFIG_CRASH);
  489. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  490. if (!crashfile.isOpen())
  491. {
  492. // Try to reinitialize
  493. int max_retry = 10;
  494. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  495. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  496. }
  497. uint32_t startpos = 0;
  498. crashfile.write(log_get_buffer(&startpos));
  499. crashfile.write(log_get_buffer(&startpos));
  500. crashfile.flush();
  501. crashfile.close();
  502. }
  503. extern uint32_t _estack;
  504. __attribute__((noinline))
  505. void show_hardfault(uint32_t *sp)
  506. {
  507. uint32_t pc = sp[6];
  508. uint32_t lr = sp[5];
  509. uint32_t cfsr = SCB->CFSR;
  510. logmsg("--------------");
  511. logmsg("CRASH!");
  512. logmsg("Platform: ", g_platform_name);
  513. logmsg("FW Version: ", g_log_firmwareversion);
  514. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  515. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  516. logmsg("CFSR: ", cfsr);
  517. logmsg("SP: ", (uint32_t)sp);
  518. logmsg("PC: ", pc);
  519. logmsg("LR: ", lr);
  520. logmsg("R0: ", sp[0]);
  521. logmsg("R1: ", sp[1]);
  522. logmsg("R2: ", sp[2]);
  523. logmsg("R3: ", sp[3]);
  524. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  525. for (int i = 0; i < 8; i++)
  526. {
  527. if (p == &_estack) break; // End of stack
  528. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  529. p += 4;
  530. }
  531. platform_emergency_log_save();
  532. while (1)
  533. {
  534. usb_log_poll();
  535. // Flash the crash address on the LED
  536. // Short pulse means 0, long pulse means 1
  537. int base_delay = 1000;
  538. for (int i = 31; i >= 0; i--)
  539. {
  540. LED_OFF();
  541. for (int j = 0; j < base_delay; j++) delay_ns(100000);
  542. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  543. LED_ON();
  544. for (int j = 0; j < delay; j++) delay_ns(100000);
  545. LED_OFF();
  546. }
  547. for (int j = 0; j < base_delay * 10; j++) delay_ns(100000);
  548. }
  549. }
  550. __attribute__((naked, interrupt))
  551. void HardFault_Handler(void)
  552. {
  553. // Copies stack pointer into first argument
  554. asm("mrs r0, msp\n"
  555. "b show_hardfault": : : "r0");
  556. }
  557. __attribute__((naked, interrupt))
  558. void MemManage_Handler(void)
  559. {
  560. asm("mrs r0, msp\n"
  561. "b show_hardfault": : : "r0");
  562. }
  563. __attribute__((naked, interrupt))
  564. void BusFault_Handler(void)
  565. {
  566. asm("mrs r0, msp\n"
  567. "b show_hardfault": : : "r0");
  568. }
  569. __attribute__((naked, interrupt))
  570. void UsageFault_Handler(void)
  571. {
  572. asm("mrs r0, msp\n"
  573. "b show_hardfault": : : "r0");
  574. }
  575. void __assert_func(const char *file, int line, const char *func, const char *expr)
  576. {
  577. uint32_t dummy = 0;
  578. logmsg("--------------");
  579. logmsg("ASSERT FAILED!");
  580. logmsg("Platform: ", g_platform_name);
  581. logmsg("FW Version: ", g_log_firmwareversion);
  582. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  583. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  584. logmsg("Assert failed: ", file , ":", line, " in ", func, ":", expr);
  585. uint32_t *p = (uint32_t*)((uint32_t)&dummy & ~3);
  586. for (int i = 0; i < 8; i++)
  587. {
  588. if (p == &_estack) break; // End of stack
  589. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  590. p += 4;
  591. }
  592. platform_emergency_log_save();
  593. while(1)
  594. {
  595. usb_log_poll();
  596. LED_OFF();
  597. for (int j = 0; j < 1000; j++) delay_ns(100000);
  598. LED_ON();
  599. for (int j = 0; j < 1000; j++) delay_ns(100000);
  600. }
  601. }
  602. } /* extern "C" */
  603. static void watchdog_handler(uint32_t *sp)
  604. {
  605. logmsg("-------------- WATCHDOG TIMEOUT");
  606. show_hardfault(sp);
  607. }
  608. void platform_reset_watchdog()
  609. {
  610. // This uses a software watchdog based on systick timer interrupt.
  611. // It gives us opportunity to collect better debug info than the
  612. // full hardware reset that would be caused by hardware watchdog.
  613. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  614. // USB log is polled here also to make sure any log messages in fault states
  615. // get passed to USB.
  616. usb_log_poll();
  617. }
  618. void platform_reset_mcu()
  619. {
  620. // reset in 2 sec ( 1 / (40KHz / 32) * 2500 == 2sec)
  621. fwdgt_config(2500, FWDGT_PSC_DIV32);
  622. fwdgt_enable();
  623. }
  624. // Poll function that is called every few milliseconds.
  625. // Can be left empty or used for platform-specific processing.
  626. void platform_poll()
  627. {
  628. #ifdef ENABLE_AUDIO_OUTPUT
  629. audio_poll();
  630. #endif
  631. adc_poll();
  632. usb_log_poll();
  633. }
  634. uint8_t platform_get_buttons()
  635. {
  636. // Buttons are active low: internal pull-up is enabled,
  637. // and when button is pressed the pin goes low.
  638. uint8_t buttons = 0;
  639. #ifdef PLATFORM_VERSION_1_1_PLUS
  640. if (g_zuluscsi_version == ZSVersion_v1_1_ODE || g_zuluscsi_version == ZSVersion_v1_2)
  641. {
  642. if (!gpio_input_bit_get(EJECT_BTN_PORT, EJECT_BTN_PIN)) buttons |= 1;
  643. if (!gpio_input_bit_get(USER_BTN_PORT, USER_BTN_PIN)) buttons |= 4;
  644. }
  645. else
  646. {
  647. if (!gpio_input_bit_get(EJECT_1_PORT, EJECT_1_PIN)) buttons |= 1;
  648. if (!gpio_input_bit_get(EJECT_2_PORT, EJECT_2_PIN)) buttons |= 2;
  649. }
  650. #else
  651. if (!gpio_input_bit_get(EJECT_1_PORT, EJECT_1_PIN)) buttons |= 1;
  652. if (!gpio_input_bit_get(EJECT_2_PORT, EJECT_2_PIN)) buttons |= 2;
  653. #endif
  654. // Simple debouncing logic: handle button releases after 100 ms delay.
  655. static uint32_t debounce;
  656. static uint8_t buttons_debounced = 0;
  657. if (buttons != 0)
  658. {
  659. buttons_debounced = buttons;
  660. debounce = millis();
  661. }
  662. else if ((uint32_t)(millis() - debounce) > 100)
  663. {
  664. buttons_debounced = 0;
  665. }
  666. #ifdef PLATFORM_VERSION_1_1_PLUS
  667. if(g_zuluscsi_version == ZSVersion_v1_1_ODE || g_zuluscsi_version == ZSVersion_v1_2)
  668. {
  669. static uint8_t previous = 0x00;
  670. uint8_t bitmask = buttons_debounced & USER_BTN_MASK;
  671. uint8_t ejectors = (previous ^ bitmask) & previous;
  672. previous = bitmask;
  673. if (ejectors & USER_BTN_MASK)
  674. {
  675. logmsg("User button pressed - feature not yet implemented");
  676. }
  677. }
  678. #endif
  679. return buttons_debounced;
  680. }
  681. /***********************/
  682. /* Flash reprogramming */
  683. /***********************/
  684. bool platform_rewrite_flash_page(uint32_t offset, uint8_t buffer[PLATFORM_FLASH_PAGE_SIZE])
  685. {
  686. if (offset == 0)
  687. {
  688. if (buffer[3] != 0x20 || buffer[7] != 0x08)
  689. {
  690. logmsg("Invalid firmware file, starts with: ", bytearray(buffer, 16));
  691. return false;
  692. }
  693. }
  694. dbgmsg("Writing flash at offset ", offset, " data ", bytearray(buffer, 4));
  695. assert(offset % PLATFORM_FLASH_PAGE_SIZE == 0);
  696. assert(offset >= PLATFORM_BOOTLOADER_SIZE);
  697. fmc_unlock();
  698. fmc_bank0_unlock();
  699. fmc_state_enum status;
  700. status = fmc_page_erase(FLASH_BASE + offset);
  701. if (status != FMC_READY)
  702. {
  703. logmsg("Erase failed: ", (int)status);
  704. return false;
  705. }
  706. uint32_t *buf32 = (uint32_t*)buffer;
  707. uint32_t num_words = PLATFORM_FLASH_PAGE_SIZE / 4;
  708. for (int i = 0; i < num_words; i++)
  709. {
  710. status = fmc_word_program(FLASH_BASE + offset + i * 4, buf32[i]);
  711. if (status != FMC_READY)
  712. {
  713. logmsg("Flash write failed: ", (int)status);
  714. return false;
  715. }
  716. }
  717. fmc_lock();
  718. for (int i = 0; i < num_words; i++)
  719. {
  720. uint32_t expected = buf32[i];
  721. uint32_t actual = *(volatile uint32_t*)(FLASH_BASE + offset + i * 4);
  722. if (actual != expected)
  723. {
  724. logmsg("Flash verify failed at offset ", offset + i * 4, " got ", actual, " expected ", expected);
  725. return false;
  726. }
  727. }
  728. return true;
  729. }
  730. void platform_boot_to_main_firmware()
  731. {
  732. uint32_t *mainprogram_start = (uint32_t*)(0x08000000 + PLATFORM_BOOTLOADER_SIZE);
  733. SCB->VTOR = (uint32_t)mainprogram_start;
  734. __asm__(
  735. "msr msp, %0\n\t"
  736. "bx %1" : : "r" (mainprogram_start[0]),
  737. "r" (mainprogram_start[1]) : "memory");
  738. }
  739. /**************************************/
  740. /* SCSI configuration based on DIPSW1 */
  741. /**************************************/
  742. void platform_config_hook(S2S_TargetCfg *config)
  743. {
  744. // Enable Apple quirks by dip switch
  745. if (g_enable_apple_quirks)
  746. {
  747. if (config->quirks == S2S_CFG_QUIRKS_NONE)
  748. {
  749. config->quirks = S2S_CFG_QUIRKS_APPLE;
  750. }
  751. }
  752. }
  753. /**********************************************/
  754. /* Mapping from data bytes to GPIO BOP values */
  755. /**********************************************/
  756. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  757. #define X(n) (\
  758. ((n & 0x01) ? (SCSI_OUT_DB0 << 16) : SCSI_OUT_DB0) | \
  759. ((n & 0x02) ? (SCSI_OUT_DB1 << 16) : SCSI_OUT_DB1) | \
  760. ((n & 0x04) ? (SCSI_OUT_DB2 << 16) : SCSI_OUT_DB2) | \
  761. ((n & 0x08) ? (SCSI_OUT_DB3 << 16) : SCSI_OUT_DB3) | \
  762. ((n & 0x10) ? (SCSI_OUT_DB4 << 16) : SCSI_OUT_DB4) | \
  763. ((n & 0x20) ? (SCSI_OUT_DB5 << 16) : SCSI_OUT_DB5) | \
  764. ((n & 0x40) ? (SCSI_OUT_DB6 << 16) : SCSI_OUT_DB6) | \
  765. ((n & 0x80) ? (SCSI_OUT_DB7 << 16) : SCSI_OUT_DB7) | \
  766. (PARITY(n) ? (SCSI_OUT_DBP << 16) : SCSI_OUT_DBP) | \
  767. (SCSI_OUT_REQ) \
  768. )
  769. const uint32_t g_scsi_out_byte_to_bop[256] =
  770. {
  771. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  772. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  773. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  774. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  775. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  776. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  777. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  778. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  779. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  780. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  781. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  782. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  783. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  784. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  785. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  786. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  787. };
  788. #undef X