SCSI2SD.cycdx 9.0 KB

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  1. <?xml version="1.0" encoding="utf-8"?>
  2. <blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
  3. <block name="Clock_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  4. <block name="SCSI_RST" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  5. <block name="SCSI_ATN" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  6. <block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  7. <block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  8. <block name="SD_MOSI" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  9. <block name="SCSI_RST_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  10. <block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  11. <block name="USBFS" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true">
  12. <block name="bus_reset" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  13. <block name="ep_0" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  14. <block name="arb_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  15. <block name="USB" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  16. <block name="sof_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  17. <block name="ep_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  18. <block name="dp_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  19. <block name="Clock_vbus" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  20. <block name="Dp" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  21. <block name="ep_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  22. <block name="Dm" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  23. <register name="USBFS_PM_USB_CR0" address="0x40004394" bitWidth="8" desc="USB Power Mode Control Register 0">
  24. <field name="fsusbio_ref_en" from="0" to="0" access="RW" resetVal="" desc="" />
  25. <field name="fsusbio_pd_n" from="1" to="1" access="RW" resetVal="" desc="" />
  26. <field name="fsusbio_pd_pullup_n" from="2" to="2" access="RW" resetVal="" desc="" />
  27. </register>
  28. <register name="USBFS_PM_ACT_CFG" address="0x400043A5" bitWidth="8" desc="Active Power Mode Configuration Register" />
  29. <register name="USBFS_PM_STBY_CFG" address="0x400043B5" bitWidth="8" desc="Standby Power Mode Configuration Register" />
  30. <register name="USBFS_PRT.PS" address="0x400051F1" bitWidth="8" desc="Port Pin State Register">
  31. <field name="PinState_DP" from="6" to="6" access="R" resetVal="" desc="" />
  32. <field name="PinState_DM" from="7" to="7" access="R" resetVal="" desc="" />
  33. </register>
  34. <register name="USBFS_PRT_DM0" address="0x400051F2" bitWidth="8" desc="Port Drive Mode Register">
  35. <field name="DriveMode_DP" from="6" to="6" access="RW" resetVal="" desc="" />
  36. <field name="DriveMode_DM" from="7" to="7" access="RW" resetVal="" desc="" />
  37. </register>
  38. <register name="USBFS_PRT_DM1" address="0x400051F3" bitWidth="8" desc="Port Drive Mode Register">
  39. <field name="PullUp_en_DP" from="6" to="6" access="RW" resetVal="" desc="" />
  40. <field name="PullUp_en_DM" from="7" to="7" access="RW" resetVal="" desc="" />
  41. </register>
  42. <register name="USBFS_PRT.INP_DIS" address="0x400051F8" bitWidth="8" desc="Input buffer disable override">
  43. <field name="seinput_dis_dp" from="6" to="6" access="RW" resetVal="" desc="" />
  44. <field name="seinput_dis_dm" from="7" to="7" access="RW" resetVal="" desc="" />
  45. </register>
  46. <register name="USBFS_EP0_DR0" address="0x40006000" bitWidth="8" desc="bmRequestType" />
  47. <register name="USBFS_EP0_DR1" address="0x40006001" bitWidth="8" desc="bRequest" />
  48. <register name="USBFS_EP0_DR2" address="0x40006002" bitWidth="8" desc="wValueLo" />
  49. <register name="USBFS_EP0_DR3" address="0x40006003" bitWidth="8" desc="wValueHi" />
  50. <register name="USBFS_EP0_DR4" address="0x40006004" bitWidth="8" desc="wIndexLo" />
  51. <register name="USBFS_EP0_DR5" address="0x40006005" bitWidth="8" desc="wIndexHi" />
  52. <register name="USBFS_EP0_DR6" address="0x40006006" bitWidth="8" desc="lengthLo" />
  53. <register name="USBFS_EP0_DR7" address="0x40006007" bitWidth="8" desc="lengthHi" />
  54. <register name="USBFS_CR0" address="0x40006008" bitWidth="8" desc="USB Control Register 0">
  55. <field name="device_address" from="0" to="6" access="R" resetVal="" desc="" />
  56. <field name="usb_enable" from="7" to="7" access="RW" resetVal="" desc="" />
  57. </register>
  58. <register name="USBFS_CR1" address="0x40006009" bitWidth="8" desc="USB Control Register 1">
  59. <field name="reg_enable" from="0" to="0" access="RW" resetVal="" desc="" />
  60. <field name="enable_lock" from="1" to="1" access="RW" resetVal="" desc="" />
  61. <field name="bus_activity" from="2" to="2" access="RW" resetVal="" desc="" />
  62. <field name="trim_offset_msb" from="3" to="3" access="RW" resetVal="" desc="" />
  63. </register>
  64. <register name="USBFS_SIE_EP1_CR0" address="0x4000600E" bitWidth="8" desc="The Endpoint1 Control Register" />
  65. <register name="USBFS_USBIO_CR0" address="0x40006010" bitWidth="8" desc="USBIO Control Register 0">
  66. <field name="rd" from="0" to="0" access="R" resetVal="" desc="" />
  67. <field name="td" from="5" to="5" access="RW" resetVal="" desc="" />
  68. <field name="tse0" from="6" to="6" access="RW" resetVal="" desc="" />
  69. <field name="ten" from="7" to="7" access="RW" resetVal="" desc="" />
  70. </register>
  71. <register name="USBFS_USBIO_CR1" address="0x40006012" bitWidth="8" desc="USBIO Control Register 1">
  72. <field name="dmo" from="0" to="0" access="R" resetVal="" desc="" />
  73. <field name="dpo" from="1" to="1" access="R" resetVal="" desc="" />
  74. <field name="usbpuen" from="2" to="2" access="RW" resetVal="" desc="" />
  75. <field name="iomode" from="5" to="5" access="RW" resetVal="" desc="" />
  76. </register>
  77. <register name="USBFS_SIE_EP2_CR0" address="0x4000601E" bitWidth="8" desc="The Endpoint2 Control Register" />
  78. <register name="USBFS_SIE_EP3_CR0" address="0x4000602E" bitWidth="8" desc="The Endpoint3 Control Register" />
  79. <register name="USBFS_SIE_EP4_CR0" address="0x4000603E" bitWidth="8" desc="The Endpoint4 Control Register" />
  80. <register name="USBFS_SIE_EP5_CR0" address="0x4000604E" bitWidth="8" desc="The Endpoint5 Control Register" />
  81. <register name="USBFS_SIE_EP6_CR0" address="0x4000605E" bitWidth="8" desc="The Endpoint6 Control Register" />
  82. <register name="USBFS_SIE_EP7_CR0" address="0x4000606E" bitWidth="8" desc="The Endpoint7 Control Register" />
  83. <register name="USBFS_SIE_EP8_CR0" address="0x4000607E" bitWidth="8" desc="The Endpoint8 Control Register" />
  84. <register name="USBFS_BUF_SIZE" address="0x4000608C" bitWidth="8" desc="Dedicated Endpoint Buffer Size Register" />
  85. <register name="USBFS_EP_ACTIVE" address="0x4000608E" bitWidth="8" desc="Endpoint Active Indication Register" />
  86. <register name="USBFS_EP_TYPE" address="0x4000608F" bitWidth="8" desc="Endpoint Type (IN/OUT) Indication" />
  87. <register name="USBFS_USB_CLK_EN" address="0x4000609D" bitWidth="8" desc="USB Block Clock Enable Register" />
  88. </block>
  89. <block name="Bootloadable_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  90. <block name="scsiTarget" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  91. <block name="LED1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  92. <block name="SDCard" BASE="0x0" SIZE="0x0" desc="" visible="true">
  93. <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  94. <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  95. <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  96. <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  97. <block name="BSPIM" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  98. </block>
  99. <block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  100. <block name="SD_Clk_mux" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  101. <block name="SD_Data_Clk" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  102. <block name="SD_Init_Clk" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  103. <block name="SCSI_In_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  104. <block name="SCSI_Out_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  105. <block name="SD_Clk_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true">
  106. <register name="SD_Clk_Ctl_CONTROL_REG" address="0x4000647A" bitWidth="8" desc="" />
  107. </block>
  108. <block name="SD_CD" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  109. <block name="OddParityGen_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  110. <block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  111. <block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  112. <block name="SD_DAT2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  113. <block name="SD_DAT1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
  114. <block name="SCSI_CTL_IO" BASE="0x0" SIZE="0x0" desc="" visible="true">
  115. <register name="SCSI_CTL_IO_CONTROL_REG" address="0x4000647B" bitWidth="8" desc="" />
  116. </block>
  117. </blockRegMap>