scsiPhy.cpp 15 KB

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  1. // Implements the low level interface to SCSI bus
  2. // Partially derived from scsiPhy.c from SCSI2SD-V6
  3. #include "scsiPhy.h"
  4. #include "ZuluSCSI_platform.h"
  5. #include "scsi_accel_asm.h"
  6. #include "scsi_accel_dma.h"
  7. #include "scsi_accel_greenpak.h"
  8. #include "scsi_accel_sync.h"
  9. #include "ZuluSCSI_log.h"
  10. #include "ZuluSCSI_log_trace.h"
  11. #include "ZuluSCSI_config.h"
  12. #include <minIni.h>
  13. #include <scsi2sd.h>
  14. extern "C" {
  15. #include <scsi.h>
  16. #include <scsi2sd_time.h>
  17. }
  18. // Acceleration mode in use
  19. static enum {
  20. PHY_MODE_BEST_AVAILABLE = 0,
  21. PHY_MODE_PIO = 1,
  22. PHY_MODE_DMA_TIMER = 2,
  23. PHY_MODE_GREENPAK_PIO = 3,
  24. PHY_MODE_GREENPAK_DMA = 4
  25. } g_scsi_phy_mode;
  26. static const char *g_scsi_phy_mode_names[] = {
  27. "Unknown", "PIO", "DMA_TIMER", "GREENPAK_PIO", "GREENPAK_DMA"
  28. };
  29. // State of polling write request
  30. static struct {
  31. const uint8_t *data;
  32. uint32_t count;
  33. bool use_sync_mode;
  34. } g_scsi_writereq;
  35. static void init_irqs();
  36. /***********************/
  37. /* SCSI status signals */
  38. /***********************/
  39. extern "C" bool scsiStatusATN()
  40. {
  41. return SCSI_IN(ATN);
  42. }
  43. extern "C" bool scsiStatusBSY()
  44. {
  45. return SCSI_IN(BSY);
  46. }
  47. /************************/
  48. /* SCSI selection logic */
  49. /************************/
  50. volatile uint8_t g_scsi_sts_selection;
  51. volatile uint8_t g_scsi_ctrl_bsy;
  52. static void scsi_bsy_deassert_interrupt()
  53. {
  54. if (SCSI_IN(SEL) && !SCSI_IN(BSY))
  55. {
  56. uint8_t sel_bits = SCSI_IN_DATA();
  57. int sel_id = -1;
  58. for (int i = 0; i < S2S_MAX_TARGETS; i++)
  59. {
  60. if (scsiDev.targets[i].targetId <= 7 && scsiDev.targets[i].cfg)
  61. {
  62. if (sel_bits & (1 << scsiDev.targets[i].targetId))
  63. {
  64. sel_id = scsiDev.targets[i].targetId;
  65. break;
  66. }
  67. }
  68. }
  69. if (sel_id >= 0)
  70. {
  71. uint8_t atn_flag = SCSI_IN(ATN) ? SCSI_STS_SELECTION_ATN : 0;
  72. g_scsi_sts_selection = SCSI_STS_SELECTION_SUCCEEDED | atn_flag | sel_id;
  73. }
  74. // selFlag is required for Philips P2000C which releases it after 600ns
  75. // without waiting for BSY.
  76. // Also required for some early Mac Plus roms
  77. scsiDev.selFlag = *SCSI_STS_SELECTED;
  78. }
  79. }
  80. extern "C" bool scsiStatusSEL()
  81. {
  82. if (g_scsi_ctrl_bsy)
  83. {
  84. // We don't have direct register access to BSY bit like SCSI2SD scsi.c expects.
  85. // Instead update the state here.
  86. // Releasing happens with bus release.
  87. g_scsi_ctrl_bsy = 0;
  88. SCSI_OUT(BSY, 1);
  89. }
  90. return SCSI_IN(SEL);
  91. }
  92. /************************/
  93. /* SCSI bus reset logic */
  94. /************************/
  95. static void scsi_rst_assert_interrupt()
  96. {
  97. bool rst1 = SCSI_IN(RST);
  98. delay_ns(500);
  99. bool rst2 = SCSI_IN(RST);
  100. if (rst1 && rst2)
  101. {
  102. azdbg("BUS RESET");
  103. scsiDev.resetFlag = 1;
  104. }
  105. }
  106. static void selectPhyMode()
  107. {
  108. int oldmode = g_scsi_phy_mode;
  109. int default_mode = PHY_MODE_BEST_AVAILABLE;
  110. // Read overriding setting from configuration file
  111. int wanted_mode = ini_getl("SCSI", "PhyMode", default_mode, CONFIGFILE);
  112. // Default: software GPIO bitbang, available on all revisions
  113. g_scsi_phy_mode = PHY_MODE_PIO;
  114. // Timer based DMA bitbang, available on V1.1, 2.8 MB/s
  115. #ifdef SCSI_ACCEL_DMA_AVAILABLE
  116. if (wanted_mode == PHY_MODE_BEST_AVAILABLE || wanted_mode == PHY_MODE_DMA_TIMER)
  117. {
  118. g_scsi_phy_mode = PHY_MODE_DMA_TIMER;
  119. }
  120. #endif
  121. // GreenPAK with software write, available on V1.1 with extra chip, 3.5 MB/s
  122. if (wanted_mode == PHY_MODE_BEST_AVAILABLE || wanted_mode == PHY_MODE_GREENPAK_PIO)
  123. {
  124. if (greenpak_is_ready())
  125. {
  126. g_scsi_phy_mode = PHY_MODE_GREENPAK_PIO;
  127. }
  128. }
  129. // GreenPAK with DMA write, available on V1.1 with extra chip
  130. #ifdef SCSI_ACCEL_DMA_AVAILABLE
  131. if (wanted_mode == PHY_MODE_BEST_AVAILABLE || wanted_mode == PHY_MODE_GREENPAK_DMA)
  132. {
  133. if (greenpak_is_ready())
  134. {
  135. g_scsi_phy_mode = PHY_MODE_GREENPAK_DMA;
  136. }
  137. }
  138. #endif
  139. if (g_scsi_phy_mode != oldmode)
  140. {
  141. azlog("SCSI PHY operating mode: ", g_scsi_phy_mode_names[g_scsi_phy_mode]);
  142. }
  143. }
  144. extern "C" void scsiPhyReset(void)
  145. {
  146. SCSI_RELEASE_OUTPUTS();
  147. scsi_accel_dma_stopWrite();
  148. g_scsi_sts_selection = 0;
  149. g_scsi_ctrl_bsy = 0;
  150. g_scsi_writereq.count = 0;
  151. init_irqs();
  152. #ifdef SCSI_SYNC_MODE_AVAILABLE
  153. scsi_accel_sync_init();
  154. #endif
  155. selectPhyMode();
  156. if (g_scsi_phy_mode == PHY_MODE_DMA_TIMER)
  157. {
  158. scsi_accel_timer_dma_init();
  159. }
  160. else if (g_scsi_phy_mode == PHY_MODE_GREENPAK_DMA)
  161. {
  162. scsi_accel_greenpak_dma_init();
  163. }
  164. }
  165. /************************/
  166. /* SCSI bus phase logic */
  167. /************************/
  168. static SCSI_PHASE g_scsi_phase;
  169. extern "C" void scsiEnterPhase(int phase)
  170. {
  171. int delay = scsiEnterPhaseImmediate(phase);
  172. if (delay > 0)
  173. {
  174. s2s_delay_ns(delay);
  175. }
  176. }
  177. // Change state and return nanosecond delay to wait
  178. extern "C" uint32_t scsiEnterPhaseImmediate(int phase)
  179. {
  180. // ANSI INCITS 362-2002 SPI-3 10.7.1:
  181. // Phase changes are not allowed while REQ or ACK is asserted.
  182. while (likely(!scsiDev.resetFlag) && SCSI_IN(ACK)) {}
  183. if (phase != g_scsi_phase)
  184. {
  185. int oldphase = g_scsi_phase;
  186. g_scsi_phase = (SCSI_PHASE)phase;
  187. scsiLogPhaseChange(phase);
  188. if (phase < 0)
  189. {
  190. // Other communication on bus or reset state
  191. SCSI_RELEASE_OUTPUTS();
  192. return 0;
  193. }
  194. else
  195. {
  196. SCSI_OUT(MSG, phase & __scsiphase_msg);
  197. SCSI_OUT(CD, phase & __scsiphase_cd);
  198. SCSI_OUT(IO, phase & __scsiphase_io);
  199. int delayNs = 400; // Bus settle delay
  200. if ((oldphase & __scsiphase_io) != (phase & __scsiphase_io))
  201. {
  202. delayNs += 400; // Data release delay
  203. }
  204. if (scsiDev.compatMode < COMPAT_SCSI2)
  205. {
  206. // EMU EMAX needs 100uS ! 10uS is not enough.
  207. delayNs += 100000;
  208. }
  209. return delayNs;
  210. }
  211. }
  212. else
  213. {
  214. return 0;
  215. }
  216. }
  217. // Release all signals
  218. void scsiEnterBusFree(void)
  219. {
  220. g_scsi_phase = BUS_FREE;
  221. g_scsi_sts_selection = 0;
  222. g_scsi_ctrl_bsy = 0;
  223. scsiDev.cdbLen = 0;
  224. SCSI_RELEASE_OUTPUTS();
  225. }
  226. /********************/
  227. /* Transmit to host */
  228. /********************/
  229. #define SCSI_WAIT_ACTIVE(pin) \
  230. if (!SCSI_IN(pin)) { \
  231. if (!SCSI_IN(pin)) { \
  232. while(!SCSI_IN(pin) && !scsiDev.resetFlag); \
  233. } \
  234. }
  235. #define SCSI_WAIT_INACTIVE(pin) \
  236. if (SCSI_IN(pin)) { \
  237. if (SCSI_IN(pin)) { \
  238. while(SCSI_IN(pin) && !scsiDev.resetFlag); \
  239. } \
  240. }
  241. static inline void scsiWriteOneByte(uint8_t value)
  242. {
  243. SCSI_OUT_DATA(value);
  244. delay_100ns(); // DB setup time before REQ
  245. SCSI_OUT(REQ, 1);
  246. SCSI_WAIT_ACTIVE(ACK);
  247. SCSI_RELEASE_DATA_REQ(); // Release data and REQ
  248. SCSI_WAIT_INACTIVE(ACK);
  249. }
  250. extern "C" void scsiWriteByte(uint8_t value)
  251. {
  252. scsiLogDataIn(&value, 1);
  253. scsiWriteOneByte(value);
  254. }
  255. extern "C" void scsiWrite(const uint8_t* data, uint32_t count)
  256. {
  257. scsiStartWrite(data, count);
  258. scsiFinishWrite();
  259. }
  260. extern "C" void scsiStartWrite(const uint8_t* data, uint32_t count)
  261. {
  262. scsiLogDataIn(data, count);
  263. g_scsi_writereq.use_sync_mode = (g_scsi_phase == DATA_IN && scsiDev.target->syncOffset > 0);
  264. if (g_scsi_phy_mode == PHY_MODE_PIO
  265. || g_scsi_phy_mode == PHY_MODE_GREENPAK_PIO
  266. || g_scsi_writereq.use_sync_mode)
  267. {
  268. // Software based bit-banging.
  269. // Write requests are queued and then executed in isWriteFinished() callback.
  270. // This allows better parallelism with SD card transfers.
  271. if (g_scsi_writereq.count)
  272. {
  273. if (data == g_scsi_writereq.data + g_scsi_writereq.count)
  274. {
  275. // Combine with previous one
  276. g_scsi_writereq.count += count;
  277. return;
  278. }
  279. else
  280. {
  281. // Actually execute previous request
  282. scsiFinishWrite();
  283. }
  284. }
  285. g_scsi_writereq.data = data;
  286. g_scsi_writereq.count = count;
  287. }
  288. else if (g_scsi_phy_mode == PHY_MODE_DMA_TIMER || g_scsi_phy_mode == PHY_MODE_GREENPAK_DMA)
  289. {
  290. // Accelerated writes using DMA and timers
  291. scsi_accel_dma_startWrite(data, count, &scsiDev.resetFlag);
  292. }
  293. else
  294. {
  295. azlog("Unknown SCSI PHY mode: ", (int)g_scsi_phy_mode);
  296. }
  297. }
  298. static void processPollingWrite(uint32_t count)
  299. {
  300. if (count > g_scsi_writereq.count)
  301. count = g_scsi_writereq.count;
  302. const uint8_t *data = g_scsi_writereq.data;
  303. uint32_t count_words = count / 4;
  304. if (g_scsi_writereq.use_sync_mode)
  305. {
  306. // Synchronous mode transfer
  307. scsi_accel_sync_send(data, count, &scsiDev.resetFlag);
  308. }
  309. else if (count_words * 4 == count)
  310. {
  311. if (g_scsi_phy_mode == PHY_MODE_GREENPAK_PIO)
  312. {
  313. // GreenPAK PIO accelerated asynchronous transfer
  314. scsi_accel_greenpak_send((const uint32_t*)data, count_words, &scsiDev.resetFlag);
  315. }
  316. else
  317. {
  318. // Assembler optimized asynchronous transfer
  319. scsi_accel_asm_send((const uint32_t*)data, count_words, &scsiDev.resetFlag);
  320. }
  321. }
  322. else
  323. {
  324. // Use simple loop for unaligned transfers
  325. for (uint32_t i = 0; i < count; i++)
  326. {
  327. if (scsiDev.resetFlag) break;
  328. scsiWriteOneByte(data[i]);
  329. }
  330. }
  331. g_scsi_writereq.count -= count;
  332. if (g_scsi_writereq.count)
  333. {
  334. g_scsi_writereq.data += count;
  335. }
  336. else
  337. {
  338. g_scsi_writereq.data = NULL;
  339. }
  340. }
  341. static bool isPollingWriteFinished(const uint8_t *data)
  342. {
  343. if (g_scsi_writereq.count)
  344. {
  345. if (data == NULL)
  346. {
  347. return false;
  348. }
  349. else if (data >= g_scsi_writereq.data &&
  350. data < g_scsi_writereq.data + g_scsi_writereq.count)
  351. {
  352. return false;
  353. }
  354. }
  355. return true;
  356. }
  357. extern "C" bool scsiIsWriteFinished(const uint8_t *data)
  358. {
  359. // Check if there is still a polling transfer in progress
  360. if (!isPollingWriteFinished(data) && !check_sd_read_done())
  361. {
  362. // Process the transfer piece-by-piece while waiting
  363. // for SD card to react.
  364. int max_count = g_scsi_writereq.count / 8;
  365. // Always transfer whole sectors without pause to avoid problems with some SCSI hosts.
  366. int bytesPerSector = 512;
  367. if (scsiDev.target)
  368. {
  369. bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
  370. }
  371. if (max_count % bytesPerSector != 0) max_count -= (max_count % bytesPerSector);
  372. if (max_count < bytesPerSector) max_count = bytesPerSector;
  373. // Avoid SysTick interrupt pauses during the transfer
  374. SysTick_Handle_PreEmptively();
  375. processPollingWrite(max_count);
  376. return isPollingWriteFinished(data);
  377. }
  378. if (g_scsi_phy_mode == PHY_MODE_DMA_TIMER || g_scsi_phy_mode == PHY_MODE_GREENPAK_DMA)
  379. {
  380. return scsi_accel_dma_isWriteFinished(data);
  381. }
  382. else
  383. {
  384. return true;
  385. }
  386. }
  387. extern "C" void scsiFinishWrite()
  388. {
  389. if (g_scsi_writereq.count)
  390. {
  391. // Finish previously started polling write request.
  392. processPollingWrite(g_scsi_writereq.count);
  393. }
  394. if (g_scsi_phy_mode == PHY_MODE_DMA_TIMER || g_scsi_phy_mode == PHY_MODE_GREENPAK_DMA)
  395. {
  396. scsi_accel_dma_finishWrite(&scsiDev.resetFlag);
  397. }
  398. }
  399. /*********************/
  400. /* Receive from host */
  401. /*********************/
  402. static inline uint8_t scsiReadOneByte(void)
  403. {
  404. SCSI_OUT(REQ, 1);
  405. SCSI_WAIT_ACTIVE(ACK);
  406. delay_100ns();
  407. uint8_t r = SCSI_IN_DATA();
  408. SCSI_OUT(REQ, 0);
  409. SCSI_WAIT_INACTIVE(ACK);
  410. return r;
  411. }
  412. extern "C" uint8_t scsiReadByte(void)
  413. {
  414. uint8_t r = scsiReadOneByte();
  415. scsiLogDataOut(&r, 1);
  416. return r;
  417. }
  418. extern "C" void scsiRead(uint8_t* data, uint32_t count, int* parityError)
  419. {
  420. *parityError = 0;
  421. uint32_t count_words = count / 4;
  422. bool use_greenpak = (g_scsi_phy_mode == PHY_MODE_GREENPAK_DMA || g_scsi_phy_mode == PHY_MODE_GREENPAK_PIO);
  423. SysTick_Handle_PreEmptively();
  424. if (g_scsi_phase == DATA_OUT && scsiDev.target->syncOffset > 0)
  425. {
  426. // Synchronous data transfer
  427. scsi_accel_sync_recv(data, count, parityError, &scsiDev.resetFlag);
  428. }
  429. else if (count_words * 4 == count && count_words >= 2 && use_greenpak)
  430. {
  431. // GreenPAK accelerated receive can handle a multiple of 4 bytes with minimum of 8 bytes.
  432. scsi_accel_greenpak_recv((uint32_t*)data, count_words, &scsiDev.resetFlag);
  433. }
  434. else if (count_words * 4 == count && count_words >= 1)
  435. {
  436. // Optimized ASM subroutine can handle multiple of 4 bytes with minimum of 4 bytes.
  437. scsi_accel_asm_recv((uint32_t*)data, count_words, &scsiDev.resetFlag);
  438. }
  439. else
  440. {
  441. // Use a simple loop for short and unaligned transfers
  442. for (uint32_t i = 0; i < count; i++)
  443. {
  444. if (scsiDev.resetFlag) break;
  445. data[i] = scsiReadOneByte();
  446. }
  447. }
  448. scsiLogDataOut(data, count);
  449. }
  450. /**********************/
  451. /* Interrupt handlers */
  452. /**********************/
  453. extern "C"
  454. void SCSI_RST_IRQ (void)
  455. {
  456. if (exti_interrupt_flag_get(SCSI_RST_EXTI))
  457. {
  458. exti_interrupt_flag_clear(SCSI_RST_EXTI);
  459. scsi_rst_assert_interrupt();
  460. }
  461. if (exti_interrupt_flag_get(SCSI_BSY_EXTI))
  462. {
  463. exti_interrupt_flag_clear(SCSI_BSY_EXTI);
  464. scsi_bsy_deassert_interrupt();
  465. }
  466. if (exti_interrupt_flag_get(SCSI_SEL_EXTI))
  467. {
  468. // Check BSY line status when SEL goes active.
  469. // This is needed to handle SCSI-1 hosts that use the single initiator mode.
  470. // The host will just assert the SEL directly, without asserting BSY first.
  471. exti_interrupt_flag_clear(SCSI_SEL_EXTI);
  472. scsi_bsy_deassert_interrupt();
  473. }
  474. }
  475. #if SCSI_RST_IRQn != SCSI_BSY_IRQn
  476. extern "C"
  477. void SCSI_BSY_IRQ (void)
  478. {
  479. SCSI_RST_IRQ();
  480. }
  481. #endif
  482. #if (SCSI_SEL_IRQn != SCSI_RST_IRQn) && (SCSI_SEL_IRQn != SCSI_BSY_IRQn)
  483. extern "C"
  484. void SCSI_SEL_IRQ (void)
  485. {
  486. SCSI_RST_IRQ();
  487. }
  488. #endif
  489. static void init_irqs()
  490. {
  491. // Falling edge of RST pin
  492. gpio_exti_source_select(SCSI_RST_EXTI_SOURCE_PORT, SCSI_RST_EXTI_SOURCE_PIN);
  493. exti_init(SCSI_RST_EXTI, EXTI_INTERRUPT, EXTI_TRIG_FALLING);
  494. NVIC_SetPriority(SCSI_RST_IRQn, 1);
  495. NVIC_EnableIRQ(SCSI_RST_IRQn);
  496. // Rising edge of BSY pin
  497. gpio_exti_source_select(SCSI_BSY_EXTI_SOURCE_PORT, SCSI_BSY_EXTI_SOURCE_PIN);
  498. exti_init(SCSI_BSY_EXTI, EXTI_INTERRUPT, EXTI_TRIG_RISING);
  499. NVIC_SetPriority(SCSI_BSY_IRQn, 1);
  500. NVIC_EnableIRQ(SCSI_BSY_IRQn);
  501. // Falling edge of SEL pin
  502. gpio_exti_source_select(SCSI_SEL_EXTI_SOURCE_PORT, SCSI_SEL_EXTI_SOURCE_PIN);
  503. exti_init(SCSI_SEL_EXTI, EXTI_INTERRUPT, EXTI_TRIG_FALLING);
  504. NVIC_SetPriority(SCSI_SEL_IRQn, 1);
  505. NVIC_EnableIRQ(SCSI_SEL_IRQn);
  506. }