BlueSCSI_platform.cpp 48 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022-2025 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "BlueSCSI_platform.h"
  22. #include "BlueSCSI_log.h"
  23. #include <SdFat.h>
  24. #include <sdio.h>
  25. #include <scsi.h>
  26. #include <assert.h>
  27. #include <hardware/gpio.h>
  28. #include <hardware/pio.h>
  29. #include <hardware/uart.h>
  30. #include <hardware/pll.h>
  31. #include <hardware/clocks.h>
  32. #include <hardware/spi.h>
  33. #include <hardware/adc.h>
  34. #include <hardware/flash.h>
  35. #include <hardware/structs/xip_ctrl.h>
  36. #include <hardware/structs/usb.h>
  37. #include <hardware/sync.h>
  38. #include "scsi_accel_target.h"
  39. #include "custom_timings.h"
  40. #include <BlueSCSI_settings.h>
  41. #include <minIni.h>
  42. #ifdef SD_USE_RP2350_SDIO
  43. #include <sdio_rp2350.h>
  44. #else
  45. #include <sdio.h>
  46. #endif
  47. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  48. # include <SerialUSB.h>
  49. # include <class/cdc/cdc_device.h>
  50. #endif
  51. #include <pico/multicore.h>
  52. // Definitions of Global PIN definitions that may change depending on hardware rev
  53. uint32_t SCSI_ACCEL_PINMASK = SCSI_ACCEL_SETPINS;
  54. uint8_t SCSI_OUT_REQ = SCSI_OUT_REQ_CURRENT;
  55. #ifdef BLUESCSI_NETWORK
  56. extern "C" {
  57. # include <pico/cyw43_arch.h>
  58. }
  59. # ifdef BLUESCSI_RM2
  60. # include <pico/cyw43_driver.h>
  61. # endif
  62. #endif // BLUESCSI_NETWORK
  63. #ifdef PLATFORM_MASS_STORAGE
  64. #include "BlueSCSI_platform_msc.h"
  65. #endif
  66. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  67. # include "audio_spdif.h"
  68. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  69. # include "audio_i2s.h"
  70. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  71. extern bool g_rawdrive_active;
  72. extern "C" {
  73. #include "timings_RP2MCU.h"
  74. const char *g_platform_name = PLATFORM_NAME;
  75. static bool g_scsi_initiator = false;
  76. static bool g_supports_initiator = false;
  77. static uint32_t g_flash_chip_size = 0;
  78. static bool g_uart_initialized = false;
  79. static bool g_led_blinking = false;
  80. static void usb_log_poll();
  81. /***************/
  82. /* GPIO init */
  83. /***************/
  84. // Helper function to configure whole GPIO in one line
  85. static void gpio_conf(uint gpio, gpio_function_t fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  86. {
  87. gpio_put(gpio, initial_state);
  88. gpio_set_dir(gpio, output);
  89. gpio_set_pulls(gpio, pullup, pulldown);
  90. gpio_set_function(gpio, fn);
  91. if (fast_slew)
  92. {
  93. pads_bank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  94. }
  95. }
  96. static void reclock() {
  97. // ensure UART is fully drained before we mess up its clock
  98. if (uart_is_enabled(uart0))
  99. uart_tx_wait_blocking(uart0);
  100. // switch clk_sys and clk_peri to pll_usb
  101. // see code in 2.15.6.1 of the datasheet for useful comments
  102. clock_configure(clk_sys,
  103. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  104. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  105. 48 * MHZ,
  106. 48 * MHZ);
  107. clock_configure(clk_peri,
  108. 0,
  109. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  110. 48 * MHZ,
  111. 48 * MHZ);
  112. // reset PLL
  113. pll_init(pll_sys,
  114. g_bluescsi_timings->pll.refdiv,
  115. g_bluescsi_timings->pll.vco_freq,
  116. g_bluescsi_timings->pll.post_div1,
  117. g_bluescsi_timings->pll.post_div2);
  118. // switch clocks back to pll_sys
  119. clock_configure(clk_sys,
  120. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  121. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  122. g_bluescsi_timings->clk_hz,
  123. g_bluescsi_timings->clk_hz);
  124. clock_configure(clk_peri,
  125. 0,
  126. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  127. g_bluescsi_timings->clk_hz,
  128. g_bluescsi_timings->clk_hz);
  129. // reset UART for the new clock speed
  130. if (uart_is_enabled(uart0))
  131. uart_init(uart0, 1000000);
  132. }
  133. uint32_t platform_sys_clock_in_hz()
  134. {
  135. return clock_get_hz(clk_sys);
  136. }
  137. bool platform_reclock(bluescsi_speed_grade_t speed_grade)
  138. {
  139. CustomTimings ct;
  140. bool do_reclock = false;
  141. if (speed_grade != SPEED_GRADE_DEFAULT)
  142. {
  143. if (speed_grade == SPEED_GRADE_CUSTOM)
  144. {
  145. if (ct.use_custom_timings())
  146. {
  147. logmsg("Using custom timings found in \"", CUSTOM_TIMINGS_FILE, "\" for reclocking");
  148. ct.set_timings_from_file();
  149. do_reclock = true;
  150. }
  151. else
  152. {
  153. logmsg("Custom timings file, \"", CUSTOM_TIMINGS_FILE, "\" not found or disabled");
  154. }
  155. }
  156. else if (set_timings(speed_grade))
  157. do_reclock = true;
  158. if (do_reclock)
  159. {
  160. #ifdef ENABLE_AUDIO_OUTPUT
  161. if (g_bluescsi_timings->audio.audio_clocked)
  162. logmsg("Reclocking with these settings are compatible with CD audio playback");
  163. else
  164. logmsg("Reclocking with these settings may cause audio playback to be too fast or slow ");
  165. #endif
  166. logmsg("Initial Clock set to ", (int) platform_sys_clock_in_hz(), "Hz");
  167. logmsg("Reclocking the MCU to ",(int) g_bluescsi_timings->clk_hz, "Hz");
  168. #ifndef SD_USE_RP2350_SDIO
  169. logmsg("Setting the SDIO clock to ", (int)((g_bluescsi_timings->clk_hz / g_bluescsi_timings->sdio.clk_div_pio + (5 * MHZ / 10)) / MHZ) , "MHz");
  170. #endif
  171. usb_log_poll();
  172. reclock();
  173. logmsg("After reclocking, system reports clock set to ", (int) platform_sys_clock_in_hz(), "Hz");
  174. }
  175. }
  176. else
  177. dbgmsg("Speed grade is set to default, reclocking skipped");
  178. return do_reclock;
  179. }
  180. bool platform_rebooted_into_mass_storage()
  181. {
  182. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  183. if (*scratch0 == REBOOT_INTO_MASS_STORAGE_MAGIC_NUM)
  184. {
  185. *scratch0 = 0;
  186. return true;
  187. }
  188. return false;
  189. }
  190. #ifdef HAS_DIP_SWITCHES
  191. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  192. static pin_setup_state_t read_setup_ack_pin()
  193. {
  194. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  195. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  196. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  197. *
  198. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  199. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  200. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  201. */
  202. // Strong output high, then pulldown
  203. // pin function pup pdown out state fast
  204. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  205. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  206. delay(1);
  207. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  208. // Strong output low, then pullup
  209. // pin function pup pdown out state fast
  210. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  211. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  212. delay(1);
  213. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  214. if (ack_state1 == ack_state2)
  215. {
  216. // Ok, was able to read the state directly
  217. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  218. }
  219. // Enable OUT_BSY for a short time.
  220. // If in target mode, this will force GPIO_ACK high.
  221. gpio_put(SCSI_OUT_BSY, 0);
  222. delay_100ns();
  223. gpio_put(SCSI_OUT_BSY, 1);
  224. return SETUP_UNDETERMINED;
  225. }
  226. #endif
  227. bool is2023a() {
  228. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, false, false, false, false, true);
  229. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, false, false, false, false, true);
  230. delay(10);
  231. bool d50_2023_09a = gpio_get(GPIO_I2C_SCL) && gpio_get(GPIO_I2C_SDA);
  232. if (d50_2023_09a) {
  233. logmsg("I2C Supported");
  234. g_supports_initiator = true;
  235. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true, false, false, true, true);
  236. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true, false, false, true, true);
  237. // Use Pico SDK methods
  238. gpio_set_function(GPIO_I2C_SCL, GPIO_FUNC_I2C);
  239. gpio_set_function(GPIO_I2C_SDA, GPIO_FUNC_I2C);
  240. // gpio_pull_up(GPIO_I2C_SCL); // TODO necessary?
  241. // gpio_pull_up(GPIO_I2C_SDA);
  242. } else {
  243. logmsg("I2C Not Supported on this rev of hardware");
  244. /* Check option switch settings */
  245. // Option switches: S1 is iATN, S2 is iACK
  246. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  247. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, false, false, false, false, false);
  248. delay(10); /// Settle time
  249. // Check option switches
  250. [[maybe_unused]] bool optionS1 = !gpio_get(SCSI_IN_ATN);
  251. [[maybe_unused]] bool optionS2 = !gpio_get(SCSI_IN_ACK);
  252. // Reset REQ to the appropriate pin for older hardware
  253. SCSI_OUT_REQ = SCSI_OUT_REQ_PRE09A;
  254. SCSI_ACCEL_PINMASK = SCSI_ACCEL_SETPINS_PRE09A;
  255. // Initialize logging to SWO pin (UART0)
  256. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  257. uart_init(uart0, 115200);
  258. g_uart_initialized = true;
  259. }
  260. return d50_2023_09a;
  261. }
  262. void platform_init()
  263. {
  264. // Make sure second core is stopped
  265. multicore_reset_core1();
  266. pio_clear_instruction_memory(pio0);
  267. pio_clear_instruction_memory(pio1);
  268. /* First configure the pins that affect external buffer directions.
  269. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  270. */
  271. // pin function pup pdown out state fast
  272. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  273. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  274. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  275. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  276. /* Check dip switch settings */
  277. #ifdef HAS_DIP_SWITCHES
  278. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  279. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  280. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  281. delay(10); // 10 ms delay to let pull-ups do their work
  282. bool working_dip = true;
  283. bool dbglog = false;
  284. bool termination = false;
  285. # if defined(BLUESCSI_PICO) || defined(BLUESCSI_PICO_2)
  286. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  287. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  288. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  289. if (working_dip)
  290. {
  291. dbglog = !gpio_get(DIP_DBGLOG);
  292. termination = !gpio_get(DIP_TERM);
  293. }
  294. # elif defined(BLUESCSI_V2_0)
  295. pin_setup_state_t dip_state = read_setup_ack_pin();
  296. if (dip_state == SETUP_UNDETERMINED)
  297. {
  298. // This path is used for the few early RP2040 boards assembled with
  299. // Diodes Incorporated 74LVT245B, which has higher bus hold
  300. // current.
  301. working_dip = false;
  302. g_scsi_initiator = !gpio_get(DIP_INITIATOR); // Read fallback value
  303. }
  304. else
  305. {
  306. g_scsi_initiator = (SETUP_TRUE == dip_state);
  307. termination = !gpio_get(DIP_TERM);
  308. }
  309. // dbglog DIP switch works in any case, as it does not have bus hold.
  310. dbglog = !gpio_get(DIP_DBGLOG);
  311. g_log_debug = dbglog;
  312. # else
  313. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  314. termination = !gpio_get(DIP_TERM);
  315. dbglog = !gpio_get(DIP_DBGLOG);
  316. g_log_debug = dbglog;
  317. # endif
  318. #else
  319. delay(10);
  320. #endif // HAS_DIP_SWITCHES
  321. #ifndef DISABLE_SWO
  322. /* Initialize logging to SWO pin (UART0) */
  323. // gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  324. // uart_init(uart0, 1000000);
  325. // g_uart_initialized = true;
  326. #endif // DISABLE_SWO
  327. logmsg("Platform: ", g_platform_name);
  328. logmsg("FW Version: ", g_log_firmwareversion);
  329. #ifdef HAS_DIP_SWITCHES
  330. if (working_dip)
  331. {
  332. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  333. g_log_debug = dbglog;
  334. if (termination)
  335. {
  336. logmsg("SCSI termination is enabled");
  337. }
  338. else
  339. {
  340. logmsg("NOTE: SCSI termination is disabled");
  341. }
  342. }
  343. else
  344. {
  345. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  346. #if defined(BLUESCSI_PICO) || defined(BLUESCSI_PICO_2)
  347. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in bluescsi.ini");
  348. logmsg("-- DEBUG DIP switch setting is ignored on BlueSCSI Pico FS Rev. 2023b and 2023c boards");
  349. g_log_debug = false;
  350. #endif
  351. }
  352. #else
  353. g_log_debug = false;
  354. //logmsg ("SCSI termination is handled by a hardware jumper");
  355. #endif // HAS_DIP_SWITCHES
  356. logmsg("===========================================================");
  357. logmsg(" Powered by Raspberry Pi");
  358. logmsg(" Raspberry Pi is a trademark of Raspberry Pi Ltd");
  359. logmsg("===========================================================");
  360. // Get flash chip size
  361. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  362. uint8_t response_jedec[4] = {0};
  363. uint32_t saved_irq = save_and_disable_interrupts();
  364. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  365. restore_interrupts(saved_irq);
  366. g_flash_chip_size = (1 << response_jedec[3]);
  367. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  368. // SD card pins
  369. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  370. // pin function pup pdown out state fast
  371. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  372. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  373. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  374. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  375. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  376. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  377. // LED pin
  378. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  379. #ifndef ENABLE_AUDIO_OUTPUT_SPDIF
  380. #ifdef GPIO_I2C_SDA
  381. // I2C pins
  382. // pin function pup pdown out state fast
  383. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  384. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  385. #endif // GPIO_I2C_SDA
  386. #else
  387. // pin function pup pdown out state fast
  388. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  389. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  390. // configuration of corresponding SPI unit occurs in audio_setup()
  391. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  392. #ifdef GPIO_USB_POWER
  393. gpio_conf(GPIO_USB_POWER, GPIO_FUNC_SIO, false, false, false, false, false);
  394. #endif
  395. is2023a();
  396. }
  397. void platform_enable_initiator_mode()
  398. {
  399. logmsg("platform_enable_initiator_mode");
  400. if (ini_getbool("SCSI", "InitiatorMode", false, CONFIGFILE))
  401. {
  402. logmsg("InitiatorMode true");
  403. if (g_supports_initiator) {
  404. g_scsi_initiator = true;
  405. logmsg("SCSI Initiator Mode");
  406. if (! ini_getbool("SCSI", "InitiatorParity", true, CONFIGFILE))
  407. {
  408. logmsg("Initiator Mode Skipping Parity Check.");
  409. // setInitiatorModeParityCheck(false);
  410. }
  411. } else {
  412. logmsg("SCSI Initiator Mode not supported.");
  413. }
  414. }
  415. }
  416. // late_init() only runs in main application, SCSI not needed in bootloader
  417. void platform_late_init()
  418. {
  419. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  420. if (g_scsi_initiator == true)
  421. {
  422. logmsg("*************************************************************************");
  423. logmsg(" SCSI initiator mode enabled, expecting SCSI disks on the bus ");
  424. logmsg("*************************************************************************");
  425. }
  426. else
  427. {
  428. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  429. }
  430. #else
  431. // Initiator mode detected via ini.
  432. platform_enable_initiator_mode();
  433. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  434. /* Initialize SCSI pins to required modes.
  435. * SCSI pins should be inactive / input at this point.
  436. */
  437. // SCSI data bus direction is switched by DATA_DIR signal.
  438. // Pullups make sure that no glitches occur when switching direction.
  439. // pin function pup pdown out state fast
  440. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  441. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  442. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  443. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  444. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  445. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  446. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  447. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  448. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  449. if (!g_scsi_initiator)
  450. {
  451. // Act as SCSI device / target
  452. // SCSI control outputs
  453. // pin function pup pdown out state fast
  454. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  455. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  456. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  457. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  458. // Shared pins are changed to input / output depending on communication phase
  459. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  460. if (SCSI_OUT_CD != SCSI_IN_SEL)
  461. {
  462. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  463. }
  464. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  465. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  466. {
  467. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  468. }
  469. // SCSI control inputs
  470. // pin function pup pdown out state fast
  471. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  472. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  473. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  474. #ifdef BLUESCSI_RM2
  475. uint rm2_pins[CYW43_PIN_INDEX_WL_COUNT] = {0};
  476. rm2_pins[CYW43_PIN_INDEX_WL_REG_ON] = GPIO_RM2_ON;
  477. rm2_pins[CYW43_PIN_INDEX_WL_DATA_OUT] = GPIO_RM2_DATA;
  478. rm2_pins[CYW43_PIN_INDEX_WL_DATA_IN] = GPIO_RM2_DATA;
  479. rm2_pins[CYW43_PIN_INDEX_WL_HOST_WAKE] = GPIO_RM2_DATA;
  480. rm2_pins[CYW43_PIN_INDEX_WL_CLOCK] = GPIO_RM2_CLK;
  481. rm2_pins[CYW43_PIN_INDEX_WL_CS] = GPIO_RM2_CS;
  482. assert(PICO_OK == cyw43_set_pins_wl(rm2_pins));
  483. if (platform_reclock(SPEED_GRADE_WIFI_RM2))
  484. {
  485. // The iface check turns on the LED on the RM2 early in the init process
  486. // Should tell the user that the RM2 is working
  487. if(platform_network_iface_check())
  488. {
  489. logmsg("RM2 found");
  490. }
  491. else
  492. {
  493. # ifdef BLUESCSI_BLASTER
  494. logmsg("RM2 not found, upclocking");
  495. platform_reclock(SPEED_GRADE_AUDIO_I2S);
  496. # else
  497. logmsg("RM2 not found");
  498. # endif
  499. }
  500. }
  501. else
  502. {
  503. logmsg("WiFi RM2 timings not found");
  504. }
  505. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  506. logmsg("I2S audio to expansion header enabled");
  507. if (!platform_reclock(SPEED_GRADE_AUDIO_I2S))
  508. {
  509. logmsg("Audio output timings not found");
  510. }
  511. #elif defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  512. logmsg("S/PDIF audio to expansion header enabled");
  513. if (platform_reclock(SPEED_GRADE_AUDIO_SPDIF))
  514. {
  515. logmsg("Reclocked for Audio Ouput at ", (int) platform_sys_clock_in_hz(), "Hz");
  516. }
  517. else
  518. {
  519. logmsg("Audio Output timings not found");
  520. }
  521. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  522. // This should turn on the LED for Pico 1/2 W devices early in the init process
  523. // It should help indicate to the user that interface is working and the board is ready for DaynaPORT
  524. #if defined(BLUESCSI_NETWORK) && ! defined(BLUESCSI_RM2)
  525. platform_network_iface_check();
  526. #endif
  527. #ifdef ENABLE_AUDIO_OUTPUT
  528. // one-time control setup for DMA channels and second core
  529. audio_setup();
  530. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  531. }
  532. else
  533. {
  534. #ifndef PLATFORM_HAS_INITIATOR_MODE
  535. assert(false);
  536. #else
  537. // Act as SCSI initiator
  538. // pin function pup pdown out state fast
  539. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  540. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  541. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  542. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  543. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  544. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  545. // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST.
  546. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true);
  547. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  548. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true);
  549. gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true);
  550. #endif // PLATFORM_HAS_INITIATOR_MODE
  551. }
  552. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  553. Serial.begin();
  554. #endif
  555. scsi_accel_rp2040_init();
  556. }
  557. void platform_post_sd_card_init() {}
  558. bool platform_is_initiator_mode_enabled()
  559. {
  560. // logmsg("Initiator mode enabled: ", g_scsi_initiator);
  561. return g_scsi_initiator;
  562. }
  563. void platform_write_led(bool state)
  564. {
  565. if (g_led_blinking) return;
  566. if (g_scsi_settings.getSystem()->invertStatusLed)
  567. state = !state;
  568. gpio_put(LED_PIN, state);
  569. }
  570. void platform_set_blink_status(bool status)
  571. {
  572. g_led_blinking = status;
  573. }
  574. void platform_write_led_override(bool state)
  575. {
  576. if (g_scsi_settings.getSystem()->invertStatusLed)
  577. state = !state;
  578. gpio_put(LED_PIN, state);
  579. }
  580. void platform_disable_led(void)
  581. {
  582. // pin function pup pdown out state fast
  583. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  584. logmsg("Disabling status LED");
  585. }
  586. uint8_t platform_no_sd_card_on_init_error_code()
  587. {
  588. return SDIO_ERR_RESPONSE_TIMEOUT;
  589. }
  590. /*****************************************/
  591. /* Crash handlers */
  592. /*****************************************/
  593. extern SdFs SD;
  594. extern uint32_t __StackTop;
  595. void platform_emergency_log_save()
  596. {
  597. if (g_rawdrive_active)
  598. return;
  599. platform_set_sd_callback(NULL, NULL);
  600. SD.begin(SD_CONFIG_CRASH);
  601. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  602. if (!crashfile.isOpen())
  603. {
  604. // Try to reinitialize
  605. int max_retry = 10;
  606. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  607. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  608. }
  609. uint32_t startpos = 0;
  610. crashfile.write(log_get_buffer(&startpos));
  611. crashfile.write(log_get_buffer(&startpos));
  612. crashfile.flush();
  613. crashfile.close();
  614. }
  615. static void usb_log_poll();
  616. static void usb_input_poll();
  617. __attribute__((noinline))
  618. void show_hardfault(uint32_t *sp)
  619. {
  620. uint32_t pc = sp[6];
  621. uint32_t lr = sp[5];
  622. logmsg("--------------");
  623. logmsg("CRASH!");
  624. logmsg("Platform: ", g_platform_name);
  625. logmsg("FW Version: ", g_log_firmwareversion);
  626. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  627. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  628. logmsg("SP: ", (uint32_t)sp);
  629. logmsg("PC: ", pc);
  630. logmsg("LR: ", lr);
  631. logmsg("R0: ", sp[0]);
  632. logmsg("R1: ", sp[1]);
  633. logmsg("R2: ", sp[2]);
  634. logmsg("R3: ", sp[3]);
  635. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  636. for (int i = 0; i < 8; i++)
  637. {
  638. if (p == &__StackTop) break; // End of stack
  639. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  640. p += 4;
  641. }
  642. platform_emergency_log_save();
  643. while (1)
  644. {
  645. usb_log_poll();
  646. // Flash the crash address on the LED
  647. // Short pulse means 0, long pulse means 1
  648. int base_delay = 500;
  649. for (int i = 31; i >= 0; i--)
  650. {
  651. LED_OFF();
  652. for (int j = 0; j < base_delay; j++) busy_wait_ms(1);
  653. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  654. LED_ON();
  655. for (int j = 0; j < delay; j++) busy_wait_ms(1);
  656. LED_OFF();
  657. }
  658. for (int j = 0; j < base_delay * 10; j++) busy_wait_ms(1);
  659. }
  660. }
  661. __attribute__((naked, interrupt))
  662. void isr_hardfault(void)
  663. {
  664. // Copies stack pointer into first argument
  665. asm("mrs r0, msp\n"
  666. "bl show_hardfault": : : "r0");
  667. }
  668. /*****************************************/
  669. /* Debug logging and watchdog */
  670. /*****************************************/
  671. static bool usb_serial_connected()
  672. {
  673. #ifdef PIO_FRAMEWORK_ARDUINO_NO_USB
  674. return false;
  675. #endif
  676. static bool connected;
  677. static uint32_t last_check_time;
  678. #ifdef PLATFORM_MASS_STORAGE
  679. if (platform_msc_lock_get()) return connected; // Avoid re-entrant USB events
  680. #endif
  681. if (last_check_time == 0 || (uint32_t)(millis() - last_check_time) > 50)
  682. {
  683. connected = bool(Serial);
  684. last_check_time = millis();
  685. }
  686. return connected;
  687. }
  688. // Send log data to USB UART if USB is connected.
  689. // Data is retrieved from the shared log ring buffer and
  690. // this function sends as much as fits in USB CDC buffer.
  691. //
  692. // This is normally called by platform_reset_watchdog() in
  693. // the normal polling loop. If code hangs, the watchdog_callback()
  694. // also starts calling this after 2 seconds.
  695. // This ensures that log messages get passed even if code hangs,
  696. // but does not unnecessarily delay normal execution.
  697. static void usb_log_poll()
  698. {
  699. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  700. static uint32_t logpos = 0;
  701. if (!usb_serial_connected()) return;
  702. #ifdef PLATFORM_MASS_STORAGE
  703. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  704. #endif
  705. if (Serial.availableForWrite())
  706. {
  707. // Retrieve pointer to log start and determine number of bytes available.
  708. uint32_t available = 0;
  709. const char *data = log_get_buffer(&logpos, &available);
  710. // Limit to CDC packet size
  711. uint32_t len = available;
  712. if (len == 0) return;
  713. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  714. // Update log position by the actual number of bytes sent
  715. // If USB CDC buffer is full, this may be 0
  716. uint32_t actual = 0;
  717. actual = Serial.write(data, len);
  718. logpos -= available - actual;
  719. }
  720. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  721. }
  722. // Grab input from USB Serial terminal
  723. static void usb_input_poll()
  724. {
  725. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  726. if (!usb_serial_connected()) return;
  727. #ifdef PLATFORM_MASS_STORAGE
  728. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  729. #endif
  730. // Capture reboot key sequence
  731. static bool mass_storage_reboot_keyed = false;
  732. static bool basic_reboot_keyed = false;
  733. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  734. int32_t available = Serial.available();
  735. if(available > 0)
  736. {
  737. int32_t read = Serial.read();
  738. switch((char) read)
  739. {
  740. case 'R':
  741. case 'r':
  742. basic_reboot_keyed = true;
  743. mass_storage_reboot_keyed = false;
  744. logmsg("Basic reboot requested, press 'y' to engage or any key to clear");
  745. break;
  746. case 'M':
  747. case 'm':
  748. mass_storage_reboot_keyed = true;
  749. basic_reboot_keyed = false;
  750. logmsg("Boot into mass storage requested, press 'y' to engage or any key to clear");
  751. *scratch0 = REBOOT_INTO_MASS_STORAGE_MAGIC_NUM;
  752. break;
  753. case 'Y':
  754. case 'y':
  755. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  756. {
  757. logmsg("Rebooting", mass_storage_reboot_keyed ? " into mass storage": "");
  758. watchdog_reboot(0, 0, 2000);
  759. }
  760. break;
  761. case '\n':
  762. break;
  763. default:
  764. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  765. logmsg("Cleared reboot setting");
  766. mass_storage_reboot_keyed = false;
  767. basic_reboot_keyed = false;
  768. }
  769. }
  770. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  771. }
  772. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  773. // This works by sampling the temperature sensor channel, which has
  774. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  775. static void adc_poll()
  776. {
  777. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  778. static bool initialized = false;
  779. static bool adc_initial_logged = false;
  780. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  781. if (!initialized)
  782. {
  783. adc_init();
  784. adc_set_temp_sensor_enabled(true);
  785. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  786. #ifdef BLUESCSI_BLASTER
  787. adc_select_input(8);
  788. #else
  789. adc_select_input(4);
  790. #endif
  791. adc_fifo_setup(true, false, 0, false, false);
  792. adc_run(true);
  793. initialized = true;
  794. }
  795. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  796. /*
  797. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  798. * at the same time a SPI DMA write begins, it appears that the first
  799. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  800. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  801. * is playing.
  802. */
  803. if (audio_is_active()) return;
  804. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  805. int adc_value_max = 0;
  806. while (!adc_fifo_is_empty())
  807. {
  808. int adc_value = adc_fifo_get();
  809. if (adc_value > adc_value_max) adc_value_max = adc_value;
  810. }
  811. // adc_value = 700mV * 4096 / Vdd
  812. // => Vdd = 700mV * 4096 / adc_value
  813. // To avoid wasting time on division, compare against
  814. // limit directly.
  815. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  816. if (adc_value_max > limit)
  817. {
  818. // Warn once, and then again if we detect even a lower drop.
  819. int vdd_mV = (700 * 4096) / adc_value_max;
  820. if (vdd_mV < lowest_vdd_seen)
  821. {
  822. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  823. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  824. }
  825. }
  826. else if (!adc_initial_logged && adc_value_max != 0)
  827. {
  828. adc_initial_logged = true;
  829. int vdd_mV = (700 * 4096) / adc_value_max;
  830. logmsg("INFO: Pico Voltage: ", (vdd_mV / 1000.0), "V.");
  831. }
  832. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  833. }
  834. // This function is called for every log message.
  835. void platform_log(const char *s)
  836. {
  837. if (g_uart_initialized)
  838. {
  839. uart_puts(uart0, s);
  840. }
  841. }
  842. static int g_watchdog_timeout;
  843. static bool g_watchdog_initialized;
  844. static void watchdog_callback(unsigned alarm_num)
  845. {
  846. g_watchdog_timeout -= 1000;
  847. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  848. {
  849. // Been stuck for at least a second, start dumping USB log
  850. usb_log_poll();
  851. }
  852. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  853. {
  854. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  855. {
  856. logmsg("--------------");
  857. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  858. logmsg("Platform: ", g_platform_name);
  859. logmsg("FW Version: ", g_log_firmwareversion);
  860. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  861. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  862. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  863. scsi_accel_log_state();
  864. uint32_t msp;
  865. asm volatile ("MRS %0, msp" : "=r" (msp) );
  866. uint32_t *p = (uint32_t*)msp;
  867. for (int i = 0; i < 8; i++)
  868. {
  869. if (p == &__StackTop) break; // End of stack
  870. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  871. p += 4;
  872. }
  873. scsiDev.resetFlag = 1;
  874. g_scsiHostPhyReset = true;
  875. }
  876. if (g_watchdog_timeout <= 0)
  877. {
  878. logmsg("--------------");
  879. logmsg("WATCHDOG TIMEOUT, already attempted bus reset, rebooting");
  880. logmsg("Platform: ", g_platform_name);
  881. logmsg("FW Version: ", g_log_firmwareversion);
  882. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  883. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  884. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  885. uint32_t msp;
  886. asm volatile ("MRS %0, msp" : "=r" (msp) );
  887. uint32_t *p = (uint32_t*)msp;
  888. for (int i = 0; i < 8; i++)
  889. {
  890. if (p == &__StackTop) break; // End of stack
  891. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  892. p += 4;
  893. }
  894. usb_log_poll();
  895. platform_emergency_log_save();
  896. platform_boot_to_main_firmware();
  897. }
  898. }
  899. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  900. }
  901. // This function can be used to periodically reset watchdog timer for crash handling.
  902. // It can also be left empty if the platform does not use a watchdog timer.
  903. void platform_reset_watchdog()
  904. {
  905. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  906. if (!g_watchdog_initialized)
  907. {
  908. int alarm_num = -1;
  909. for (int i = 0; i < NUM_GENERIC_TIMERS; i++)
  910. {
  911. if (!hardware_alarm_is_claimed(i))
  912. {
  913. alarm_num = i;
  914. break;
  915. }
  916. }
  917. if (alarm_num == -1)
  918. {
  919. logmsg("No free watchdog hardware alarms to claim");
  920. return;
  921. }
  922. hardware_alarm_claim(alarm_num);
  923. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  924. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  925. g_watchdog_initialized = true;
  926. }
  927. // USB log is polled here also to make sure any log messages in fault states
  928. // get passed to USB.
  929. usb_log_poll();
  930. }
  931. // Poll function that is called every few milliseconds.
  932. // Can be left empty or used for platform-specific processing.
  933. void platform_poll()
  934. {
  935. usb_input_poll();
  936. usb_log_poll();
  937. adc_poll();
  938. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF) || defined(ENABLE_AUDIO_OUTPUT_I2S)
  939. audio_poll();
  940. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  941. }
  942. void platform_reset_mcu()
  943. {
  944. watchdog_reboot(0, 0, 2000);
  945. }
  946. uint8_t platform_get_buttons()
  947. {
  948. uint8_t buttons = 0;
  949. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  950. // pulled to VCC via resistor, sinking when pressed
  951. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  952. #elif defined(GPIO_I2C_SDA)
  953. // SDA = button 1, SCL = button 2
  954. if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  955. if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  956. #endif // defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  957. // Simple debouncing logic: handle button releases after 100 ms delay.
  958. static uint32_t debounce;
  959. static uint8_t buttons_debounced = 0;
  960. if (buttons != 0)
  961. {
  962. buttons_debounced = buttons;
  963. debounce = millis();
  964. }
  965. else if ((uint32_t)(millis() - debounce) > 100)
  966. {
  967. buttons_debounced = 0;
  968. }
  969. return buttons_debounced;
  970. }
  971. bool platform_has_phy_eject_button()
  972. {
  973. return false;
  974. }
  975. /************************************/
  976. /* ROM drive in extra flash space */
  977. /************************************/
  978. #ifdef PLATFORM_HAS_ROM_DRIVE
  979. # ifndef ROMDRIVE_OFFSET
  980. // Reserve up to 352 kB for firmware by default.
  981. #define ROMDRIVE_OFFSET (352 * 1024)
  982. # endif
  983. uint32_t platform_get_romdrive_maxsize()
  984. {
  985. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  986. {
  987. return g_flash_chip_size - ROMDRIVE_OFFSET;
  988. }
  989. else
  990. {
  991. // Failed to read flash chip size, default to 2 MB
  992. return 2048 * 1024 - ROMDRIVE_OFFSET;
  993. }
  994. }
  995. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  996. {
  997. xip_ctrl_hw->stream_ctr = 0;
  998. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  999. {
  1000. (void) xip_ctrl_hw->stream_fifo;
  1001. }
  1002. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  1003. xip_ctrl_hw->stream_ctr = count / 4;
  1004. // Transfer happens in multiples of 4 bytes
  1005. assert(start < platform_get_romdrive_maxsize());
  1006. assert((count & 3) == 0);
  1007. assert((((uint32_t)dest) & 3) == 0);
  1008. uint32_t *dest32 = (uint32_t*)dest;
  1009. uint32_t words_remain = count / 4;
  1010. while (words_remain > 0)
  1011. {
  1012. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  1013. {
  1014. *dest32++ = xip_ctrl_hw->stream_fifo;
  1015. words_remain--;
  1016. }
  1017. }
  1018. return true;
  1019. }
  1020. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  1021. {
  1022. assert(start < platform_get_romdrive_maxsize());
  1023. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  1024. uint32_t saved_irq = save_and_disable_interrupts();
  1025. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  1026. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  1027. restore_interrupts(saved_irq);
  1028. return true;
  1029. }
  1030. #endif // PLATFORM_HAS_ROM_DRIVE
  1031. /**********************************************/
  1032. /* Mapping from data bytes to GPIO BOP values */
  1033. /**********************************************/
  1034. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  1035. * For RP2040 we expect that the bits are consecutive and in order.
  1036. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  1037. * The parity table is placed into SRAM4 area to reduce bus contention.
  1038. */
  1039. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  1040. #ifdef BLUESCSI_BLASTER
  1041. # define X(n) (\
  1042. ((n & 0x01) ? 0 : (1 << 0)) | \
  1043. ((n & 0x02) ? 0 : (1 << 1)) | \
  1044. ((n & 0x04) ? 0 : (1 << 2)) | \
  1045. ((n & 0x08) ? 0 : (1 << 3)) | \
  1046. ((n & 0x10) ? 0 : (1 << 4)) | \
  1047. ((n & 0x20) ? 0 : (1 << 5)) | \
  1048. ((n & 0x40) ? 0 : (1 << 6)) | \
  1049. ((n & 0x80) ? 0 : (1 << 7)) | \
  1050. (PARITY(n) ? 0 : (1 << 8)) \
  1051. )
  1052. #else
  1053. # define X(n) (\
  1054. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  1055. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  1056. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  1057. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  1058. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  1059. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  1060. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  1061. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  1062. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  1063. )
  1064. #endif
  1065. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  1066. {
  1067. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  1068. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  1069. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  1070. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  1071. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  1072. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  1073. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  1074. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  1075. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  1076. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  1077. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  1078. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  1079. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  1080. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  1081. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  1082. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  1083. };
  1084. #undef X
  1085. /* Similarly, another lookup table is used to verify parity of received data.
  1086. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  1087. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  1088. */
  1089. #define X(n) (\
  1090. ((n & 0xFF) ^ 0xFF) | \
  1091. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  1092. )
  1093. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  1094. {
  1095. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  1096. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  1097. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  1098. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  1099. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  1100. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  1101. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  1102. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  1103. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  1104. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  1105. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  1106. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  1107. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  1108. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  1109. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  1110. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  1111. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  1112. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  1113. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  1114. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  1115. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  1116. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  1117. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  1118. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  1119. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  1120. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  1121. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  1122. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  1123. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  1124. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  1125. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  1126. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  1127. };
  1128. #undef X
  1129. } /* extern "C" */
  1130. #ifdef SD_USE_SDIO
  1131. // These functions are not used for SDIO mode but are needed to avoid build error.
  1132. void sdCsInit(SdCsPin_t pin) {}
  1133. void sdCsWrite(SdCsPin_t pin, bool level) {}
  1134. // SDIO configuration for main program
  1135. SdioConfig g_sd_sdio_config(DMA_SDIO);
  1136. #ifdef SD_USE_RP2350_SDIO
  1137. void platform_set_sd_callback(sd_callback_t func, const uint8_t *buffer)
  1138. {
  1139. rp2350_sdio_sdfat_set_callback(func, buffer);
  1140. }
  1141. #endif
  1142. #endif