2020c.diff 7.8 KB

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  1. diff --git a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
  2. index 569c8b1..cd27bd7 100644
  3. --- a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
  4. +++ b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
  5. @@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
  6. /* Enable SDIO Clock */
  7. __HAL_SD_ENABLE(hsd);
  8. + /* 1ms: required power up waiting time before starting the SD initialization
  9. + sequence */
  10. + HAL_Delay(1);
  11. +
  12. /* Identify card operating voltage */
  13. errorstate = SD_PowerON(hsd);
  14. if(errorstate != HAL_SD_ERROR_NONE)
  15. @@ -1227,22 +1231,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
  16. else
  17. {
  18. /* Enable SD DMA transfer */
  19. - __HAL_SD_DMA_ENABLE(hsd);
  20. + // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
  21. if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
  22. {
  23. add *= 512U;
  24. - }
  25. - /* Set Block Size for Card */
  26. - errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
  27. - if(errorstate != HAL_SD_ERROR_NONE)
  28. - {
  29. - /* Clear all the static flags */
  30. - __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
  31. - hsd->ErrorCode |= errorstate;
  32. - hsd->State = HAL_SD_STATE_READY;
  33. - return HAL_ERROR;
  34. + /* Set Block Size for Card */
  35. + errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
  36. + if(errorstate != HAL_SD_ERROR_NONE)
  37. + {
  38. + /* Clear all the static flags */
  39. + __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
  40. + hsd->ErrorCode |= errorstate;
  41. + hsd->State = HAL_SD_STATE_READY;
  42. + return HAL_ERROR;
  43. + }
  44. }
  45. /* Configure the SD DPSM (Data Path State Machine) */
  46. @@ -1252,6 +1256,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
  47. config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
  48. config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
  49. config.DPSM = SDIO_DPSM_ENABLE;
  50. +
  51. + // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
  52. + // data is just discarded before the dpsm is started.
  53. + __HAL_SD_DMA_ENABLE(hsd);
  54. +
  55. (void)SDIO_ConfigData(hsd->Instance, &config);
  56. /* Read Blocks in DMA mode */
  57. @@ -1343,17 +1352,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
  58. if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
  59. {
  60. add *= 512U;
  61. - }
  62. - /* Set Block Size for Card */
  63. - errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
  64. - if(errorstate != HAL_SD_ERROR_NONE)
  65. - {
  66. - /* Clear all the static flags */
  67. - __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
  68. - hsd->ErrorCode |= errorstate;
  69. - hsd->State = HAL_SD_STATE_READY;
  70. - return HAL_ERROR;
  71. + /* Set Block Size for Card */
  72. + errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
  73. + if(errorstate != HAL_SD_ERROR_NONE)
  74. + {
  75. + /* Clear all the static flags */
  76. + __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
  77. + hsd->ErrorCode |= errorstate;
  78. + hsd->State = HAL_SD_STATE_READY;
  79. + return HAL_ERROR;
  80. + }
  81. }
  82. /* Write Blocks in Polling mode */
  83. @@ -1361,6 +1370,18 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
  84. {
  85. hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
  86. + /* MM: Prepare for write */
  87. +/* TODO
  88. + SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->RCA << 16));
  89. + SDIO_CmdInitTypeDef mm_cmdinit;
  90. + mm_cmdinit.Argument = (uint32_t)NumberOfBlocks;
  91. + mm_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT;
  92. + mm_cmdinit.Response = SDIO_RESPONSE_SHORT;
  93. + mm_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  94. + mm_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  95. + (void)SDIO_SendCommand(hsd->Instance, &mm_cmdinit);
  96. + SDMMC_GetCmdResp1(hsd->Instance, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);*/
  97. +
  98. /* Write Multi Block command */
  99. errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
  100. }
  101. @@ -1382,7 +1403,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
  102. }
  103. /* Enable SDIO DMA transfer */
  104. - __HAL_SD_DMA_ENABLE(hsd);
  105. + // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
  106. /* Enable the DMA Channel */
  107. if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
  108. @@ -1403,6 +1424,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
  109. config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD;
  110. config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
  111. config.DPSM = SDIO_DPSM_ENABLE;
  112. +
  113. + // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
  114. + // data is just discarded before the dpsm is started.
  115. + __HAL_SD_DMA_ENABLE();
  116. +
  117. (void)SDIO_ConfigData(hsd->Instance, &config);
  118. return HAL_OK;
  119. diff --git a/STM32CubeMX/2020c/Src/fsmc.c b/STM32CubeMX/2020c/Src/fsmc.c
  120. index 03a1b12..1b01446 100644
  121. --- a/STM32CubeMX/2020c/Src/fsmc.c
  122. +++ b/STM32CubeMX/2020c/Src/fsmc.c
  123. @@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
  124. hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
  125. hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
  126. /* Timing */
  127. +
  128. + // 1 clock to read the address, + 1 for synchroniser skew
  129. Timing.AddressSetupTime = 2;
  130. Timing.AddressHoldTime = 1;
  131. +
  132. + // Writes to device:
  133. + // 1 for synchroniser skew (dbx also delayed)
  134. + // 1 to skip hold time
  135. + // 1 to write data.
  136. +
  137. + // Reads from device:
  138. + // 3 for syncroniser
  139. + // 1 to write back to fsmc bus.
  140. Timing.DataSetupTime = 4;
  141. +
  142. + // Allow a clock for us to release signals
  143. + // Need to avoid both devices acting as outputs
  144. + // on the multiplexed lines at the same time.
  145. Timing.BusTurnAroundDuration = 1;
  146. - Timing.CLKDivision = 16;
  147. - Timing.DataLatency = 17;
  148. +
  149. + Timing.CLKDivision = 16; // Ignored for async
  150. + Timing.DataLatency = 17; // Ignored for async
  151. Timing.AccessMode = FSMC_ACCESS_MODE_A;
  152. /* ExtTiming */
  153. @@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
  154. PE0 ------> FSMC_NBL0
  155. PE1 ------> FSMC_NBL1
  156. */
  157. +
  158. + // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
  159. + // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
  160. +
  161. /* GPIO_InitStruct */
  162. GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
  163. |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
  164. diff --git a/STM32CubeMX/2020c/Src/sdio.c b/STM32CubeMX/2020c/Src/sdio.c
  165. index aeec4fa..01f716a 100644
  166. --- a/STM32CubeMX/2020c/Src/sdio.c
  167. +++ b/STM32CubeMX/2020c/Src/sdio.c
  168. @@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
  169. hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
  170. hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
  171. hsd.Init.ClockDiv = 0;
  172. +
  173. + /*
  174. if (HAL_SD_Init(&hsd) != HAL_OK)
  175. {
  176. Error_Handler();
  177. @@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
  178. if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
  179. {
  180. Error_Handler();
  181. - }
  182. -
  183. + }*/
  184. }
  185. void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
  186. diff --git a/STM32CubeMX/2020c/Src/spi.c b/STM32CubeMX/2020c/Src/spi.c
  187. index 902bdb2..4935bf0 100644
  188. --- a/STM32CubeMX/2020c/Src/spi.c
  189. +++ b/STM32CubeMX/2020c/Src/spi.c
  190. @@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
  191. hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
  192. hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
  193. hspi1.Init.NSS = SPI_NSS_SOFT;
  194. +
  195. + // 13.5Mbaud FPGA device allows up to 25MHz write
  196. hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
  197. hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
  198. hspi1.Init.TIMode = SPI_TIMODE_DISABLE;