CyFlash.c 24 KB

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  1. /*******************************************************************************
  2. * File Name: CyFlash.c
  3. * Version 4.20
  4. *
  5. * Description:
  6. * Provides an API for the FLASH/EEPROM.
  7. *
  8. * Note:
  9. * This code is endian agnostic.
  10. *
  11. * Note:
  12. * Documentation of the API's in this file is located in the
  13. * System Reference Guide provided with PSoC Creator.
  14. *
  15. ********************************************************************************
  16. * Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
  17. * You may use this file only in accordance with the license, terms, conditions,
  18. * disclaimers, and limitations in the end user license agreement accompanying
  19. * the software package with which this file was provided.
  20. *******************************************************************************/
  21. #include "CyFlash.h"
  22. /* The number of EEPROM arrays */
  23. #define CY_FLASH_EEPROM_NUMBER_ARRAYS (1u)
  24. /*******************************************************************************
  25. * Holds the die temperature, updated by CySetTemp(). Used for flash writing.
  26. * The first byte is the sign of the temperature (0 = negative, 1 = positive).
  27. * The second byte is the magnitude.
  28. *******************************************************************************/
  29. uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];
  30. #if(CYDEV_ECC_ENABLE == 0)
  31. static uint8 * rowBuffer = 0;
  32. #endif /* (CYDEV_ECC_ENABLE == 0) */
  33. static cystatus CySetTempInt(void);
  34. static cystatus CyFlashGetSpcAlgorithm(void);
  35. /*******************************************************************************
  36. * Function Name: CyFlash_Start
  37. ********************************************************************************
  38. *
  39. * Summary:
  40. * Enable the Flash.
  41. *
  42. * Parameters:
  43. * None
  44. *
  45. * Return:
  46. * None
  47. *
  48. *******************************************************************************/
  49. void CyFlash_Start(void)
  50. {
  51. uint8 interruptState;
  52. interruptState = CyEnterCriticalSection();
  53. /***************************************************************************
  54. * Enable SPC clock. This also internally enables the 36MHz IMO, since this
  55. * is required for the SPC to function.
  56. ***************************************************************************/
  57. CY_FLASH_PM_ACT_CFG0_REG |= CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC;
  58. CY_FLASH_PM_ALTACT_CFG0_REG |= CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC;
  59. /***************************************************************************
  60. * The wake count defines the number of Bus Clock cycles it takes for the
  61. * flash or eeprom to wake up from a low power mode independent of the chip
  62. * power mode. Wake up time for these blocks is 5 us.
  63. * The granularity of this register is 2 Bus Clock cycles, so a value of 0x1E
  64. * (30d) defines the wake up time as 60 cycles of the Bus Clock.
  65. * This register needs to be written with a value dependent on the Bus Clock
  66. * frequency so that the duration of the cycles is equal to or greater than
  67. * the 5 us delay required.
  68. ***************************************************************************/
  69. CY_FLASH_SPC_FM_EE_WAKE_CNT_REG = CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ;
  70. /***************************************************************************
  71. * Enable flash. Active flash macros consume current, but re-enabling a
  72. * disabled flash macro takes 5us. If the CPU attempts to fetch out of the
  73. * macro during that time, it will be stalled. This bit allows the flash to
  74. * be enabled even if the CPU is disabled, which allows a quicker return to
  75. * code execution.
  76. ***************************************************************************/
  77. CY_FLASH_PM_ACT_CFG12_REG |= CY_FLASH_PM_ACT_CFG12_EN_FM;
  78. CY_FLASH_PM_ALTACT_CFG12_REG |= CY_FLASH_PM_ALTACT_CFG12_EN_FM;
  79. while(0u == (CY_FLASH_SPC_FM_EE_CR_REG & CY_FLASH_EE_EE_AWAKE))
  80. {
  81. /* Non-zero status denotes that the EEPROM/Flash is awake & powered. */
  82. }
  83. CyExitCriticalSection(interruptState);
  84. }
  85. /*******************************************************************************
  86. * Function Name: CyFlash_Stop
  87. ********************************************************************************
  88. *
  89. * Summary:
  90. * Disable the Flash.
  91. *
  92. * Parameters:
  93. * None
  94. *
  95. * Return:
  96. * None
  97. *
  98. * Side Effects:
  99. * This setting is ignored as long as the CPU is currently running. This will
  100. * only take effect when the CPU is later disabled.
  101. *
  102. *******************************************************************************/
  103. void CyFlash_Stop(void)
  104. {
  105. uint8 interruptState;
  106. interruptState = CyEnterCriticalSection();
  107. CY_FLASH_PM_ACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ACT_CFG12_EN_FM));
  108. CY_FLASH_PM_ALTACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ALTACT_CFG12_EN_FM));
  109. CyExitCriticalSection(interruptState);
  110. }
  111. /*******************************************************************************
  112. * Function Name: CySetTempInt
  113. ********************************************************************************
  114. *
  115. * Summary:
  116. * Sends a command to the SPC to read the die temperature. Sets a global value
  117. * used by the Write function. This function must be called once before
  118. * executing a series of Flash writing functions.
  119. *
  120. * Parameters:
  121. * None
  122. *
  123. * Return:
  124. * status:
  125. * CYRET_SUCCESS - if successful
  126. * CYRET_LOCKED - if Flash writing already in use
  127. * CYRET_UNKNOWN - if there was an SPC error
  128. *
  129. *******************************************************************************/
  130. static cystatus CySetTempInt(void)
  131. {
  132. cystatus status;
  133. /* Make sure SPC is powered */
  134. CySpcStart();
  135. /* Plan for failure. */
  136. status = CYRET_UNKNOWN;
  137. if(CySpcLock() == CYRET_SUCCESS)
  138. {
  139. /* Write the command. */
  140. if(CYRET_STARTED == CySpcGetTemp(CY_TEMP_NUMBER_OF_SAMPLES))
  141. {
  142. do
  143. {
  144. if(CySpcReadData(dieTemperature, CY_FLASH_DIE_TEMP_DATA_SIZE) == CY_FLASH_DIE_TEMP_DATA_SIZE)
  145. {
  146. status = CYRET_SUCCESS;
  147. while(CY_SPC_BUSY)
  148. {
  149. /* Spin until idle. */
  150. CyDelayUs(1u);
  151. }
  152. break;
  153. }
  154. } while(CY_SPC_BUSY);
  155. }
  156. CySpcUnlock();
  157. }
  158. else
  159. {
  160. status = CYRET_LOCKED;
  161. }
  162. return (status);
  163. }
  164. /*******************************************************************************
  165. * Function Name: CyFlashGetSpcAlgorithm
  166. ********************************************************************************
  167. *
  168. * Summary:
  169. * Sends a command to the SPC to download code into RAM.
  170. *
  171. * Parameters:
  172. * None
  173. *
  174. * Return:
  175. * status:
  176. * CYRET_SUCCESS - if successful
  177. * CYRET_LOCKED - if Flash writing already in use
  178. * CYRET_UNKNOWN - if there was an SPC error
  179. *
  180. *******************************************************************************/
  181. static cystatus CyFlashGetSpcAlgorithm(void)
  182. {
  183. cystatus status;
  184. /* Make sure SPC is powered */
  185. CySpcStart();
  186. if(CySpcLock() == CYRET_SUCCESS)
  187. {
  188. status = CySpcGetAlgorithm();
  189. if(CYRET_STARTED == status)
  190. {
  191. while(CY_SPC_BUSY)
  192. {
  193. /* Spin until idle. */
  194. CyDelayUs(1u);
  195. }
  196. if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
  197. {
  198. status = CYRET_SUCCESS;
  199. }
  200. }
  201. CySpcUnlock();
  202. }
  203. else
  204. {
  205. status = CYRET_LOCKED;
  206. }
  207. return (status);
  208. }
  209. /*******************************************************************************
  210. * Function Name: CySetTemp
  211. ********************************************************************************
  212. *
  213. * Summary:
  214. * This is a wraparound for CySetTempInt(). It is used to return the second
  215. * successful read of the temperature value.
  216. *
  217. * Parameters:
  218. * None
  219. *
  220. * Return:
  221. * status:
  222. * CYRET_SUCCESS if successful.
  223. * CYRET_LOCKED if Flash writing already in use
  224. * CYRET_UNKNOWN if there was an SPC error.
  225. *
  226. * uint8 dieTemperature[2]:
  227. * Holds the die temperature for the flash writing algorithm. The first byte is
  228. * the sign of the temperature (0 = negative, 1 = positive). The second byte is
  229. * the magnitude.
  230. *
  231. *******************************************************************************/
  232. cystatus CySetTemp(void)
  233. {
  234. cystatus status = CyFlashGetSpcAlgorithm();
  235. if(status == CYRET_SUCCESS)
  236. {
  237. status = CySetTempInt();
  238. }
  239. return (status);
  240. }
  241. /*******************************************************************************
  242. * Function Name: CySetFlashEEBuffer
  243. ********************************************************************************
  244. *
  245. * Summary:
  246. * Sets the user supplied temporary buffer to store SPC data while performing
  247. * Flash and EEPROM commands. This buffer is only necessary when the Flash ECC is
  248. * disabled.
  249. *
  250. * Parameters:
  251. * buffer:
  252. * The address of a block of memory to store temporary memory. The size of the block
  253. * of memory is CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE.
  254. *
  255. * Return:
  256. * status:
  257. * CYRET_SUCCESS if successful.
  258. * CYRET_BAD_PARAM if the buffer is NULL
  259. *
  260. *******************************************************************************/
  261. cystatus CySetFlashEEBuffer(uint8 * buffer)
  262. {
  263. cystatus status = CYRET_SUCCESS;
  264. CySpcStart();
  265. #if(CYDEV_ECC_ENABLE == 0)
  266. if(NULL == buffer)
  267. {
  268. rowBuffer = rowBuffer;
  269. status = CYRET_BAD_PARAM;
  270. }
  271. else if(CySpcLock() != CYRET_SUCCESS)
  272. {
  273. rowBuffer = rowBuffer;
  274. status = CYRET_LOCKED;
  275. }
  276. else
  277. {
  278. rowBuffer = buffer;
  279. CySpcUnlock();
  280. }
  281. #else
  282. /* To suppress warning */
  283. buffer = buffer;
  284. #endif /* (CYDEV_ECC_ENABLE == 0u) */
  285. return(status);
  286. }
  287. /*******************************************************************************
  288. * Function Name: CyWriteRowData
  289. ********************************************************************************
  290. *
  291. * Summary:
  292. * Sends a command to the SPC to load and program a row of data in
  293. * Flash or EEPROM.
  294. *
  295. * Parameters:
  296. * arrayID: ID of the array to write.
  297. * The type of write, Flash or EEPROM, is determined from the array ID.
  298. * The arrays in the part are sequential starting at the first ID for the
  299. * specific memory type. The array ID for the Flash memory lasts from 0x00 to
  300. * 0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.
  301. * rowAddress: rowAddress of flash row to program.
  302. * rowData: Array of bytes to write.
  303. *
  304. * Return:
  305. * status:
  306. * CYRET_SUCCESS if successful.
  307. * CYRET_LOCKED if the SPC is already in use.
  308. * CYRET_CANCELED if command not accepted
  309. * CYRET_UNKNOWN if there was an SPC error.
  310. *
  311. *******************************************************************************/
  312. cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData)
  313. {
  314. uint16 rowSize;
  315. cystatus status;
  316. rowSize = (arrayId > CY_SPC_LAST_FLASH_ARRAYID) ? CYDEV_EEPROM_ROW_SIZE : CYDEV_FLS_ROW_SIZE;
  317. status = CyWriteRowFull(arrayId, rowAddress, rowData, rowSize);
  318. return(status);
  319. }
  320. /*******************************************************************
  321. * If "Enable Error Correcting Code (ECC)" and "Store Configuration
  322. * Data in ECC" DWR options are disabled, ECC section is available
  323. * for user data.
  324. *******************************************************************/
  325. #if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))
  326. /*******************************************************************************
  327. * Function Name: CyWriteRowConfig
  328. ********************************************************************************
  329. *
  330. * Summary:
  331. * Sends a command to the SPC to load and program a row of config data in the Flash.
  332. * This function is only valid for Flash array IDs (not for EEPROM).
  333. *
  334. * Parameters:
  335. * arrayId: ID of the array to write
  336. * The arrays in the part are sequential starting at the first ID for the
  337. * specific memory type. The array ID for the Flash memory lasts
  338. * from 0x00 to 0x3F.
  339. * rowAddress: The address of the sector to erase.
  340. * rowECC: The array of bytes to write.
  341. *
  342. * Return:
  343. * status:
  344. * CYRET_SUCCESS if successful.
  345. * CYRET_LOCKED if the SPC is already in use.
  346. * CYRET_CANCELED if command not accepted
  347. * CYRET_UNKNOWN if there was an SPC error.
  348. *
  349. *******************************************************************************/
  350. cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC)\
  351. {
  352. cystatus status;
  353. status = CyWriteRowFull(arrayId, rowAddress, rowECC, CYDEV_ECC_ROW_SIZE);
  354. return (status);
  355. }
  356. #endif /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */
  357. /*******************************************************************************
  358. * Function Name: CyWriteRowFull
  359. ********************************************************************************
  360. * Summary:
  361. * Sends a command to the SPC to load and program a row of data in the Flash.
  362. * rowData array is expected to contain Flash and ECC data if needed.
  363. *
  364. * Parameters:
  365. * arrayId: FLASH or EEPROM array id.
  366. * rowData: Pointer to a row of data to write.
  367. * rowNumber: Zero based number of the row.
  368. * rowSize: Size of the row.
  369. *
  370. * Return:
  371. * CYRET_SUCCESS if successful.
  372. * CYRET_LOCKED if the SPC is already in use.
  373. * CYRET_CANCELED if command not accepted
  374. * CYRET_UNKNOWN if there was an SPC error.
  375. *
  376. *******************************************************************************/
  377. cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8* rowData, uint16 rowSize) \
  378. {
  379. cystatus status = CYRET_SUCCESS;
  380. if((arrayId <= CY_SPC_LAST_FLASH_ARRAYID) && (arrayId > (CY_FLASH_NUMBER_ARRAYS + CY_SPC_FIRST_FLASH_ARRAYID)))
  381. {
  382. status = CYRET_BAD_PARAM;
  383. }
  384. if(arrayId > CY_SPC_LAST_EE_ARRAYID)
  385. {
  386. status = CYRET_BAD_PARAM;
  387. }
  388. if((arrayId >= CY_SPC_FIRST_EE_ARRAYID) && (arrayId > (CY_FLASH_EEPROM_NUMBER_ARRAYS + CY_SPC_FIRST_EE_ARRAYID)))
  389. {
  390. status = CYRET_BAD_PARAM;
  391. }
  392. if(arrayId <= CY_SPC_LAST_FLASH_ARRAYID)
  393. {
  394. /* Flash */
  395. if(rowNumber > (CY_FLASH_NUMBER_ROWS/CY_FLASH_NUMBER_ARRAYS))
  396. {
  397. status = CYRET_BAD_PARAM;
  398. }
  399. }
  400. else
  401. {
  402. /* EEPROM */
  403. if(rowNumber > (CY_EEPROM_NUMBER_ROWS/CY_FLASH_EEPROM_NUMBER_ARRAYS))
  404. {
  405. status = CYRET_BAD_PARAM;
  406. }
  407. if(CY_EEPROM_SIZEOF_ROW != rowSize)
  408. {
  409. status = CYRET_BAD_PARAM;
  410. }
  411. }
  412. if(rowData == NULL)
  413. {
  414. status = CYRET_BAD_PARAM;
  415. }
  416. if(status == CYRET_SUCCESS)
  417. {
  418. if(CySpcLock() == CYRET_SUCCESS)
  419. {
  420. /* Load row data into SPC internal latch */
  421. status = CySpcLoadRowFull(arrayId, rowNumber, rowData, rowSize);
  422. if(CYRET_STARTED == status)
  423. {
  424. while(CY_SPC_BUSY)
  425. {
  426. /* Wait for SPC to finish and get SPC status */
  427. CyDelayUs(1u);
  428. }
  429. /* Hide SPC status */
  430. if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
  431. {
  432. status = CYRET_SUCCESS;
  433. }
  434. else
  435. {
  436. status = CYRET_UNKNOWN;
  437. }
  438. if(CYRET_SUCCESS == status)
  439. {
  440. /* Erase and program flash with data from SPC interval latch */
  441. status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);
  442. if(CYRET_STARTED == status)
  443. {
  444. while(CY_SPC_BUSY)
  445. {
  446. /* Wait for SPC to finish and get SPC status */
  447. CyDelayUs(1u);
  448. }
  449. /* Hide SPC status */
  450. if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
  451. {
  452. status = CYRET_SUCCESS;
  453. }
  454. else
  455. {
  456. status = CYRET_UNKNOWN;
  457. }
  458. }
  459. }
  460. }
  461. CySpcUnlock();
  462. } /* if(CySpcLock() == CYRET_SUCCESS) */
  463. else
  464. {
  465. status = CYRET_LOCKED;
  466. }
  467. }
  468. return(status);
  469. }
  470. /*******************************************************************************
  471. * Function Name: CyFlash_SetWaitCycles
  472. ********************************************************************************
  473. *
  474. * Summary:
  475. * Sets the number of clock cycles the cache will wait before it samples data
  476. * coming back from the Flash. This function must be called before increasing the CPU
  477. * clock frequency. It can optionally be called after lowering the CPU clock
  478. * frequency in order to improve the CPU performance.
  479. *
  480. * Parameters:
  481. * uint8 freq:
  482. * Frequency of operation in Megahertz.
  483. *
  484. * Return:
  485. * None
  486. *
  487. *******************************************************************************/
  488. void CyFlash_SetWaitCycles(uint8 freq)
  489. {
  490. uint8 interruptState;
  491. /* Save current global interrupt enable and disable it */
  492. interruptState = CyEnterCriticalSection();
  493. /***************************************************************************
  494. * The number of clock cycles the cache will wait before it samples data
  495. * coming back from the Flash must be equal or greater to to the CPU frequency
  496. * outlined in clock cycles.
  497. ***************************************************************************/
  498. if (freq < CY_FLASH_CACHE_WS_1_FREQ_MAX)
  499. {
  500. CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
  501. CY_FLASH_CACHE_WS_1_VALUE_MASK;
  502. }
  503. else if (freq < CY_FLASH_CACHE_WS_2_FREQ_MAX)
  504. {
  505. CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
  506. CY_FLASH_CACHE_WS_2_VALUE_MASK;
  507. }
  508. else if (freq < CY_FLASH_CACHE_WS_3_FREQ_MAX)
  509. {
  510. CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
  511. CY_FLASH_CACHE_WS_3_VALUE_MASK;
  512. }
  513. #if (CY_PSOC5)
  514. else if (freq < CY_FLASH_CACHE_WS_4_FREQ_MAX)
  515. {
  516. CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
  517. CY_FLASH_CACHE_WS_4_VALUE_MASK;
  518. }
  519. else if (freq <= CY_FLASH_CACHE_WS_5_FREQ_MAX)
  520. {
  521. CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
  522. CY_FLASH_CACHE_WS_5_VALUE_MASK;
  523. }
  524. #endif /* (CY_PSOC5) */
  525. else
  526. {
  527. /* Halt CPU in debug mode if frequency is invalid */
  528. CYASSERT(0u != 0u);
  529. }
  530. /* Restore global interrupt enable state */
  531. CyExitCriticalSection(interruptState);
  532. }
  533. /*******************************************************************************
  534. * Function Name: CyEEPROM_Start
  535. ********************************************************************************
  536. *
  537. * Summary:
  538. * Enable the EEPROM.
  539. *
  540. * Parameters:
  541. * None
  542. *
  543. * Return:
  544. * None
  545. *
  546. *******************************************************************************/
  547. void CyEEPROM_Start(void)
  548. {
  549. uint8 interruptState;
  550. interruptState = CyEnterCriticalSection();
  551. /***************************************************************************
  552. * Enable SPC clock. This also internally enables the 36MHz IMO, since this
  553. * is required for the SPC to function.
  554. ***************************************************************************/
  555. CY_FLASH_PM_ACT_CFG0_REG |= CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC;
  556. CY_FLASH_PM_ALTACT_CFG0_REG |= CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC;
  557. /***************************************************************************
  558. * The wake count defines the number of Bus Clock cycles it takes for the
  559. * flash or EEPROM to wake up from a low power mode independent of the chip
  560. * power mode. Wake up time for these blocks is 5 us.
  561. * The granularity of this register is 2 Bus Clock cycles, so a value of 0x1E
  562. * (30d) defines the wake up time as 60 cycles of the Bus Clock.
  563. * This register needs to be written with a value dependent on the Bus Clock
  564. * frequency so that the duration of the cycles is equal to or greater than
  565. * the 5 us delay required.
  566. ***************************************************************************/
  567. CY_FLASH_SPC_FM_EE_WAKE_CNT_REG = CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ;
  568. /***************************************************************************
  569. * Enable EEPROM. Re-enabling an EEPROM macro takes 5us. During this time,
  570. * the EE will not acknowledge a PHUB request.
  571. ***************************************************************************/
  572. CY_FLASH_PM_ACT_CFG12_REG |= CY_FLASH_PM_ACT_CFG12_EN_EE;
  573. CY_FLASH_PM_ALTACT_CFG12_REG |= CY_FLASH_PM_ALTACT_CFG12_EN_EE;
  574. while(0u == (CY_FLASH_SPC_FM_EE_CR_REG & CY_FLASH_EE_EE_AWAKE))
  575. {
  576. /* Non-zero status denotes that the EEPROM/Flash is awake & powered. */
  577. }
  578. CyExitCriticalSection(interruptState);
  579. }
  580. /*******************************************************************************
  581. * Function Name: CyEEPROM_Stop
  582. ********************************************************************************
  583. *
  584. * Summary:
  585. * Disable the EEPROM.
  586. *
  587. * Parameters:
  588. * None
  589. *
  590. * Return:
  591. * None
  592. *
  593. *******************************************************************************/
  594. void CyEEPROM_Stop (void)
  595. {
  596. uint8 interruptState;
  597. interruptState = CyEnterCriticalSection();
  598. CY_FLASH_PM_ACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ACT_CFG12_EN_EE));
  599. CY_FLASH_PM_ALTACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ALTACT_CFG12_EN_EE));
  600. CyExitCriticalSection(interruptState);
  601. }
  602. /*******************************************************************************
  603. * Function Name: CyEEPROM_ReadReserve
  604. ********************************************************************************
  605. *
  606. * Summary:
  607. * Request access to the EEPROM for reading and wait until access is available.
  608. *
  609. * Parameters:
  610. * None
  611. *
  612. * Return:
  613. * None
  614. *
  615. *******************************************************************************/
  616. void CyEEPROM_ReadReserve(void)
  617. {
  618. /* Make request for PHUB to have access */
  619. CY_FLASH_EE_SCR_REG |= CY_FLASH_EE_SCR_AHB_EE_REQ;
  620. while (0u == (CY_FLASH_EE_SCR_REG & CY_FLASH_EE_SCR_AHB_EE_ACK))
  621. {
  622. /* Wait for acknowledgment from PHUB */
  623. }
  624. }
  625. /*******************************************************************************
  626. * Function Name: CyEEPROM_ReadRelease
  627. ********************************************************************************
  628. *
  629. * Summary:
  630. * Release the read reservation of the EEPROM.
  631. *
  632. * Parameters:
  633. * None
  634. *
  635. * Return:
  636. * None
  637. *
  638. *******************************************************************************/
  639. void CyEEPROM_ReadRelease(void)
  640. {
  641. CY_FLASH_EE_SCR_REG &= (uint8)(~CY_FLASH_EE_SCR_AHB_EE_REQ);
  642. }
  643. /* [] END OF FILE */