CySpc.c 22 KB

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  1. /*******************************************************************************
  2. * File Name: CySpc.c
  3. * Version 4.20
  4. *
  5. * Description:
  6. * Provides an API for the System Performance Component.
  7. * The SPC functions are not meant to be called directly by the user
  8. * application.
  9. *
  10. ********************************************************************************
  11. * Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
  12. * You may use this file only in accordance with the license, terms, conditions,
  13. * disclaimers, and limitations in the end user license agreement accompanying
  14. * the software package with which this file was provided.
  15. *******************************************************************************/
  16. #include "CySpc.h"
  17. #define CY_SPC_KEY_ONE (0xB6u)
  18. #define CY_SPC_KEY_TWO(x) ((uint8) (((uint16) 0xD3u) + ((uint16) (x))))
  19. /* Command Codes */
  20. #define CY_SPC_CMD_LD_BYTE (0x00u)
  21. #define CY_SPC_CMD_LD_MULTI_BYTE (0x01u)
  22. #define CY_SPC_CMD_LD_ROW (0x02u)
  23. #define CY_SPC_CMD_RD_BYTE (0x03u)
  24. #define CY_SPC_CMD_RD_MULTI_BYTE (0x04u)
  25. #define CY_SPC_CMD_WR_ROW (0x05u)
  26. #define CY_SPC_CMD_WR_USER_NVL (0x06u)
  27. #define CY_SPC_CMD_PRG_ROW (0x07u)
  28. #define CY_SPC_CMD_ER_SECTOR (0x08u)
  29. #define CY_SPC_CMD_ER_ALL (0x09u)
  30. #define CY_SPC_CMD_RD_HIDDEN (0x0Au)
  31. #define CY_SPC_CMD_PRG_PROTECT (0x0Bu)
  32. #define CY_SPC_CMD_CHECKSUM (0x0Cu)
  33. #define CY_SPC_CMD_DWNLD_ALGORITHM (0x0Du)
  34. #define CY_SPC_CMD_GET_TEMP (0x0Eu)
  35. #define CY_SPC_CMD_GET_ADC (0x0Fu)
  36. #define CY_SPC_CMD_RD_NVL_VOLATILE (0x10u)
  37. #define CY_SPC_CMD_SETUP_TS (0x11u)
  38. #define CY_SPC_CMD_DISABLE_TS (0x12u)
  39. #define CY_SPC_CMD_ER_ROW (0x13u)
  40. /* Enable bit in Active and Alternate Active mode templates */
  41. #define PM_SPC_PM_EN (0x08u)
  42. /* Gate calls to the SPC. */
  43. uint8 SpcLockState = CY_SPC_UNLOCKED;
  44. #if(CY_PSOC5)
  45. /***************************************************************************
  46. * The wait-state pipeline must be enabled prior to accessing the SPC
  47. * register interface regardless of CPU frequency. The CySpcLock() saves
  48. * current wait-state pipeline state and enables it. The CySpcUnlock()
  49. * function, which must be called after SPC transaction, restores original
  50. * state.
  51. ***************************************************************************/
  52. static uint32 spcWaitPipeBypass = 0u;
  53. #endif /* (CY_PSOC5) */
  54. /*******************************************************************************
  55. * Function Name: CySpcStart
  56. ********************************************************************************
  57. * Summary:
  58. * Starts the SPC.
  59. *
  60. * Parameters:
  61. * None
  62. *
  63. * Return:
  64. * None
  65. *
  66. *******************************************************************************/
  67. void CySpcStart(void)
  68. {
  69. /* Save current global interrupt enable and disable it */
  70. uint8 interruptState = CyEnterCriticalSection();
  71. CY_SPC_PM_ACT_REG |= PM_SPC_PM_EN;
  72. CY_SPC_PM_STBY_REG |= PM_SPC_PM_EN;
  73. /* Restore global interrupt enable state */
  74. CyExitCriticalSection(interruptState);
  75. }
  76. /*******************************************************************************
  77. * Function Name: CySpcStop
  78. ********************************************************************************
  79. * Summary:
  80. * Stops the SPC.
  81. *
  82. * Parameters:
  83. * None
  84. *
  85. * Return:
  86. * None
  87. *
  88. *******************************************************************************/
  89. void CySpcStop(void)
  90. {
  91. /* Save current global interrupt enable and disable it */
  92. uint8 interruptState = CyEnterCriticalSection();
  93. CY_SPC_PM_ACT_REG &= ((uint8)(~PM_SPC_PM_EN));
  94. CY_SPC_PM_STBY_REG &= ((uint8)(~PM_SPC_PM_EN));
  95. /* Restore global interrupt enable state */
  96. CyExitCriticalSection(interruptState);
  97. }
  98. /*******************************************************************************
  99. * Function Name: CySpcReadData
  100. ********************************************************************************
  101. * Summary:
  102. * Reads data from the SPC.
  103. *
  104. * Parameters:
  105. * uint8 buffer:
  106. * Address to store data read.
  107. *
  108. * uint8 size:
  109. * Number of bytes to read from the SPC.
  110. *
  111. * Return:
  112. * uint8:
  113. * The number of bytes read from the SPC.
  114. *
  115. *******************************************************************************/
  116. uint8 CySpcReadData(uint8 buffer[], uint8 size)
  117. {
  118. uint8 i;
  119. for(i = 0u; i < size; i++)
  120. {
  121. while(!CY_SPC_DATA_READY)
  122. {
  123. CyDelayUs(1u);
  124. }
  125. buffer[i] = CY_SPC_CPU_DATA_REG;
  126. }
  127. return(i);
  128. }
  129. /*******************************************************************************
  130. * Function Name: CySpcLoadMultiByte
  131. ********************************************************************************
  132. * Summary:
  133. * Loads 1 to 32 bytes of data into the row latch of a Flash/EEPROM array.
  134. *
  135. * Parameters:
  136. * uint8 array:
  137. * Id of the array.
  138. *
  139. * uint16 address:
  140. * Flash/eeprom addrress
  141. *
  142. * uint8* buffer:
  143. * Data to load to the row latch
  144. *
  145. * uint16 number:
  146. * Number bytes to load.
  147. *
  148. * Return:
  149. * CYRET_STARTED
  150. * CYRET_CANCELED
  151. * CYRET_LOCKED
  152. * CYRET_BAD_PARAM
  153. *
  154. *******************************************************************************/
  155. cystatus CySpcLoadMultiByte(uint8 array, uint16 address, const uint8 buffer[], uint8 size)\
  156. {
  157. cystatus status = CYRET_STARTED;
  158. uint8 i;
  159. /***************************************************************************
  160. * Check if number is correct for array. Number must be less than
  161. * 32 for Flash or less than 16 for EEPROM.
  162. ***************************************************************************/
  163. if(((array < CY_SPC_LAST_FLASH_ARRAYID) && (size < 32u)) ||
  164. ((array > CY_SPC_LAST_FLASH_ARRAYID) && (size < 16u)))
  165. {
  166. if(CY_SPC_IDLE)
  167. {
  168. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  169. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_MULTI_BYTE);
  170. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_MULTI_BYTE;
  171. if(CY_SPC_BUSY)
  172. {
  173. CY_SPC_CPU_DATA_REG = array;
  174. CY_SPC_CPU_DATA_REG = 1u & HI8(address);
  175. CY_SPC_CPU_DATA_REG = LO8(address);
  176. CY_SPC_CPU_DATA_REG = ((uint8)(size - 1u));
  177. for(i = 0u; i < size; i++)
  178. {
  179. CY_SPC_CPU_DATA_REG = buffer[i];
  180. }
  181. }
  182. else
  183. {
  184. status = CYRET_CANCELED;
  185. }
  186. }
  187. else
  188. {
  189. status = CYRET_LOCKED;
  190. }
  191. }
  192. else
  193. {
  194. status = CYRET_BAD_PARAM;
  195. }
  196. return(status);
  197. }
  198. /*******************************************************************************
  199. * Function Name: CySpcLoadRow
  200. ********************************************************************************
  201. * Summary:
  202. * Loads a row of data into the row latch of a Flash/EEPROM array.
  203. *
  204. * The buffer pointer should point to the data that should be written to the
  205. * flash row directly (no data in ECC/flash will be preserved). It is Flash API
  206. * responsibility to prepare data: the preserved data are copied from flash into
  207. * array with the modified data.
  208. *
  209. * Parameters:
  210. * uint8 array:
  211. * Id of the array.
  212. *
  213. * uint8* buffer:
  214. * Data to be loaded to the row latch
  215. *
  216. * uint8 size:
  217. * The number of data bytes that the SPC expects to be written. Depends on the
  218. * type of the array and, if the array is Flash, whether ECC is being enabled
  219. * or not. There are following values: flash row latch size with ECC enabled,
  220. * flash row latch size with ECC disabled and EEPROM row latch size.
  221. *
  222. * Return:
  223. * CYRET_STARTED
  224. * CYRET_CANCELED
  225. * CYRET_LOCKED
  226. *
  227. *******************************************************************************/
  228. cystatus CySpcLoadRow(uint8 array, const uint8 buffer[], uint16 size)
  229. {
  230. cystatus status = CYRET_STARTED;
  231. uint16 i;
  232. /* Make sure the SPC is ready to accept command */
  233. if(CY_SPC_IDLE)
  234. {
  235. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  236. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_ROW);
  237. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_ROW;
  238. /* Make sure the command was accepted */
  239. if(CY_SPC_BUSY)
  240. {
  241. CY_SPC_CPU_DATA_REG = array;
  242. for(i = 0u; i < size; i++)
  243. {
  244. CY_SPC_CPU_DATA_REG = buffer[i];
  245. }
  246. }
  247. else
  248. {
  249. status = CYRET_CANCELED;
  250. }
  251. }
  252. else
  253. {
  254. status = CYRET_LOCKED;
  255. }
  256. return(status);
  257. }
  258. /*******************************************************************************
  259. * Function Name: CySpcLoadRowFull
  260. ********************************************************************************
  261. * Summary:
  262. * Loads a row of data into the row latch of a Flash/EEPROM array.
  263. *
  264. * The only data that are going to be changed should be passed. The function
  265. * will handle unmodified data preservation based on DWR settings and input
  266. * parameters.
  267. *
  268. * Parameters:
  269. * uint8 array:
  270. * Id of the array.
  271. *
  272. * uint16 row:
  273. * Flash row number to be loaded.
  274. *
  275. * uint8* buffer:
  276. * Data to be loaded to the row latch
  277. *
  278. * uint8 size:
  279. * The number of data bytes that the SPC expects to be written. Depends on the
  280. * type of the array and, if the array is Flash, whether ECC is being enabled
  281. * or not. There are following values: flash row latch size with ECC enabled,
  282. * flash row latch size with ECC disabled and EEPROM row latch size.
  283. *
  284. * Return:
  285. * CYRET_STARTED
  286. * CYRET_CANCELED
  287. * CYRET_LOCKED
  288. *
  289. *******************************************************************************/
  290. cystatus CySpcLoadRowFull(uint8 array, uint16 row, const uint8 buffer[], uint16 size)\
  291. {
  292. cystatus status = CYRET_STARTED;
  293. uint16 i;
  294. #if (CYDEV_ECC_ENABLE == 0)
  295. uint32 offset;
  296. #endif /* (CYDEV_ECC_ENABLE == 0) */
  297. /* Make sure the SPC is ready to accept command */
  298. if(CY_SPC_IDLE)
  299. {
  300. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  301. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_ROW);
  302. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_ROW;
  303. /* Make sure the command was accepted */
  304. if(CY_SPC_BUSY)
  305. {
  306. CY_SPC_CPU_DATA_REG = array;
  307. /*******************************************************************
  308. * If "Enable Error Correcting Code (ECC)" and "Store Configuration
  309. * Data in ECC" DWR options are disabled, ECC section is available
  310. * for user data.
  311. *******************************************************************/
  312. #if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))
  313. /*******************************************************************
  314. * If size parameter equals size of the ECC row and selected array
  315. * identification corresponds to the flash array (but not to EEPROM
  316. * array) then data are going to be written to the ECC section.
  317. * In this case flash data must be preserved. The flash data copied
  318. * from flash data section to the SPC data register.
  319. *******************************************************************/
  320. if ((size == CYDEV_ECC_ROW_SIZE) && (array <= CY_SPC_LAST_FLASH_ARRAYID))
  321. {
  322. offset = CYDEV_FLS_BASE +
  323. ((uint32) array * CYDEV_FLS_SECTOR_SIZE) +
  324. ((uint32) row * CYDEV_FLS_ROW_SIZE );
  325. for (i = 0u; i < CYDEV_FLS_ROW_SIZE; i++)
  326. {
  327. CY_SPC_CPU_DATA_REG = CY_GET_XTND_REG8((void CYFAR *)(offset + i));
  328. }
  329. }
  330. #endif /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */
  331. for(i = 0u; i < size; i++)
  332. {
  333. CY_SPC_CPU_DATA_REG = buffer[i];
  334. }
  335. /*******************************************************************
  336. * If "Enable Error Correcting Code (ECC)" DWR option is disabled,
  337. * ECC section can be used for storing device configuration data
  338. * ("Store Configuration Data in ECC" DWR option is enabled) or for
  339. * storing user data in the ECC section ("Store Configuration Data in
  340. * ECC" DWR option is enabled). In both cases, the data in the ECC
  341. * section must be preserved if flash data is written.
  342. *******************************************************************/
  343. #if (CYDEV_ECC_ENABLE == 0)
  344. /*******************************************************************
  345. * If size parameter equals size of the flash row and selected array
  346. * identification corresponds to the flash array (but not to EEPROM
  347. * array) then data are going to be written to the flash data
  348. * section. In this case, ECC section data must be preserved.
  349. * The ECC section data copied from ECC section to the SPC data
  350. * register.
  351. *******************************************************************/
  352. if ((size == CYDEV_FLS_ROW_SIZE) && (array <= CY_SPC_LAST_FLASH_ARRAYID))
  353. {
  354. offset = CYDEV_ECC_BASE +
  355. ((uint32) array * CYDEV_ECC_SECTOR_SIZE) +
  356. ((uint32) row * CYDEV_ECC_ROW_SIZE );
  357. for (i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)
  358. {
  359. CY_SPC_CPU_DATA_REG = CY_GET_XTND_REG8((void CYFAR *)(offset + i));
  360. }
  361. }
  362. #else
  363. if(0u != row)
  364. {
  365. /* To remove unreferenced local variable warning */
  366. }
  367. #endif /* (CYDEV_ECC_ENABLE == 0) */
  368. }
  369. else
  370. {
  371. status = CYRET_CANCELED;
  372. }
  373. }
  374. else
  375. {
  376. status = CYRET_LOCKED;
  377. }
  378. return(status);
  379. }
  380. /*******************************************************************************
  381. * Function Name: CySpcWriteRow
  382. ********************************************************************************
  383. * Summary:
  384. * Erases then programs a row in Flash/EEPROM with data in row latch.
  385. *
  386. * Parameters:
  387. * uint8 array:
  388. * Id of the array.
  389. *
  390. * uint16 address:
  391. * flash/eeprom addrress
  392. *
  393. * uint8 tempPolarity:
  394. * temperature polarity.
  395. * 1: the Temp Magnitude is interpreted as a positive value
  396. * 0: the Temp Magnitude is interpreted as a negative value
  397. *
  398. * uint8 tempMagnitude:
  399. * temperature magnitude.
  400. *
  401. * Return:
  402. * CYRET_STARTED
  403. * CYRET_CANCELED
  404. * CYRET_LOCKED
  405. *
  406. *******************************************************************************/
  407. cystatus CySpcWriteRow(uint8 array, uint16 address, uint8 tempPolarity, uint8 tempMagnitude)\
  408. {
  409. cystatus status = CYRET_STARTED;
  410. /* Make sure the SPC is ready to accept command */
  411. if(CY_SPC_IDLE)
  412. {
  413. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  414. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_WR_ROW);
  415. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_WR_ROW;
  416. /* Make sure the command was accepted */
  417. if(CY_SPC_BUSY)
  418. {
  419. CY_SPC_CPU_DATA_REG = array;
  420. CY_SPC_CPU_DATA_REG = HI8(address);
  421. CY_SPC_CPU_DATA_REG = LO8(address);
  422. CY_SPC_CPU_DATA_REG = tempPolarity;
  423. CY_SPC_CPU_DATA_REG = tempMagnitude;
  424. }
  425. else
  426. {
  427. status = CYRET_CANCELED;
  428. }
  429. }
  430. else
  431. {
  432. status = CYRET_LOCKED;
  433. }
  434. return(status);
  435. }
  436. /*******************************************************************************
  437. * Function Name: CySpcEraseSector
  438. ********************************************************************************
  439. * Summary:
  440. * Erases all data in the addressed sector (block of 64 rows).
  441. *
  442. * Parameters:
  443. * uint8 array:
  444. * Id of the array.
  445. *
  446. * uint8 sectorNumber:
  447. * Zero based sector number within Flash/EEPROM array
  448. *
  449. * Return:
  450. * CYRET_STARTED
  451. * CYRET_CANCELED
  452. * CYRET_LOCKED
  453. *
  454. *******************************************************************************/
  455. cystatus CySpcEraseSector(uint8 array, uint8 sectorNumber)
  456. {
  457. cystatus status = CYRET_STARTED;
  458. /* Make sure the SPC is ready to accept command */
  459. if(CY_SPC_IDLE)
  460. {
  461. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  462. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_ER_SECTOR);
  463. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_ER_SECTOR;
  464. /* Make sure the command was accepted */
  465. if(CY_SPC_BUSY)
  466. {
  467. CY_SPC_CPU_DATA_REG = array;
  468. CY_SPC_CPU_DATA_REG = sectorNumber;
  469. }
  470. else
  471. {
  472. status = CYRET_CANCELED;
  473. }
  474. }
  475. else
  476. {
  477. status = CYRET_LOCKED;
  478. }
  479. return(status);
  480. }
  481. /*******************************************************************************
  482. * Function Name: CySpcGetTemp
  483. ********************************************************************************
  484. * Summary:
  485. * Returns the internal die temperature
  486. *
  487. * Parameters:
  488. * uint8 numSamples:
  489. * Number of samples. Valid values are 1-5, resulting in 2 - 32 samples
  490. * respectively.
  491. *
  492. * uint16 timerPeriod:
  493. * Number of ADC ACLK cycles. A valid 14 bit value is accepted, higher 2 bits
  494. * of 16 bit values are ignored.
  495. *
  496. * uint8 clkDivSelect:
  497. * ADC ACLK clock divide value. Valid values are 2 - 225.
  498. *
  499. * Return:
  500. * CYRET_STARTED
  501. * CYRET_CANCELED
  502. * CYRET_LOCKED
  503. *
  504. *******************************************************************************/
  505. cystatus CySpcGetTemp(uint8 numSamples)
  506. {
  507. cystatus status = CYRET_STARTED;
  508. /* Make sure the SPC is ready to accept command */
  509. if(CY_SPC_IDLE)
  510. {
  511. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  512. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_GET_TEMP);
  513. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_GET_TEMP;
  514. /* Make sure the command was accepted */
  515. if(CY_SPC_BUSY)
  516. {
  517. CY_SPC_CPU_DATA_REG = numSamples;
  518. }
  519. else
  520. {
  521. status = CYRET_CANCELED;
  522. }
  523. }
  524. else
  525. {
  526. status = CYRET_LOCKED;
  527. }
  528. return(status);
  529. }
  530. /*******************************************************************************
  531. * Function Name: CySpcLock
  532. ********************************************************************************
  533. * Summary:
  534. * Locks the SPC so it can not be used by someone else:
  535. * - Saves wait-pipeline enable state and enable pipeline (PSoC5)
  536. *
  537. * Parameters:
  538. * Note
  539. *
  540. * Return:
  541. * CYRET_SUCCESS - if the resource was free.
  542. * CYRET_LOCKED - if the SPC is in use.
  543. *
  544. *******************************************************************************/
  545. cystatus CySpcLock(void)
  546. {
  547. cystatus status = CYRET_LOCKED;
  548. uint8 interruptState;
  549. /* Enter critical section */
  550. interruptState = CyEnterCriticalSection();
  551. if(CY_SPC_UNLOCKED == SpcLockState)
  552. {
  553. SpcLockState = CY_SPC_LOCKED;
  554. status = CYRET_SUCCESS;
  555. #if(CY_PSOC5)
  556. if(0u != (CY_SPC_CPU_WAITPIPE_REG & CY_SPC_CPU_WAITPIPE_BYPASS))
  557. {
  558. /* Enable pipeline registers */
  559. CY_SPC_CPU_WAITPIPE_REG &= ((uint32)(~CY_SPC_CPU_WAITPIPE_BYPASS));
  560. /* At least 2 NOP instructions are recommended */
  561. CY_NOP;
  562. CY_NOP;
  563. CY_NOP;
  564. spcWaitPipeBypass = CY_SPC_CPU_WAITPIPE_BYPASS;
  565. }
  566. #endif /* (CY_PSOC5) */
  567. }
  568. /* Exit critical section */
  569. CyExitCriticalSection(interruptState);
  570. return(status);
  571. }
  572. /*******************************************************************************
  573. * Function Name: CySpcUnlock
  574. ********************************************************************************
  575. * Summary:
  576. * Unlocks the SPC so it can be used by someone else:
  577. * - Restores wait-pipeline enable state (PSoC5)
  578. *
  579. * Parameters:
  580. * None
  581. *
  582. * Return:
  583. * None
  584. *
  585. *******************************************************************************/
  586. void CySpcUnlock(void)
  587. {
  588. uint8 interruptState;
  589. /* Enter critical section */
  590. interruptState = CyEnterCriticalSection();
  591. /* Release the SPC object */
  592. SpcLockState = CY_SPC_UNLOCKED;
  593. #if(CY_PSOC5)
  594. if(CY_SPC_CPU_WAITPIPE_BYPASS == spcWaitPipeBypass)
  595. {
  596. /* Force to bypass pipeline registers */
  597. CY_SPC_CPU_WAITPIPE_REG |= CY_SPC_CPU_WAITPIPE_BYPASS;
  598. /* At least 2 NOP instructions are recommended */
  599. CY_NOP;
  600. CY_NOP;
  601. CY_NOP;
  602. spcWaitPipeBypass = 0u;
  603. }
  604. #endif /* (CY_PSOC5) */
  605. /* Exit critical section */
  606. CyExitCriticalSection(interruptState);
  607. }
  608. /*******************************************************************************
  609. * Function Name: CySpcGetAlgorithm
  610. ********************************************************************************
  611. * Summary:
  612. * Downloads SPC algorithm from SPC SROM into SRAM.
  613. *
  614. * Parameters:
  615. * None
  616. *
  617. * Return:
  618. * CYRET_STARTED
  619. * CYRET_LOCKED
  620. *
  621. *******************************************************************************/
  622. cystatus CySpcGetAlgorithm(void)
  623. {
  624. cystatus status = CYRET_STARTED;
  625. /* Make sure the SPC is ready to accept command */
  626. if(CY_SPC_IDLE)
  627. {
  628. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
  629. CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_DWNLD_ALGORITHM);
  630. CY_SPC_CPU_DATA_REG = CY_SPC_CMD_DWNLD_ALGORITHM;
  631. }
  632. else
  633. {
  634. status = CYRET_LOCKED;
  635. }
  636. return(status);
  637. }
  638. /* [] END OF FILE */