ZuluSCSI_platform.cpp 40 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version. 
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details. 
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "ZuluSCSI_platform.h"
  22. #include "ZuluSCSI_log.h"
  23. #include "ZuluSCSI_config.h"
  24. #include <SdFat.h>
  25. #include <scsi.h>
  26. #include <assert.h>
  27. #include <hardware/gpio.h>
  28. #include <hardware/pio.h>
  29. #include <hardware/uart.h>
  30. #include <hardware/pll.h>
  31. #include <hardware/clocks.h>
  32. #include <hardware/spi.h>
  33. #include <hardware/adc.h>
  34. #include <hardware/flash.h>
  35. #include <hardware/structs/xip_ctrl.h>
  36. #include <hardware/structs/usb.h>
  37. #include "scsi_accel_target.h"
  38. #ifdef __MBED__
  39. # include <platform/mbed_error.h>
  40. #endif // __MBED__
  41. #ifndef __MBED__
  42. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  43. # include <SerialUSB.h>
  44. # include <class/cdc/cdc_device.h>
  45. #endif
  46. #else
  47. # include <USB/PluggableUSBSerial.h>
  48. #endif // __MBED__
  49. #ifndef ZULUSCSI_NETWORK
  50. # include <multicore.h>
  51. #else
  52. # include <pico/multicore.h>
  53. extern "C" {
  54. # include <pico/cyw43_arch.h>
  55. }
  56. #endif // ZULUSCSI_NETWORK
  57. #ifdef ENABLE_AUDIO_OUTPUT
  58. # include "audio.h"
  59. #endif // ENABLE_AUDIO_OUTPUT
  60. extern "C" {
  61. const char *g_platform_name = PLATFORM_NAME;
  62. static bool g_scsi_initiator = false;
  63. static uint32_t g_flash_chip_size = 0;
  64. static bool g_uart_initialized = false;
  65. #ifdef __MBED__
  66. void mbed_error_hook(const mbed_error_ctx * error_context);
  67. #endif // __MBED__
  68. /***************/
  69. /* GPIO init */
  70. /***************/
  71. // Helper function to configure whole GPIO in one line
  72. static void gpio_conf(uint gpio, enum gpio_function fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  73. {
  74. gpio_put(gpio, initial_state);
  75. gpio_set_dir(gpio, output);
  76. gpio_set_pulls(gpio, pullup, pulldown);
  77. gpio_set_function(gpio, fn);
  78. if (fast_slew)
  79. {
  80. padsbank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  81. }
  82. }
  83. #ifdef ENABLE_AUDIO_OUTPUT
  84. // Increases clk_sys and clk_peri to 135.428571MHz at runtime to support
  85. // division to audio output rates. Invoke before anything is using clk_peri
  86. // except for the logging UART, which is handled below.
  87. static void reclock_for_audio() {
  88. // ensure UART is fully drained before we mess up its clock
  89. uart_tx_wait_blocking(uart0);
  90. // switch clk_sys and clk_peri to pll_usb
  91. // see code in 2.15.6.1 of the datasheet for useful comments
  92. clock_configure(clk_sys,
  93. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  94. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  95. 48 * MHZ,
  96. 48 * MHZ);
  97. clock_configure(clk_peri,
  98. 0,
  99. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  100. 48 * MHZ,
  101. 48 * MHZ);
  102. // reset PLL for 135.428571MHz
  103. pll_init(pll_sys, 1, 948000000, 7, 1);
  104. // switch clocks back to pll_sys
  105. clock_configure(clk_sys,
  106. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  107. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  108. 135428571,
  109. 135428571);
  110. clock_configure(clk_peri,
  111. 0,
  112. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  113. 135428571,
  114. 135428571);
  115. // reset UART for the new clock speed
  116. uart_init(uart0, 1000000);
  117. }
  118. #endif // ENABLE_AUDIO_OUT
  119. #ifdef HAS_DIP_SWITCHES
  120. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  121. static pin_setup_state_t read_setup_ack_pin()
  122. {
  123. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  124. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  125. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  126. *
  127. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  128. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  129. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  130. */
  131. // Strong output high, then pulldown
  132. // pin function pup pdown out state fast
  133. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  134. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  135. delay(1);
  136. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  137. // Strong output low, then pullup
  138. // pin function pup pdown out state fast
  139. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  140. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  141. delay(1);
  142. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  143. if (ack_state1 == ack_state2)
  144. {
  145. // Ok, was able to read the state directly
  146. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  147. }
  148. // Enable OUT_BSY for a short time.
  149. // If in target mode, this will force GPIO_ACK high.
  150. gpio_put(SCSI_OUT_BSY, 0);
  151. delay_100ns();
  152. gpio_put(SCSI_OUT_BSY, 1);
  153. return SETUP_UNDETERMINED;
  154. }
  155. #endif
  156. void platform_init()
  157. {
  158. // Make sure second core is stopped
  159. multicore_reset_core1();
  160. pio_clear_instruction_memory(pio0);
  161. pio_clear_instruction_memory(pio1);
  162. /* First configure the pins that affect external buffer directions.
  163. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  164. */
  165. // pin function pup pdown out state fast
  166. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  167. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  168. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  169. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  170. /* Check dip switch settings */
  171. #ifdef HAS_DIP_SWITCHES
  172. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  173. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  174. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  175. delay(10); // 10 ms delay to let pull-ups do their work
  176. bool working_dip = true;
  177. bool dbglog = false;
  178. bool termination = false;
  179. # ifdef ZULUSCSI_PICO
  180. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  181. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  182. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  183. if (working_dip)
  184. {
  185. dbglog = !gpio_get(DIP_DBGLOG);
  186. termination = !gpio_get(DIP_TERM);
  187. }
  188. # else
  189. g_scsi_initiator = SETUP_TRUE == read_setup_ack_pin();
  190. dbglog = !gpio_get(DIP_DBGLOG);
  191. termination = !gpio_get(DIP_TERM);
  192. # endif
  193. #else
  194. delay(10);
  195. #endif // HAS_DIP_SWITCHES
  196. #ifndef DISABLE_SWO
  197. /* Initialize logging to SWO pin (UART0) */
  198. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  199. uart_init(uart0, 1000000);
  200. g_uart_initialized = true;
  201. #endif // DISABLE_SWO
  202. #ifdef __MBED__
  203. mbed_set_error_hook(mbed_error_hook);
  204. #endif // __MBED__
  205. logmsg("Platform: ", g_platform_name);
  206. logmsg("FW Version: ", g_log_firmwareversion);
  207. #ifdef HAS_DIP_SWITCHES
  208. if (working_dip)
  209. {
  210. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  211. g_log_debug = dbglog;
  212. if (termination)
  213. {
  214. logmsg("SCSI termination is enabled");
  215. }
  216. else
  217. {
  218. logmsg("NOTE: SCSI termination is disabled");
  219. }
  220. }
  221. else
  222. {
  223. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  224. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in zuluscsi.ini");
  225. logmsg("-- DEBUG DIP switch setting is ignored on ZuluSCSI Pico FS Rev. 2023b and 2023c boards");
  226. g_log_debug = false;
  227. }
  228. #else
  229. g_log_debug = false;
  230. logmsg ("SCSI termination is handled by a hardware jumper");
  231. #endif // HAS_DIP_SWITCHES
  232. #ifdef ENABLE_AUDIO_OUTPUT
  233. logmsg("SP/DIF audio to expansion header enabled");
  234. logmsg("-- Overclocking to 135.428571MHz");
  235. reclock_for_audio();
  236. #endif // ENABLE_AUDIO_OUTPUT
  237. // Get flash chip size
  238. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  239. uint8_t response_jedec[4] = {0};
  240. __disable_irq();
  241. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  242. __enable_irq();
  243. g_flash_chip_size = (1 << response_jedec[3]);
  244. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  245. // SD card pins
  246. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  247. // pin function pup pdown out state fast
  248. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  249. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  250. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  251. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  252. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  253. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  254. // LED pin
  255. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  256. #ifndef ENABLE_AUDIO_OUTPUT
  257. #ifdef GPIO_I2C_SDA
  258. // I2C pins
  259. // pin function pup pdown out state fast
  260. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  261. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  262. #endif // GPIO_I2C_SDA
  263. #else
  264. // pin function pup pdown out state fast
  265. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  266. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  267. // configuration of corresponding SPI unit occurs in audio_setup()
  268. #endif // ENABLE_AUDIO_OUTPUT
  269. }
  270. // late_init() only runs in main application, SCSI not needed in bootloader
  271. void platform_late_init()
  272. {
  273. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  274. if (g_scsi_initiator == true)
  275. {
  276. logmsg("SCSI initiator mode selected by DIP switch, expecting SCSI disks on the bus");
  277. }
  278. else
  279. {
  280. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  281. }
  282. #else
  283. g_scsi_initiator = false;
  284. logmsg("SCSI target/disk mode, acting as a SCSI disk");
  285. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  286. /* Initialize SCSI pins to required modes.
  287. * SCSI pins should be inactive / input at this point.
  288. */
  289. // SCSI data bus direction is switched by DATA_DIR signal.
  290. // Pullups make sure that no glitches occur when switching direction.
  291. // pin function pup pdown out state fast
  292. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  293. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  294. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  295. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  296. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  297. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  298. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  299. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  300. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  301. if (!g_scsi_initiator)
  302. {
  303. // Act as SCSI device / target
  304. // SCSI control outputs
  305. // pin function pup pdown out state fast
  306. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  307. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  308. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  309. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  310. // Shared pins are changed to input / output depending on communication phase
  311. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  312. if (SCSI_OUT_CD != SCSI_IN_SEL)
  313. {
  314. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  315. }
  316. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  317. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  318. {
  319. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  320. }
  321. // SCSI control inputs
  322. // pin function pup pdown out state fast
  323. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  324. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  325. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  326. #ifndef __MBED__
  327. # ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  328. Serial.begin();
  329. # endif
  330. #endif // __MBED__
  331. #ifdef ENABLE_AUDIO_OUTPUT
  332. // one-time control setup for DMA channels and second core
  333. audio_setup();
  334. #endif // ENABLE_AUDIO_OUTPUT
  335. }
  336. else
  337. {
  338. #ifndef PLATFORM_HAS_INITIATOR_MODE
  339. assert(false);
  340. #else
  341. // Act as SCSI initiator
  342. // pin function pup pdown out state fast
  343. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  344. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  345. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  346. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  347. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  348. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  349. // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST.
  350. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true);
  351. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  352. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true);
  353. gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true);
  354. #endif // PLATFORM_HAS_INITIATOR_MODE
  355. }
  356. }
  357. void platform_post_sd_card_init() {}
  358. bool platform_is_initiator_mode_enabled()
  359. {
  360. return g_scsi_initiator;
  361. }
  362. void platform_disable_led(void)
  363. {
  364. // pin function pup pdown out state fast
  365. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  366. logmsg("Disabling status LED");
  367. }
  368. /*****************************************/
  369. /* Crash handlers */
  370. /*****************************************/
  371. extern SdFs SD;
  372. extern uint32_t __StackTop;
  373. void platform_emergency_log_save()
  374. {
  375. platform_set_sd_callback(NULL, NULL);
  376. SD.begin(SD_CONFIG_CRASH);
  377. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  378. if (!crashfile.isOpen())
  379. {
  380. // Try to reinitialize
  381. int max_retry = 10;
  382. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  383. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  384. }
  385. uint32_t startpos = 0;
  386. crashfile.write(log_get_buffer(&startpos));
  387. crashfile.write(log_get_buffer(&startpos));
  388. crashfile.flush();
  389. crashfile.close();
  390. }
  391. #ifdef __MBED__
  392. void mbed_error_hook(const mbed_error_ctx * error_context)
  393. {
  394. logmsg("--------------");
  395. logmsg("CRASH!");
  396. logmsg("Platform: ", g_platform_name);
  397. logmsg("FW Version: ", g_log_firmwareversion);
  398. logmsg("error_status: ", (uint32_t)error_context->error_status);
  399. logmsg("error_address: ", error_context->error_address);
  400. logmsg("error_value: ", error_context->error_value);
  401. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  402. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  403. scsi_accel_log_state();
  404. uint32_t *p = (uint32_t*)((uint32_t)error_context->thread_current_sp & ~3);
  405. for (int i = 0; i < 8; i++)
  406. {
  407. if (p == &__StackTop) break; // End of stack
  408. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  409. p += 4;
  410. }
  411. platform_emergency_log_save();
  412. while (1)
  413. {
  414. // Flash the crash address on the LED
  415. // Short pulse means 0, long pulse means 1
  416. int base_delay = 1000;
  417. for (int i = 31; i >= 0; i--)
  418. {
  419. LED_OFF();
  420. for (int j = 0; j < base_delay; j++) delay_ns(100000);
  421. int delay = (error_context->error_address & (1 << i)) ? (3 * base_delay) : base_delay;
  422. LED_ON();
  423. for (int j = 0; j < delay; j++) delay_ns(100000);
  424. LED_OFF();
  425. }
  426. for (int j = 0; j < base_delay * 10; j++) delay_ns(100000);
  427. }
  428. }
  429. #endif // __MBED__
  430. /*****************************************/
  431. /* Debug logging and watchdog */
  432. /*****************************************/
  433. // Send log data to USB UART if USB is connected.
  434. // Data is retrieved from the shared log ring buffer and
  435. // this function sends as much as fits in USB CDC buffer.
  436. //
  437. // This is normally called by platform_reset_watchdog() in
  438. // the normal polling loop. If code hangs, the watchdog_callback()
  439. // also starts calling this after 2 seconds.
  440. // This ensures that log messages get passed even if code hangs,
  441. // but does not unnecessarily delay normal execution.
  442. static void usb_log_poll()
  443. {
  444. static uint32_t logpos = 0;
  445. #ifndef __MBED__
  446. # ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  447. if (Serial.availableForWrite())
  448. {
  449. // Retrieve pointer to log start and determine number of bytes available.
  450. uint32_t available = 0;
  451. const char *data = log_get_buffer(&logpos, &available);
  452. // Limit to CDC packet size
  453. uint32_t len = available;
  454. if (len == 0) return;
  455. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  456. // Update log position by the actual number of bytes sent
  457. // If USB CDC buffer is full, this may be 0
  458. uint32_t actual = 0;
  459. actual = Serial.write(data, len);
  460. logpos -= available - actual;
  461. }
  462. # endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  463. #else
  464. if (_SerialUSB.ready())
  465. {
  466. // Retrieve pointer to log start and determine number of bytes available.
  467. uint32_t available = 0;
  468. const char *data = log_get_buffer(&logpos, &available);
  469. // Limit to CDC packet size
  470. uint32_t len = available;
  471. if (len == 0) return;
  472. if (len > CDC_MAX_PACKET_SIZE) len = CDC_MAX_PACKET_SIZE;
  473. // Update log position by the actual number of bytes sent
  474. // If USB CDC buffer is full, this may be 0
  475. uint32_t actual = 0;
  476. _SerialUSB.send_nb((uint8_t*)data, len, &actual);
  477. logpos -= available - actual;
  478. }
  479. #endif // __MBED__
  480. }
  481. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  482. // This works by sampling the temperature sensor channel, which has
  483. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  484. static void adc_poll()
  485. {
  486. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  487. static bool initialized = false;
  488. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  489. if (!initialized)
  490. {
  491. adc_init();
  492. adc_set_temp_sensor_enabled(true);
  493. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  494. adc_select_input(4);
  495. adc_fifo_setup(true, false, 0, false, false);
  496. adc_run(true);
  497. initialized = true;
  498. }
  499. #ifdef ENABLE_AUDIO_OUTPUT
  500. /*
  501. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  502. * at the same time a SPI DMA write begins, it appears that the first
  503. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  504. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  505. * is playing.
  506. */
  507. if (audio_is_active()) return;
  508. #endif // ENABLE_AUDIO_OUTPUT
  509. int adc_value_max = 0;
  510. while (!adc_fifo_is_empty())
  511. {
  512. int adc_value = adc_fifo_get();
  513. if (adc_value > adc_value_max) adc_value_max = adc_value;
  514. }
  515. // adc_value = 700mV * 4096 / Vdd
  516. // => Vdd = 700mV * 4096 / adc_value
  517. // To avoid wasting time on division, compare against
  518. // limit directly.
  519. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  520. if (adc_value_max > limit)
  521. {
  522. // Warn once, and then again if we detect even a lower drop.
  523. int vdd_mV = (700 * 4096) / adc_value_max;
  524. if (vdd_mV < lowest_vdd_seen)
  525. {
  526. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  527. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  528. }
  529. }
  530. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  531. }
  532. // This function is called for every log message.
  533. void platform_log(const char *s)
  534. {
  535. if (g_uart_initialized)
  536. {
  537. uart_puts(uart0, s);
  538. }
  539. }
  540. static int g_watchdog_timeout;
  541. static bool g_watchdog_initialized;
  542. static void watchdog_callback(unsigned alarm_num)
  543. {
  544. g_watchdog_timeout -= 1000;
  545. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  546. {
  547. // Been stuck for at least a second, start dumping USB log
  548. usb_log_poll();
  549. }
  550. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  551. {
  552. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  553. {
  554. logmsg("--------------");
  555. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  556. logmsg("Platform: ", g_platform_name);
  557. logmsg("FW Version: ", g_log_firmwareversion);
  558. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  559. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  560. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  561. scsi_accel_log_state();
  562. uint32_t *p = (uint32_t*)__get_PSP();
  563. for (int i = 0; i < 8; i++)
  564. {
  565. if (p == &__StackTop) break; // End of stack
  566. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  567. p += 4;
  568. }
  569. scsiDev.resetFlag = 1;
  570. g_scsiHostPhyReset = true;
  571. }
  572. if (g_watchdog_timeout <= 0)
  573. {
  574. logmsg("--------------");
  575. logmsg("WATCHDOG TIMEOUT!");
  576. logmsg("Platform: ", g_platform_name);
  577. logmsg("FW Version: ", g_log_firmwareversion);
  578. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  579. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  580. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  581. uint32_t *p = (uint32_t*)__get_PSP();
  582. for (int i = 0; i < 8; i++)
  583. {
  584. if (p == &__StackTop) break; // End of stack
  585. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  586. p += 4;
  587. }
  588. usb_log_poll();
  589. platform_emergency_log_save();
  590. platform_boot_to_main_firmware();
  591. }
  592. }
  593. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  594. }
  595. // This function can be used to periodically reset watchdog timer for crash handling.
  596. // It can also be left empty if the platform does not use a watchdog timer.
  597. void platform_reset_watchdog()
  598. {
  599. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  600. if (!g_watchdog_initialized)
  601. {
  602. int alarm_num = -1;
  603. for (int i = 0; i < NUM_TIMERS; i++)
  604. {
  605. if (!hardware_alarm_is_claimed(i))
  606. {
  607. alarm_num = i;
  608. break;
  609. }
  610. }
  611. if (alarm_num == -1)
  612. {
  613. logmsg("No free watchdog hardware alarms to claim");
  614. return;
  615. }
  616. hardware_alarm_claim(alarm_num);
  617. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  618. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  619. g_watchdog_initialized = true;
  620. }
  621. // USB log is polled here also to make sure any log messages in fault states
  622. // get passed to USB.
  623. usb_log_poll();
  624. }
  625. // Poll function that is called every few milliseconds.
  626. // Can be left empty or used for platform-specific processing.
  627. void platform_poll()
  628. {
  629. usb_log_poll();
  630. adc_poll();
  631. #ifdef ENABLE_AUDIO_OUTPUT
  632. audio_poll();
  633. #endif // ENABLE_AUDIO_OUTPUT
  634. }
  635. uint8_t platform_get_buttons()
  636. {
  637. uint8_t buttons = 0;
  638. #if defined(ENABLE_AUDIO_OUTPUT)
  639. // pulled to VCC via resistor, sinking when pressed
  640. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  641. #elif defined(GPIO_I2C_SDA)
  642. // SDA = button 1, SCL = button 2
  643. if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  644. if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  645. #endif // defined(ENABLE_AUDIO_OUTPUT)
  646. // Simple debouncing logic: handle button releases after 100 ms delay.
  647. static uint32_t debounce;
  648. static uint8_t buttons_debounced = 0;
  649. if (buttons != 0)
  650. {
  651. buttons_debounced = buttons;
  652. debounce = millis();
  653. }
  654. else if ((uint32_t)(millis() - debounce) > 100)
  655. {
  656. buttons_debounced = 0;
  657. }
  658. return buttons_debounced;
  659. }
  660. /*****************************************/
  661. /* Flash reprogramming from bootloader */
  662. /*****************************************/
  663. #ifdef PLATFORM_BOOTLOADER_SIZE
  664. extern uint32_t __real_vectors_start;
  665. extern uint32_t __StackTop;
  666. static volatile void *g_bootloader_exit_req;
  667. __attribute__((section(".time_critical.platform_rewrite_flash_page")))
  668. bool platform_rewrite_flash_page(uint32_t offset, uint8_t buffer[PLATFORM_FLASH_PAGE_SIZE])
  669. {
  670. if (offset == PLATFORM_BOOTLOADER_SIZE)
  671. {
  672. if (buffer[3] != 0x20 || buffer[7] != 0x10)
  673. {
  674. logmsg("Invalid firmware file, starts with: ", bytearray(buffer, 16));
  675. return false;
  676. }
  677. }
  678. #ifdef __MBED__
  679. if (NVIC_GetEnableIRQ(USBCTRL_IRQn))
  680. {
  681. logmsg("Disabling USB during firmware flashing");
  682. NVIC_DisableIRQ(USBCTRL_IRQn);
  683. usb_hw->main_ctrl = 0;
  684. }
  685. #endif // __MBED__
  686. dbgmsg("Writing flash at offset ", offset, " data ", bytearray(buffer, 4));
  687. assert(offset % PLATFORM_FLASH_PAGE_SIZE == 0);
  688. assert(offset >= PLATFORM_BOOTLOADER_SIZE);
  689. // Avoid any mbed timer interrupts triggering during the flashing.
  690. __disable_irq();
  691. // For some reason any code executed after flashing crashes
  692. // unless we disable the XIP cache.
  693. // Not sure why this happens, as flash_range_program() is flushing
  694. // the cache correctly.
  695. // The cache is now enabled from bootloader start until it starts
  696. // flashing, and again after reset to main firmware.
  697. xip_ctrl_hw->ctrl = 0;
  698. flash_range_erase(offset, PLATFORM_FLASH_PAGE_SIZE);
  699. flash_range_program(offset, buffer, PLATFORM_FLASH_PAGE_SIZE);
  700. uint32_t *buf32 = (uint32_t*)buffer;
  701. uint32_t num_words = PLATFORM_FLASH_PAGE_SIZE / 4;
  702. for (int i = 0; i < num_words; i++)
  703. {
  704. uint32_t expected = buf32[i];
  705. uint32_t actual = *(volatile uint32_t*)(XIP_NOCACHE_BASE + offset + i * 4);
  706. if (actual != expected)
  707. {
  708. logmsg("Flash verify failed at offset ", offset + i * 4, " got ", actual, " expected ", expected);
  709. __enable_irq();
  710. return false;
  711. }
  712. }
  713. __enable_irq();
  714. return true;
  715. }
  716. void platform_boot_to_main_firmware()
  717. {
  718. // To ensure that the system state is reset properly, we perform
  719. // a SYSRESETREQ and jump straight from the reset vector to main application.
  720. g_bootloader_exit_req = &g_bootloader_exit_req;
  721. SCB->AIRCR = 0x05FA0004;
  722. while(1);
  723. }
  724. void btldr_reset_handler()
  725. {
  726. uint32_t* application_base = &__real_vectors_start;
  727. if (g_bootloader_exit_req == &g_bootloader_exit_req)
  728. {
  729. // Boot to main application
  730. application_base = (uint32_t*)(XIP_BASE + PLATFORM_BOOTLOADER_SIZE);
  731. }
  732. SCB->VTOR = (uint32_t)application_base;
  733. __asm__(
  734. "msr msp, %0\n\t"
  735. "bx %1" : : "r" (application_base[0]),
  736. "r" (application_base[1]) : "memory");
  737. }
  738. // Replace the reset handler when building the bootloader
  739. // The rp2040_btldr.ld places real vector table at an offset.
  740. __attribute__((section(".btldr_vectors")))
  741. const void * btldr_vectors[2] = {&__StackTop, (void*)&btldr_reset_handler};
  742. #endif // PLATFORM_BOOTLOADER_SIZE
  743. /************************************/
  744. /* ROM drive in extra flash space */
  745. /************************************/
  746. #ifdef PLATFORM_HAS_ROM_DRIVE
  747. // Reserve up to 352 kB for firmware.
  748. #define ROMDRIVE_OFFSET (352 * 1024)
  749. uint32_t platform_get_romdrive_maxsize()
  750. {
  751. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  752. {
  753. return g_flash_chip_size - ROMDRIVE_OFFSET;
  754. }
  755. else
  756. {
  757. // Failed to read flash chip size, default to 2 MB
  758. return 2048 * 1024 - ROMDRIVE_OFFSET;
  759. }
  760. }
  761. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  762. {
  763. xip_ctrl_hw->stream_ctr = 0;
  764. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  765. {
  766. (void) xip_ctrl_hw->stream_fifo;
  767. }
  768. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  769. xip_ctrl_hw->stream_ctr = count / 4;
  770. // Transfer happens in multiples of 4 bytes
  771. assert(start < platform_get_romdrive_maxsize());
  772. assert((count & 3) == 0);
  773. assert((((uint32_t)dest) & 3) == 0);
  774. uint32_t *dest32 = (uint32_t*)dest;
  775. uint32_t words_remain = count / 4;
  776. while (words_remain > 0)
  777. {
  778. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  779. {
  780. *dest32++ = xip_ctrl_hw->stream_fifo;
  781. words_remain--;
  782. }
  783. }
  784. return true;
  785. }
  786. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  787. {
  788. assert(start < platform_get_romdrive_maxsize());
  789. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  790. __disable_irq();
  791. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  792. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  793. __enable_irq();
  794. return true;
  795. }
  796. #endif // PLATFORM_HAS_ROM_DRIVE
  797. /**********************************************/
  798. /* Mapping from data bytes to GPIO BOP values */
  799. /**********************************************/
  800. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  801. * For RP2040 we expect that the bits are consecutive and in order.
  802. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  803. * The parity table is placed into SRAM4 area to reduce bus contention.
  804. */
  805. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  806. #define X(n) (\
  807. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  808. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  809. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  810. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  811. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  812. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  813. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  814. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  815. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  816. )
  817. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  818. {
  819. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  820. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  821. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  822. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  823. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  824. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  825. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  826. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  827. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  828. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  829. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  830. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  831. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  832. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  833. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  834. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  835. };
  836. #undef X
  837. /* Similarly, another lookup table is used to verify parity of received data.
  838. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  839. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  840. */
  841. #define X(n) (\
  842. ((n & 0xFF) ^ 0xFF) | \
  843. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  844. )
  845. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  846. {
  847. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  848. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  849. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  850. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  851. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  852. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  853. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  854. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  855. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  856. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  857. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  858. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  859. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  860. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  861. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  862. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  863. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  864. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  865. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  866. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  867. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  868. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  869. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  870. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  871. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  872. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  873. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  874. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  875. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  876. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  877. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  878. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  879. };
  880. #undef X
  881. } /* extern "C" */
  882. #ifdef __MBED__
  883. /* Logging from mbed */
  884. static class LogTarget: public mbed::FileHandle {
  885. public:
  886. virtual ssize_t read(void *buffer, size_t size) { return 0; }
  887. virtual ssize_t write(const void *buffer, size_t size)
  888. {
  889. // A bit inefficient but mbed seems to write() one character
  890. // at a time anyways.
  891. for (int i = 0; i < size; i++)
  892. {
  893. char buf[2] = {((const char*)buffer)[i], 0};
  894. log_raw(buf);
  895. }
  896. return size;
  897. }
  898. virtual off_t seek(off_t offset, int whence = SEEK_SET) { return offset; }
  899. virtual int close() { return 0; }
  900. virtual off_t size() { return 0; }
  901. } g_LogTarget;
  902. mbed::FileHandle *mbed::mbed_override_console(int fd)
  903. {
  904. return &g_LogTarget;
  905. }
  906. #endif // __MBED__