scsiPhy.cpp 8.3 KB

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  1. // Implements the low level interface to SCSI bus
  2. // Partially derived from scsiPhy.c from SCSI2SD-V6
  3. #include "scsiPhy.h"
  4. #include "ZuluSCSI_platform.h"
  5. #include "ZuluSCSI_log.h"
  6. #include "ZuluSCSI_log_trace.h"
  7. #include "ZuluSCSI_config.h"
  8. #include "scsi_accel_rp2040.h"
  9. #include <scsi2sd.h>
  10. extern "C" {
  11. #include <scsi.h>
  12. #include <scsi2sd_time.h>
  13. }
  14. /***********************/
  15. /* SCSI status signals */
  16. /***********************/
  17. extern "C" bool scsiStatusATN()
  18. {
  19. return SCSI_IN(ATN);
  20. }
  21. extern "C" bool scsiStatusBSY()
  22. {
  23. return SCSI_IN(BSY);
  24. }
  25. /************************/
  26. /* SCSI selection logic */
  27. /************************/
  28. volatile uint8_t g_scsi_sts_selection;
  29. volatile uint8_t g_scsi_ctrl_bsy;
  30. void scsi_bsy_deassert_interrupt()
  31. {
  32. if (SCSI_IN(SEL) && !SCSI_IN(BSY))
  33. {
  34. // Check if any of the targets we simulate is selected
  35. uint8_t sel_bits = SCSI_IN_DATA();
  36. int sel_id = -1;
  37. for (int i = 0; i < S2S_MAX_TARGETS; i++)
  38. {
  39. if (scsiDev.targets[i].targetId <= 7 && scsiDev.targets[i].cfg)
  40. {
  41. if (sel_bits & (1 << scsiDev.targets[i].targetId))
  42. {
  43. sel_id = scsiDev.targets[i].targetId;
  44. break;
  45. }
  46. }
  47. }
  48. if (sel_id >= 0)
  49. {
  50. uint8_t atn_flag = SCSI_IN(ATN) ? SCSI_STS_SELECTION_ATN : 0;
  51. g_scsi_sts_selection = SCSI_STS_SELECTION_SUCCEEDED | atn_flag | sel_id;
  52. }
  53. // selFlag is required for Philips P2000C which releases it after 600ns
  54. // without waiting for BSY.
  55. // Also required for some early Mac Plus roms
  56. scsiDev.selFlag = *SCSI_STS_SELECTED;
  57. }
  58. }
  59. extern "C" bool scsiStatusSEL()
  60. {
  61. if (g_scsi_ctrl_bsy)
  62. {
  63. // We don't have direct register access to BSY bit like SCSI2SD scsi.c expects.
  64. // Instead update the state here.
  65. // Releasing happens with bus release.
  66. g_scsi_ctrl_bsy = 0;
  67. SCSI_OUT(BSY, 1);
  68. // On RP2040 hardware the ATN signal is only available after OUT_BSY enables
  69. // the IO buffer U105, so check the signal status here.
  70. delay_100ns();
  71. scsiDev.atnFlag |= scsiStatusATN();
  72. }
  73. return SCSI_IN(SEL);
  74. }
  75. /************************/
  76. /* SCSI bus reset logic */
  77. /************************/
  78. static void scsi_rst_assert_interrupt()
  79. {
  80. // Glitch filtering
  81. bool rst1 = SCSI_IN(RST);
  82. delay_ns(500);
  83. bool rst2 = SCSI_IN(RST);
  84. if (rst1 && rst2)
  85. {
  86. azdbg("BUS RESET");
  87. scsiDev.resetFlag = 1;
  88. }
  89. }
  90. static void scsiPhyIRQ(uint gpio, uint32_t events)
  91. {
  92. if (gpio == SCSI_IN_BSY)
  93. {
  94. // Note BSY interrupts only when we are not driving OUT_BSY low ourselves.
  95. // The BSY input pin may be shared with other signals.
  96. if (sio_hw->gpio_out & (1 << SCSI_OUT_BSY))
  97. {
  98. scsi_bsy_deassert_interrupt();
  99. }
  100. }
  101. else if (gpio == SCSI_IN_RST)
  102. {
  103. scsi_rst_assert_interrupt();
  104. }
  105. }
  106. // This function is called to initialize the phy code.
  107. // It is called after power-on and after SCSI bus reset.
  108. extern "C" void scsiPhyReset(void)
  109. {
  110. SCSI_RELEASE_OUTPUTS();
  111. g_scsi_sts_selection = 0;
  112. g_scsi_ctrl_bsy = 0;
  113. scsi_accel_rp2040_init();
  114. // Enable BSY and RST interrupts
  115. // Note: RP2040 library currently supports only one callback,
  116. // so it has to be same for both pins.
  117. gpio_set_irq_enabled_with_callback(SCSI_IN_BSY, GPIO_IRQ_EDGE_RISE, true, scsiPhyIRQ);
  118. gpio_set_irq_enabled_with_callback(SCSI_IN_RST, GPIO_IRQ_EDGE_FALL, true, scsiPhyIRQ);
  119. }
  120. /************************/
  121. /* SCSI bus phase logic */
  122. /************************/
  123. static SCSI_PHASE g_scsi_phase;
  124. extern "C" void scsiEnterPhase(int phase)
  125. {
  126. int delay = scsiEnterPhaseImmediate(phase);
  127. if (delay > 0)
  128. {
  129. s2s_delay_ns(delay);
  130. }
  131. }
  132. // Change state and return nanosecond delay to wait
  133. extern "C" uint32_t scsiEnterPhaseImmediate(int phase)
  134. {
  135. // ANSI INCITS 362-2002 SPI-3 10.7.1:
  136. // Phase changes are not allowed while REQ or ACK is asserted.
  137. while (likely(!scsiDev.resetFlag) && SCSI_IN(ACK)) {}
  138. if (phase != g_scsi_phase)
  139. {
  140. int oldphase = g_scsi_phase;
  141. g_scsi_phase = (SCSI_PHASE)phase;
  142. scsiLogPhaseChange(phase);
  143. // Select between synchronous vs. asynchronous SCSI writes
  144. if (g_scsi_phase == DATA_IN && scsiDev.target->syncOffset > 0)
  145. {
  146. scsi_accel_rp2040_setWriteMode(scsiDev.target->syncOffset, scsiDev.target->syncPeriod);
  147. }
  148. else
  149. {
  150. scsi_accel_rp2040_setWriteMode(0, 0);
  151. }
  152. if (phase < 0)
  153. {
  154. // Other communication on bus or reset state
  155. SCSI_RELEASE_OUTPUTS();
  156. return 0;
  157. }
  158. else
  159. {
  160. SCSI_OUT(MSG, phase & __scsiphase_msg);
  161. SCSI_OUT(CD, phase & __scsiphase_cd);
  162. SCSI_OUT(IO, phase & __scsiphase_io);
  163. SCSI_ENABLE_CONTROL_OUT();
  164. int delayNs = 400; // Bus settle delay
  165. if ((oldphase & __scsiphase_io) != (phase & __scsiphase_io))
  166. {
  167. delayNs += 400; // Data release delay
  168. }
  169. if (scsiDev.compatMode < COMPAT_SCSI2)
  170. {
  171. // EMU EMAX needs 100uS ! 10uS is not enough.
  172. delayNs += 100000;
  173. }
  174. return delayNs;
  175. }
  176. }
  177. else
  178. {
  179. return 0;
  180. }
  181. }
  182. // Release all signals
  183. void scsiEnterBusFree(void)
  184. {
  185. g_scsi_phase = BUS_FREE;
  186. g_scsi_sts_selection = 0;
  187. g_scsi_ctrl_bsy = 0;
  188. scsiDev.cdbLen = 0;
  189. SCSI_RELEASE_OUTPUTS();
  190. }
  191. /********************/
  192. /* Transmit to host */
  193. /********************/
  194. #define SCSI_WAIT_ACTIVE(pin) \
  195. if (!SCSI_IN(pin)) { \
  196. if (!SCSI_IN(pin)) { \
  197. while(!SCSI_IN(pin) && !scsiDev.resetFlag); \
  198. } \
  199. }
  200. #define SCSI_WAIT_INACTIVE(pin) \
  201. if (SCSI_IN(pin)) { \
  202. if (SCSI_IN(pin)) { \
  203. while(SCSI_IN(pin) && !scsiDev.resetFlag); \
  204. } \
  205. }
  206. // Write one byte to SCSI host using the handshake mechanism
  207. static inline void scsiWriteOneByte(uint8_t value)
  208. {
  209. SCSI_OUT_DATA(value);
  210. delay_100ns(); // DB setup time before REQ
  211. SCSI_OUT(REQ, 1);
  212. SCSI_WAIT_ACTIVE(ACK);
  213. SCSI_RELEASE_DATA_REQ();
  214. SCSI_WAIT_INACTIVE(ACK);
  215. }
  216. extern "C" void scsiWriteByte(uint8_t value)
  217. {
  218. scsiLogDataIn(&value, 1);
  219. scsiWriteOneByte(value);
  220. }
  221. extern "C" void scsiWrite(const uint8_t* data, uint32_t count)
  222. {
  223. scsiStartWrite(data, count);
  224. scsiFinishWrite();
  225. }
  226. extern "C" void scsiStartWrite(const uint8_t* data, uint32_t count)
  227. {
  228. scsiLogDataIn(data, count);
  229. if ((count & 1) != 0)
  230. {
  231. // Unaligned write, do it byte-by-byte
  232. scsiFinishWrite();
  233. for (uint32_t i = 0; i < count; i++)
  234. {
  235. if (scsiDev.resetFlag) break;
  236. scsiWriteOneByte(data[i]);
  237. }
  238. }
  239. else
  240. {
  241. // Use accelerated routine
  242. scsi_accel_rp2040_startWrite(data, count, &scsiDev.resetFlag);
  243. }
  244. }
  245. extern "C" bool scsiIsWriteFinished(const uint8_t *data)
  246. {
  247. return scsi_accel_rp2040_isWriteFinished(data);
  248. }
  249. extern "C" void scsiFinishWrite()
  250. {
  251. scsi_accel_rp2040_finishWrite(&scsiDev.resetFlag);
  252. }
  253. /*********************/
  254. /* Receive from host */
  255. /*********************/
  256. // Read one byte from SCSI host using the handshake mechanism.
  257. static inline uint8_t scsiReadOneByte(int* parityError)
  258. {
  259. SCSI_OUT(REQ, 1);
  260. SCSI_WAIT_ACTIVE(ACK);
  261. delay_100ns();
  262. uint16_t r = SCSI_IN_DATA();
  263. SCSI_OUT(REQ, 0);
  264. SCSI_WAIT_INACTIVE(ACK);
  265. if (parityError && r != (g_scsi_parity_lookup[r & 0xFF] ^ SCSI_IO_DATA_MASK))
  266. {
  267. azlog("Parity error in scsiReadOneByte(): ", (uint32_t)r);
  268. *parityError = 1;
  269. }
  270. return (uint8_t)r;
  271. }
  272. extern "C" uint8_t scsiReadByte(void)
  273. {
  274. uint8_t r = scsiReadOneByte(NULL);
  275. scsiLogDataOut(&r, 1);
  276. return r;
  277. }
  278. extern "C" void scsiRead(uint8_t* data, uint32_t count, int* parityError)
  279. {
  280. *parityError = 0;
  281. if ((count & 1) != 0)
  282. {
  283. // Unaligned transfer, do byte by byte
  284. for (uint32_t i = 0; i < count; i++)
  285. {
  286. if (scsiDev.resetFlag) break;
  287. data[i] = scsiReadOneByte(parityError);
  288. }
  289. }
  290. else
  291. {
  292. // Use accelerated routine
  293. scsi_accel_rp2040_read(data, count, parityError, &scsiDev.resetFlag);
  294. }
  295. scsiLogDataOut(data, count);
  296. }