ZuluSCSI_platform.cpp 42 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022-2025 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "ZuluSCSI_platform.h"
  22. #include "ZuluSCSI_log.h"
  23. #include <SdFat.h>
  24. #include <sdio.h>
  25. #include <scsi.h>
  26. #include <assert.h>
  27. #include <hardware/gpio.h>
  28. #include <hardware/pio.h>
  29. #include <hardware/uart.h>
  30. #include <hardware/pll.h>
  31. #include <hardware/clocks.h>
  32. #include <hardware/spi.h>
  33. #include <hardware/adc.h>
  34. #include <hardware/flash.h>
  35. #include <hardware/structs/xip_ctrl.h>
  36. #include <hardware/structs/usb.h>
  37. #include <hardware/sync.h>
  38. #include "scsi_accel_target.h"
  39. #include "custom_timings.h"
  40. #include <ZuluSCSI_settings.h>
  41. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  42. # include <SerialUSB.h>
  43. # include <class/cdc/cdc_device.h>
  44. #endif
  45. #include <pico/multicore.h>
  46. #ifdef ZULUSCSI_NETWORK
  47. extern "C" {
  48. # include <pico/cyw43_arch.h>
  49. }
  50. #endif // ZULUSCSI_NETWORK
  51. #ifdef PLATFORM_MASS_STORAGE
  52. #include "ZuluSCSI_platform_msc.h"
  53. #endif
  54. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  55. # include "audio_spdif.h"
  56. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  57. # include "audio_i2s.h"
  58. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  59. extern bool g_rawdrive_active;
  60. extern "C" {
  61. #include "timings_RP2MCU.h"
  62. const char *g_platform_name = PLATFORM_NAME;
  63. static bool g_scsi_initiator = false;
  64. static uint32_t g_flash_chip_size = 0;
  65. static bool g_uart_initialized = false;
  66. static bool g_led_blinking = false;
  67. static void usb_log_poll();
  68. /***************/
  69. /* GPIO init */
  70. /***************/
  71. // Helper function to configure whole GPIO in one line
  72. static void gpio_conf(uint gpio, gpio_function_t fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  73. {
  74. gpio_put(gpio, initial_state);
  75. gpio_set_dir(gpio, output);
  76. gpio_set_pulls(gpio, pullup, pulldown);
  77. gpio_set_function(gpio, fn);
  78. if (fast_slew)
  79. {
  80. pads_bank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  81. }
  82. }
  83. static void reclock() {
  84. // ensure UART is fully drained before we mess up its clock
  85. if (uart_is_enabled(uart0))
  86. uart_tx_wait_blocking(uart0);
  87. // switch clk_sys and clk_peri to pll_usb
  88. // see code in 2.15.6.1 of the datasheet for useful comments
  89. clock_configure(clk_sys,
  90. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  91. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  92. 48 * MHZ,
  93. 48 * MHZ);
  94. clock_configure(clk_peri,
  95. 0,
  96. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  97. 48 * MHZ,
  98. 48 * MHZ);
  99. // reset PLL
  100. pll_init(pll_sys,
  101. g_zuluscsi_timings->pll.refdiv,
  102. g_zuluscsi_timings->pll.vco_freq,
  103. g_zuluscsi_timings->pll.post_div1,
  104. g_zuluscsi_timings->pll.post_div2);
  105. // switch clocks back to pll_sys
  106. clock_configure(clk_sys,
  107. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  108. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  109. g_zuluscsi_timings->clk_hz,
  110. g_zuluscsi_timings->clk_hz);
  111. clock_configure(clk_peri,
  112. 0,
  113. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  114. g_zuluscsi_timings->clk_hz,
  115. g_zuluscsi_timings->clk_hz);
  116. // reset UART for the new clock speed
  117. if (uart_is_enabled(uart0))
  118. uart_init(uart0, 1000000);
  119. }
  120. uint32_t platform_sys_clock_in_hz()
  121. {
  122. return clock_get_hz(clk_sys);
  123. }
  124. bool platform_reclock(zuluscsi_speed_grade_t speed_grade)
  125. {
  126. CustomTimings ct;
  127. bool do_reclock = false;
  128. if (speed_grade != SPEED_GRADE_DEFAULT)
  129. {
  130. if (speed_grade == SPEED_GRADE_CUSTOM)
  131. {
  132. if (ct.use_custom_timings())
  133. {
  134. logmsg("Using custom timings found in \"", CUSTOM_TIMINGS_FILE, "\" for reclocking");
  135. ct.set_timings_from_file();
  136. do_reclock = true;
  137. }
  138. else
  139. {
  140. logmsg("Custom timings file, \"", CUSTOM_TIMINGS_FILE, "\" not found or disabled");
  141. }
  142. }
  143. else if (set_timings(speed_grade))
  144. do_reclock = true;
  145. if (do_reclock)
  146. {
  147. #ifdef ENABLE_AUDIO_OUTPUT
  148. if (g_zuluscsi_timings->audio.audio_clocked)
  149. logmsg("Reclocking with these settings are compatible with CD audio playback");
  150. else
  151. logmsg("Reclocking with these settings may cause audio playback to be too fast or slow ");
  152. #endif
  153. logmsg("Initial Clock set to ", (int) platform_sys_clock_in_hz(), "Hz");
  154. logmsg("Reclocking the MCU to ",(int) g_zuluscsi_timings->clk_hz, "Hz");
  155. logmsg("Setting the SDIO clock to ", (int)((g_zuluscsi_timings->clk_hz / g_zuluscsi_timings->sdio.clk_div_pio + (5 * MHZ / 10)) / MHZ) , "MHz");
  156. usb_log_poll();
  157. reclock();
  158. logmsg("After reclocking, system reports clock set to ", (int) platform_sys_clock_in_hz(), "Hz");
  159. }
  160. }
  161. else
  162. logmsg("Speed grade is set to default, reclocking skipped");
  163. return do_reclock;
  164. }
  165. bool platform_rebooted_into_mass_storage()
  166. {
  167. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  168. if (*scratch0 == REBOOT_INTO_MASS_STORAGE_MAGIC_NUM)
  169. {
  170. *scratch0 = 0;
  171. return true;
  172. }
  173. return false;
  174. }
  175. #ifdef HAS_DIP_SWITCHES
  176. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  177. static pin_setup_state_t read_setup_ack_pin()
  178. {
  179. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  180. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  181. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  182. *
  183. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  184. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  185. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  186. */
  187. // Strong output high, then pulldown
  188. // pin function pup pdown out state fast
  189. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  190. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  191. delay(1);
  192. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  193. // Strong output low, then pullup
  194. // pin function pup pdown out state fast
  195. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  196. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  197. delay(1);
  198. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  199. if (ack_state1 == ack_state2)
  200. {
  201. // Ok, was able to read the state directly
  202. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  203. }
  204. // Enable OUT_BSY for a short time.
  205. // If in target mode, this will force GPIO_ACK high.
  206. gpio_put(SCSI_OUT_BSY, 0);
  207. delay_100ns();
  208. gpio_put(SCSI_OUT_BSY, 1);
  209. return SETUP_UNDETERMINED;
  210. }
  211. #endif
  212. void platform_init()
  213. {
  214. // Make sure second core is stopped
  215. multicore_reset_core1();
  216. pio_clear_instruction_memory(pio0);
  217. pio_clear_instruction_memory(pio1);
  218. /* First configure the pins that affect external buffer directions.
  219. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  220. */
  221. // pin function pup pdown out state fast
  222. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  223. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  224. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  225. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  226. /* Check dip switch settings */
  227. #ifdef HAS_DIP_SWITCHES
  228. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  229. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  230. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  231. delay(10); // 10 ms delay to let pull-ups do their work
  232. bool working_dip = true;
  233. bool dbglog = false;
  234. bool termination = false;
  235. # if defined(ZULUSCSI_PICO) || defined(ZULUSCSI_PICO_2)
  236. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  237. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  238. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  239. if (working_dip)
  240. {
  241. dbglog = !gpio_get(DIP_DBGLOG);
  242. termination = !gpio_get(DIP_TERM);
  243. }
  244. # elif defined(ZULUSCSI_V2_0)
  245. pin_setup_state_t dip_state = read_setup_ack_pin();
  246. if (dip_state == SETUP_UNDETERMINED)
  247. {
  248. // This path is used for the few early RP2040 boards assembled with
  249. // Diodes Incorporated 74LVT245B, which has higher bus hold
  250. // current.
  251. working_dip = false;
  252. g_scsi_initiator = !gpio_get(DIP_INITIATOR); // Read fallback value
  253. }
  254. else
  255. {
  256. g_scsi_initiator = (SETUP_TRUE == dip_state);
  257. termination = !gpio_get(DIP_TERM);
  258. }
  259. // dbglog DIP switch works in any case, as it does not have bus hold.
  260. dbglog = !gpio_get(DIP_DBGLOG);
  261. g_log_debug = dbglog;
  262. # else
  263. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  264. termination = !gpio_get(DIP_TERM);
  265. dbglog = !gpio_get(DIP_DBGLOG);
  266. g_log_debug = dbglog;
  267. # endif
  268. #else
  269. delay(10);
  270. #endif // HAS_DIP_SWITCHES
  271. #ifndef DISABLE_SWO
  272. /* Initialize logging to SWO pin (UART0) */
  273. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  274. uart_init(uart0, 1000000);
  275. g_uart_initialized = true;
  276. #endif // DISABLE_SWO
  277. logmsg("Platform: ", g_platform_name);
  278. logmsg("FW Version: ", g_log_firmwareversion);
  279. #ifdef HAS_DIP_SWITCHES
  280. if (working_dip)
  281. {
  282. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  283. g_log_debug = dbglog;
  284. if (termination)
  285. {
  286. logmsg("SCSI termination is enabled");
  287. }
  288. else
  289. {
  290. logmsg("NOTE: SCSI termination is disabled");
  291. }
  292. }
  293. else
  294. {
  295. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  296. #if defined(ZULUSCSI_PICO) || defined(ZULUSCSI_PICO_2)
  297. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in zuluscsi.ini");
  298. logmsg("-- DEBUG DIP switch setting is ignored on ZuluSCSI Pico FS Rev. 2023b and 2023c boards");
  299. g_log_debug = false;
  300. #endif
  301. }
  302. #else
  303. g_log_debug = false;
  304. logmsg ("SCSI termination is handled by a hardware jumper");
  305. #endif // HAS_DIP_SWITCHES
  306. // Get flash chip size
  307. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  308. uint8_t response_jedec[4] = {0};
  309. uint32_t saved_irq = save_and_disable_interrupts();
  310. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  311. restore_interrupts(saved_irq);
  312. g_flash_chip_size = (1 << response_jedec[3]);
  313. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  314. // SD card pins
  315. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  316. // pin function pup pdown out state fast
  317. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  318. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  319. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  320. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  321. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  322. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  323. // LED pin
  324. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  325. #ifndef ENABLE_AUDIO_OUTPUT_SPDIF
  326. #ifdef GPIO_I2C_SDA
  327. // I2C pins
  328. // pin function pup pdown out state fast
  329. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  330. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  331. #endif // GPIO_I2C_SDA
  332. #else
  333. // pin function pup pdown out state fast
  334. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  335. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  336. // configuration of corresponding SPI unit occurs in audio_setup()
  337. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  338. #ifdef GPIO_USB_POWER
  339. gpio_conf(GPIO_USB_POWER, GPIO_FUNC_SIO, false, false, false, false, false);
  340. #endif
  341. }
  342. // late_init() only runs in main application, SCSI not needed in bootloader
  343. void platform_late_init()
  344. {
  345. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  346. if (g_scsi_initiator == true)
  347. {
  348. logmsg("SCSI initiator mode selected by DIP switch, expecting SCSI disks on the bus");
  349. }
  350. else
  351. {
  352. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  353. }
  354. #else
  355. g_scsi_initiator = false;
  356. logmsg("SCSI target/disk mode, acting as a SCSI disk");
  357. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  358. /* Initialize SCSI pins to required modes.
  359. * SCSI pins should be inactive / input at this point.
  360. */
  361. // SCSI data bus direction is switched by DATA_DIR signal.
  362. // Pullups make sure that no glitches occur when switching direction.
  363. // pin function pup pdown out state fast
  364. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  365. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  366. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  367. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  368. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  369. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  370. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  371. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  372. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  373. if (!g_scsi_initiator)
  374. {
  375. // Act as SCSI device / target
  376. // SCSI control outputs
  377. // pin function pup pdown out state fast
  378. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  379. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  380. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  381. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  382. // Shared pins are changed to input / output depending on communication phase
  383. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  384. if (SCSI_OUT_CD != SCSI_IN_SEL)
  385. {
  386. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  387. }
  388. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  389. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  390. {
  391. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  392. }
  393. // SCSI control inputs
  394. // pin function pup pdown out state fast
  395. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  396. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  397. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  398. #ifdef ENABLE_AUDIO_OUTPUT_I2S
  399. logmsg("I2S audio to expansion header enabled");
  400. if (!platform_reclock(SPEED_GRADE_AUDIO_I2S))
  401. {
  402. logmsg("Audio output timings not found");
  403. }
  404. #endif
  405. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  406. logmsg("S/PDIF audio to expansion header enabled");
  407. if (platform_reclock(SPEED_GRADE_AUDIO_SPDIF))
  408. {
  409. logmsg("Reclocked for Audio Ouput at ", (int) platform_sys_clock_in_hz(), "Hz");
  410. }
  411. else
  412. {
  413. logmsg("Audio Output timings not found");
  414. }
  415. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  416. #ifdef ENABLE_AUDIO_OUTPUT
  417. // one-time control setup for DMA channels and second core
  418. audio_setup();
  419. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  420. }
  421. else
  422. {
  423. #ifndef PLATFORM_HAS_INITIATOR_MODE
  424. assert(false);
  425. #else
  426. // Act as SCSI initiator
  427. // pin function pup pdown out state fast
  428. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  429. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  430. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  431. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  432. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  433. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  434. // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST.
  435. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true);
  436. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  437. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true);
  438. gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true);
  439. #endif // PLATFORM_HAS_INITIATOR_MODE
  440. }
  441. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  442. Serial.begin();
  443. #endif
  444. scsi_accel_rp2040_init();
  445. }
  446. void platform_post_sd_card_init() {}
  447. bool platform_is_initiator_mode_enabled()
  448. {
  449. return g_scsi_initiator;
  450. }
  451. void platform_write_led(bool state)
  452. {
  453. if (g_led_blinking) return;
  454. if (g_scsi_settings.getSystem()->invertStatusLed)
  455. state = !state;
  456. gpio_put(LED_PIN, state);
  457. }
  458. void platform_set_blink_status(bool status)
  459. {
  460. g_led_blinking = status;
  461. }
  462. void platform_write_led_override(bool state)
  463. {
  464. if (g_scsi_settings.getSystem()->invertStatusLed)
  465. state = !state;
  466. gpio_put(LED_PIN, state);
  467. }
  468. void platform_disable_led(void)
  469. {
  470. // pin function pup pdown out state fast
  471. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  472. logmsg("Disabling status LED");
  473. }
  474. uint8_t platform_no_sd_card_on_init_error_code()
  475. {
  476. return SDIO_ERR_RESPONSE_TIMEOUT;
  477. }
  478. /*****************************************/
  479. /* Crash handlers */
  480. /*****************************************/
  481. extern SdFs SD;
  482. extern uint32_t __StackTop;
  483. void platform_emergency_log_save()
  484. {
  485. if (g_rawdrive_active)
  486. return;
  487. platform_set_sd_callback(NULL, NULL);
  488. SD.begin(SD_CONFIG_CRASH);
  489. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  490. if (!crashfile.isOpen())
  491. {
  492. // Try to reinitialize
  493. int max_retry = 10;
  494. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  495. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  496. }
  497. uint32_t startpos = 0;
  498. crashfile.write(log_get_buffer(&startpos));
  499. crashfile.write(log_get_buffer(&startpos));
  500. crashfile.flush();
  501. crashfile.close();
  502. }
  503. static void usb_log_poll();
  504. static void usb_input_poll();
  505. __attribute__((noinline))
  506. void show_hardfault(uint32_t *sp)
  507. {
  508. uint32_t pc = sp[6];
  509. uint32_t lr = sp[5];
  510. logmsg("--------------");
  511. logmsg("CRASH!");
  512. logmsg("Platform: ", g_platform_name);
  513. logmsg("FW Version: ", g_log_firmwareversion);
  514. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  515. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  516. logmsg("SP: ", (uint32_t)sp);
  517. logmsg("PC: ", pc);
  518. logmsg("LR: ", lr);
  519. logmsg("R0: ", sp[0]);
  520. logmsg("R1: ", sp[1]);
  521. logmsg("R2: ", sp[2]);
  522. logmsg("R3: ", sp[3]);
  523. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  524. for (int i = 0; i < 8; i++)
  525. {
  526. if (p == &__StackTop) break; // End of stack
  527. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  528. p += 4;
  529. }
  530. platform_emergency_log_save();
  531. while (1)
  532. {
  533. usb_log_poll();
  534. // Flash the crash address on the LED
  535. // Short pulse means 0, long pulse means 1
  536. int base_delay = 500;
  537. for (int i = 31; i >= 0; i--)
  538. {
  539. LED_OFF();
  540. for (int j = 0; j < base_delay; j++) busy_wait_ms(1);
  541. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  542. LED_ON();
  543. for (int j = 0; j < delay; j++) busy_wait_ms(1);
  544. LED_OFF();
  545. }
  546. for (int j = 0; j < base_delay * 10; j++) busy_wait_ms(1);
  547. }
  548. }
  549. __attribute__((naked, interrupt))
  550. void isr_hardfault(void)
  551. {
  552. // Copies stack pointer into first argument
  553. asm("mrs r0, msp\n"
  554. "bl show_hardfault": : : "r0");
  555. }
  556. /*****************************************/
  557. /* Debug logging and watchdog */
  558. /*****************************************/
  559. // Send log data to USB UART if USB is connected.
  560. // Data is retrieved from the shared log ring buffer and
  561. // this function sends as much as fits in USB CDC buffer.
  562. //
  563. // This is normally called by platform_reset_watchdog() in
  564. // the normal polling loop. If code hangs, the watchdog_callback()
  565. // also starts calling this after 2 seconds.
  566. // This ensures that log messages get passed even if code hangs,
  567. // but does not unnecessarily delay normal execution.
  568. static void usb_log_poll()
  569. {
  570. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  571. static uint32_t logpos = 0;
  572. #ifdef PLATFORM_MASS_STORAGE
  573. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  574. #endif
  575. if (Serial.availableForWrite())
  576. {
  577. // Retrieve pointer to log start and determine number of bytes available.
  578. uint32_t available = 0;
  579. const char *data = log_get_buffer(&logpos, &available);
  580. // Limit to CDC packet size
  581. uint32_t len = available;
  582. if (len == 0) return;
  583. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  584. // Update log position by the actual number of bytes sent
  585. // If USB CDC buffer is full, this may be 0
  586. uint32_t actual = 0;
  587. actual = Serial.write(data, len);
  588. logpos -= available - actual;
  589. }
  590. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  591. }
  592. // Grab input from USB Serial terminal
  593. static void usb_input_poll()
  594. {
  595. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  596. #ifdef PLATFORM_MASS_STORAGE
  597. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  598. #endif
  599. // Caputure reboot key sequence
  600. static bool mass_storage_reboot_keyed = false;
  601. static bool basic_reboot_keyed = false;
  602. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  603. int32_t available = Serial.available();
  604. if(available > 0)
  605. {
  606. int32_t read = Serial.read();
  607. switch((char) read)
  608. {
  609. case 'R':
  610. case 'r':
  611. basic_reboot_keyed = true;
  612. mass_storage_reboot_keyed = false;
  613. logmsg("Basic reboot requested, press 'y' to engage or any key to clear");
  614. break;
  615. case 'M':
  616. case 'm':
  617. mass_storage_reboot_keyed = true;
  618. basic_reboot_keyed = false;
  619. logmsg("Boot into mass storage requested, press 'y' to engage or any key to clear");
  620. *scratch0 = REBOOT_INTO_MASS_STORAGE_MAGIC_NUM;
  621. break;
  622. case 'Y':
  623. case 'y':
  624. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  625. {
  626. logmsg("Rebooting", mass_storage_reboot_keyed ? " into mass storage": "");
  627. watchdog_reboot(0, 0, 2000);
  628. }
  629. break;
  630. case '\n':
  631. break;
  632. default:
  633. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  634. logmsg("Cleared reboot setting");
  635. mass_storage_reboot_keyed = false;
  636. basic_reboot_keyed = false;
  637. }
  638. }
  639. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  640. }
  641. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  642. // This works by sampling the temperature sensor channel, which has
  643. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  644. static void adc_poll()
  645. {
  646. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  647. static bool initialized = false;
  648. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  649. if (!initialized)
  650. {
  651. adc_init();
  652. adc_set_temp_sensor_enabled(true);
  653. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  654. #ifdef ZULUSCSI_BLASTER
  655. adc_select_input(8);
  656. #else
  657. adc_select_input(4);
  658. #endif
  659. adc_fifo_setup(true, false, 0, false, false);
  660. adc_run(true);
  661. initialized = true;
  662. }
  663. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  664. /*
  665. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  666. * at the same time a SPI DMA write begins, it appears that the first
  667. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  668. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  669. * is playing.
  670. */
  671. if (audio_is_active()) return;
  672. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  673. int adc_value_max = 0;
  674. while (!adc_fifo_is_empty())
  675. {
  676. int adc_value = adc_fifo_get();
  677. if (adc_value > adc_value_max) adc_value_max = adc_value;
  678. }
  679. // adc_value = 700mV * 4096 / Vdd
  680. // => Vdd = 700mV * 4096 / adc_value
  681. // To avoid wasting time on division, compare against
  682. // limit directly.
  683. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  684. if (adc_value_max > limit)
  685. {
  686. // Warn once, and then again if we detect even a lower drop.
  687. int vdd_mV = (700 * 4096) / adc_value_max;
  688. if (vdd_mV < lowest_vdd_seen)
  689. {
  690. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  691. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  692. }
  693. }
  694. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  695. }
  696. // This function is called for every log message.
  697. void platform_log(const char *s)
  698. {
  699. if (g_uart_initialized)
  700. {
  701. uart_puts(uart0, s);
  702. }
  703. }
  704. static int g_watchdog_timeout;
  705. static bool g_watchdog_initialized;
  706. static void watchdog_callback(unsigned alarm_num)
  707. {
  708. g_watchdog_timeout -= 1000;
  709. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  710. {
  711. // Been stuck for at least a second, start dumping USB log
  712. usb_log_poll();
  713. }
  714. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  715. {
  716. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  717. {
  718. logmsg("--------------");
  719. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  720. logmsg("Platform: ", g_platform_name);
  721. logmsg("FW Version: ", g_log_firmwareversion);
  722. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  723. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  724. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  725. scsi_accel_log_state();
  726. uint32_t msp;
  727. asm volatile ("MRS %0, msp" : "=r" (msp) );
  728. uint32_t *p = (uint32_t*)msp;
  729. for (int i = 0; i < 8; i++)
  730. {
  731. if (p == &__StackTop) break; // End of stack
  732. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  733. p += 4;
  734. }
  735. scsiDev.resetFlag = 1;
  736. g_scsiHostPhyReset = true;
  737. }
  738. if (g_watchdog_timeout <= 0)
  739. {
  740. logmsg("--------------");
  741. logmsg("WATCHDOG TIMEOUT, already attempted bus reset, rebooting");
  742. logmsg("Platform: ", g_platform_name);
  743. logmsg("FW Version: ", g_log_firmwareversion);
  744. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  745. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  746. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  747. uint32_t msp;
  748. asm volatile ("MRS %0, msp" : "=r" (msp) );
  749. uint32_t *p = (uint32_t*)msp;
  750. for (int i = 0; i < 8; i++)
  751. {
  752. if (p == &__StackTop) break; // End of stack
  753. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  754. p += 4;
  755. }
  756. usb_log_poll();
  757. platform_emergency_log_save();
  758. platform_boot_to_main_firmware();
  759. }
  760. }
  761. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  762. }
  763. // This function can be used to periodically reset watchdog timer for crash handling.
  764. // It can also be left empty if the platform does not use a watchdog timer.
  765. void platform_reset_watchdog()
  766. {
  767. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  768. if (!g_watchdog_initialized)
  769. {
  770. int alarm_num = -1;
  771. for (int i = 0; i < NUM_GENERIC_TIMERS; i++)
  772. {
  773. if (!hardware_alarm_is_claimed(i))
  774. {
  775. alarm_num = i;
  776. break;
  777. }
  778. }
  779. if (alarm_num == -1)
  780. {
  781. logmsg("No free watchdog hardware alarms to claim");
  782. return;
  783. }
  784. hardware_alarm_claim(alarm_num);
  785. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  786. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  787. g_watchdog_initialized = true;
  788. }
  789. // USB log is polled here also to make sure any log messages in fault states
  790. // get passed to USB.
  791. usb_log_poll();
  792. }
  793. // Poll function that is called every few milliseconds.
  794. // Can be left empty or used for platform-specific processing.
  795. void platform_poll()
  796. {
  797. usb_input_poll();
  798. usb_log_poll();
  799. adc_poll();
  800. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF) || defined(ENABLE_AUDIO_OUTPUT_I2S)
  801. audio_poll();
  802. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  803. }
  804. void platform_reset_mcu()
  805. {
  806. watchdog_reboot(0, 0, 2000);
  807. }
  808. uint8_t platform_get_buttons()
  809. {
  810. uint8_t buttons = 0;
  811. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  812. // pulled to VCC via resistor, sinking when pressed
  813. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  814. #elif defined(GPIO_I2C_SDA)
  815. // SDA = button 1, SCL = button 2
  816. if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  817. if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  818. #endif // defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  819. // Simple debouncing logic: handle button releases after 100 ms delay.
  820. static uint32_t debounce;
  821. static uint8_t buttons_debounced = 0;
  822. if (buttons != 0)
  823. {
  824. buttons_debounced = buttons;
  825. debounce = millis();
  826. }
  827. else if ((uint32_t)(millis() - debounce) > 100)
  828. {
  829. buttons_debounced = 0;
  830. }
  831. return buttons_debounced;
  832. }
  833. /************************************/
  834. /* ROM drive in extra flash space */
  835. /************************************/
  836. #ifdef PLATFORM_HAS_ROM_DRIVE
  837. # ifndef ROMDRIVE_OFFSET
  838. // Reserve up to 352 kB for firmware by default.
  839. #define ROMDRIVE_OFFSET (352 * 1024)
  840. # endif
  841. uint32_t platform_get_romdrive_maxsize()
  842. {
  843. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  844. {
  845. return g_flash_chip_size - ROMDRIVE_OFFSET;
  846. }
  847. else
  848. {
  849. // Failed to read flash chip size, default to 2 MB
  850. return 2048 * 1024 - ROMDRIVE_OFFSET;
  851. }
  852. }
  853. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  854. {
  855. xip_ctrl_hw->stream_ctr = 0;
  856. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  857. {
  858. (void) xip_ctrl_hw->stream_fifo;
  859. }
  860. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  861. xip_ctrl_hw->stream_ctr = count / 4;
  862. // Transfer happens in multiples of 4 bytes
  863. assert(start < platform_get_romdrive_maxsize());
  864. assert((count & 3) == 0);
  865. assert((((uint32_t)dest) & 3) == 0);
  866. uint32_t *dest32 = (uint32_t*)dest;
  867. uint32_t words_remain = count / 4;
  868. while (words_remain > 0)
  869. {
  870. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  871. {
  872. *dest32++ = xip_ctrl_hw->stream_fifo;
  873. words_remain--;
  874. }
  875. }
  876. return true;
  877. }
  878. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  879. {
  880. assert(start < platform_get_romdrive_maxsize());
  881. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  882. uint32_t saved_irq = save_and_disable_interrupts();
  883. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  884. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  885. restore_interrupts(saved_irq);
  886. return true;
  887. }
  888. #endif // PLATFORM_HAS_ROM_DRIVE
  889. /**********************************************/
  890. /* Mapping from data bytes to GPIO BOP values */
  891. /**********************************************/
  892. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  893. * For RP2040 we expect that the bits are consecutive and in order.
  894. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  895. * The parity table is placed into SRAM4 area to reduce bus contention.
  896. */
  897. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  898. #ifdef ZULUSCSI_BLASTER
  899. # define X(n) (\
  900. ((n & 0x01) ? 0 : (1 << 0)) | \
  901. ((n & 0x02) ? 0 : (1 << 1)) | \
  902. ((n & 0x04) ? 0 : (1 << 2)) | \
  903. ((n & 0x08) ? 0 : (1 << 3)) | \
  904. ((n & 0x10) ? 0 : (1 << 4)) | \
  905. ((n & 0x20) ? 0 : (1 << 5)) | \
  906. ((n & 0x40) ? 0 : (1 << 6)) | \
  907. ((n & 0x80) ? 0 : (1 << 7)) | \
  908. (PARITY(n) ? 0 : (1 << 8)) \
  909. )
  910. #else
  911. # define X(n) (\
  912. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  913. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  914. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  915. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  916. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  917. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  918. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  919. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  920. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  921. )
  922. #endif
  923. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  924. {
  925. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  926. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  927. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  928. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  929. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  930. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  931. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  932. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  933. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  934. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  935. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  936. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  937. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  938. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  939. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  940. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  941. };
  942. #undef X
  943. /* Similarly, another lookup table is used to verify parity of received data.
  944. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  945. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  946. */
  947. #define X(n) (\
  948. ((n & 0xFF) ^ 0xFF) | \
  949. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  950. )
  951. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  952. {
  953. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  954. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  955. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  956. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  957. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  958. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  959. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  960. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  961. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  962. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  963. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  964. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  965. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  966. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  967. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  968. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  969. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  970. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  971. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  972. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  973. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  974. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  975. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  976. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  977. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  978. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  979. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  980. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  981. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  982. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  983. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  984. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  985. };
  986. #undef X
  987. } /* extern "C" */