ZuluSCSI_platform.cpp 42 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "ZuluSCSI_platform.h"
  22. #include "ZuluSCSI_log.h"
  23. #include <SdFat.h>
  24. #include <scsi.h>
  25. #include <assert.h>
  26. #include <hardware/gpio.h>
  27. #include <hardware/pio.h>
  28. #include <hardware/uart.h>
  29. #include <hardware/pll.h>
  30. #include <hardware/clocks.h>
  31. #include <hardware/spi.h>
  32. #include <hardware/adc.h>
  33. #include <hardware/flash.h>
  34. #include <hardware/structs/xip_ctrl.h>
  35. #include <hardware/structs/usb.h>
  36. #include <hardware/sync.h>
  37. #include "scsi_accel_target.h"
  38. #include "custom_timings.h"
  39. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  40. # include <SerialUSB.h>
  41. # include <class/cdc/cdc_device.h>
  42. #endif
  43. #include <pico/multicore.h>
  44. #ifdef ZULUSCSI_NETWORK
  45. extern "C" {
  46. # include <pico/cyw43_arch.h>
  47. }
  48. #endif // ZULUSCSI_NETWORK
  49. #ifdef PLATFORM_MASS_STORAGE
  50. #include "ZuluSCSI_platform_msc.h"
  51. #endif
  52. #ifdef ENABLE_AUDIO_OUTPUT
  53. # include "audio.h"
  54. #endif // ENABLE_AUDIO_OUTPUT
  55. extern bool g_rawdrive_active;
  56. extern "C" {
  57. #include "timings_RP2MCU.h"
  58. const char *g_platform_name = PLATFORM_NAME;
  59. static bool g_scsi_initiator = false;
  60. static uint32_t g_flash_chip_size = 0;
  61. static bool g_uart_initialized = false;
  62. static bool g_led_blinking = false;
  63. /***************/
  64. /* GPIO init */
  65. /***************/
  66. // Helper function to configure whole GPIO in one line
  67. static void gpio_conf(uint gpio, gpio_function_t fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  68. {
  69. gpio_put(gpio, initial_state);
  70. gpio_set_dir(gpio, output);
  71. gpio_set_pulls(gpio, pullup, pulldown);
  72. gpio_set_function(gpio, fn);
  73. if (fast_slew)
  74. {
  75. pads_bank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  76. }
  77. }
  78. static void reclock() {
  79. // ensure UART is fully drained before we mess up its clock
  80. if (uart_is_enabled(uart0))
  81. uart_tx_wait_blocking(uart0);
  82. // switch clk_sys and clk_peri to pll_usb
  83. // see code in 2.15.6.1 of the datasheet for useful comments
  84. clock_configure(clk_sys,
  85. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  86. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  87. 48 * MHZ,
  88. 48 * MHZ);
  89. clock_configure(clk_peri,
  90. 0,
  91. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  92. 48 * MHZ,
  93. 48 * MHZ);
  94. // reset PLL
  95. pll_init(pll_sys,
  96. g_zuluscsi_timings->pll.refdiv,
  97. g_zuluscsi_timings->pll.vco_freq,
  98. g_zuluscsi_timings->pll.post_div1,
  99. g_zuluscsi_timings->pll.post_div2);
  100. // switch clocks back to pll_sys
  101. clock_configure(clk_sys,
  102. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  103. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  104. g_zuluscsi_timings->clk_hz,
  105. g_zuluscsi_timings->clk_hz);
  106. clock_configure(clk_peri,
  107. 0,
  108. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  109. g_zuluscsi_timings->clk_hz,
  110. g_zuluscsi_timings->clk_hz);
  111. // reset UART for the new clock speed
  112. if (uart_is_enabled(uart0))
  113. uart_init(uart0, 1000000);
  114. }
  115. uint32_t platform_sys_clock_in_hz()
  116. {
  117. return clock_get_hz(clk_sys);
  118. }
  119. zuluscsi_speed_grade_t platform_string_to_speed_grade(const char *speed_grade_str, size_t length)
  120. {
  121. static const char sg_default[] = "Default";
  122. zuluscsi_speed_grade_t grade;
  123. #ifdef ENABLE_AUDIO_OUTPUT
  124. logmsg("Audio output enabled, reclocking isn't possible");
  125. return SPEED_GRADE_DEFAULT;
  126. #endif
  127. if (strcasecmp(speed_grade_str, sg_default) == 0)
  128. grade = SPEED_GRADE_DEFAULT;
  129. else if (strcasecmp(speed_grade_str, "TurboMax") == 0)
  130. grade = SPEED_GRADE_MAX;
  131. else if (strcasecmp(speed_grade_str, "TurboA") == 0)
  132. grade = SPEED_GRADE_A;
  133. else if (strcasecmp(speed_grade_str, "TurboB") == 0)
  134. grade = SPEED_GRADE_B;
  135. else if (strcasecmp(speed_grade_str, "TurboC") == 0)
  136. grade = SPEED_GRADE_C;
  137. else if (strcasecmp(speed_grade_str, "Custom") == 0)
  138. grade = SPEED_GRADE_CUSTOM;
  139. else
  140. {
  141. logmsg("Setting \"", speed_grade_str, "\" does not match any know speed grade, using default");
  142. grade = SPEED_GRADE_DEFAULT;
  143. }
  144. return grade;
  145. }
  146. zuluscsi_reclock_status_t platform_reclock(zuluscsi_speed_grade_t speed_grade)
  147. {
  148. CustomTimings ct;
  149. if (speed_grade == SPEED_GRADE_CUSTOM)
  150. {
  151. if (ct.use_custom_timings())
  152. {
  153. logmsg("Custom timings found in \"", CUSTOM_TIMINGS_FILE, "\" overriding reclocking");
  154. logmsg("Initial Clock set to ", (int) platform_sys_clock_in_hz(), "Hz");
  155. if (ct.set_timings_from_file())
  156. {
  157. reclock();
  158. logmsg("SDIO clock set to ", (int)((g_zuluscsi_timings->clk_hz / g_zuluscsi_timings->sdio.clk_div_pio + (5 * MHZ / 10)) / MHZ) , "MHz");
  159. return ZULUSCSI_RECLOCK_CUSTOM;
  160. }
  161. else
  162. return ZULUSCSI_RECLOCK_FAILED;
  163. }
  164. else
  165. {
  166. logmsg("Custom timings file, \"", CUSTOM_TIMINGS_FILE, "\" not found or disabled");
  167. return ZULUSCSI_RECLOCK_FAILED;
  168. }
  169. }
  170. else if (set_timings(speed_grade))
  171. {
  172. logmsg("Initial Clock set to ", (int) platform_sys_clock_in_hz(), "Hz");
  173. reclock();
  174. logmsg("SDIO clock set to ", (int)((g_zuluscsi_timings->clk_hz / g_zuluscsi_timings->sdio.clk_div_pio + (5 * MHZ / 10)) / MHZ) , "MHz");
  175. return ZULUSCSI_RECLOCK_SUCCESS;
  176. }
  177. return ZULUSCSI_RECLOCK_FAILED;
  178. }
  179. bool platform_rebooted_into_mass_storage()
  180. {
  181. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  182. if (*scratch0 == REBOOT_INTO_MASS_STORAGE_MAGIC_NUM)
  183. {
  184. *scratch0 = 0;
  185. return true;
  186. }
  187. return false;
  188. }
  189. #ifdef HAS_DIP_SWITCHES
  190. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  191. static pin_setup_state_t read_setup_ack_pin()
  192. {
  193. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  194. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  195. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  196. *
  197. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  198. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  199. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  200. */
  201. // Strong output high, then pulldown
  202. // pin function pup pdown out state fast
  203. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  204. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  205. delay(1);
  206. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  207. // Strong output low, then pullup
  208. // pin function pup pdown out state fast
  209. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  210. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  211. delay(1);
  212. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  213. if (ack_state1 == ack_state2)
  214. {
  215. // Ok, was able to read the state directly
  216. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  217. }
  218. // Enable OUT_BSY for a short time.
  219. // If in target mode, this will force GPIO_ACK high.
  220. gpio_put(SCSI_OUT_BSY, 0);
  221. delay_100ns();
  222. gpio_put(SCSI_OUT_BSY, 1);
  223. return SETUP_UNDETERMINED;
  224. }
  225. #endif
  226. void platform_init()
  227. {
  228. // Make sure second core is stopped
  229. multicore_reset_core1();
  230. pio_clear_instruction_memory(pio0);
  231. pio_clear_instruction_memory(pio1);
  232. /* First configure the pins that affect external buffer directions.
  233. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  234. */
  235. // pin function pup pdown out state fast
  236. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  237. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  238. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  239. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  240. /* Check dip switch settings */
  241. #ifdef HAS_DIP_SWITCHES
  242. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  243. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  244. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  245. delay(10); // 10 ms delay to let pull-ups do their work
  246. bool working_dip = true;
  247. bool dbglog = false;
  248. bool termination = false;
  249. # if defined(ZULUSCSI_PICO) || defined(ZULUSCSI_PICO_2)
  250. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  251. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  252. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  253. if (working_dip)
  254. {
  255. dbglog = !gpio_get(DIP_DBGLOG);
  256. termination = !gpio_get(DIP_TERM);
  257. }
  258. # else
  259. pin_setup_state_t dip_state = read_setup_ack_pin();
  260. if (dip_state == SETUP_UNDETERMINED)
  261. {
  262. // This path is used for the few early RP2040 boards assembled with
  263. // Diodes Incorporated 74LVT245B, which has higher bus hold
  264. // current.
  265. working_dip = false;
  266. g_scsi_initiator = !gpio_get(DIP_INITIATOR); // Read fallback value
  267. }
  268. else
  269. {
  270. g_scsi_initiator = (SETUP_TRUE == dip_state);
  271. termination = !gpio_get(DIP_TERM);
  272. }
  273. // dbglog DIP switch works in any case, as it does not have bus hold.
  274. dbglog = !gpio_get(DIP_DBGLOG);
  275. g_log_debug = dbglog;
  276. # endif
  277. #else
  278. delay(10);
  279. #endif // HAS_DIP_SWITCHES
  280. #ifndef DISABLE_SWO
  281. /* Initialize logging to SWO pin (UART0) */
  282. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  283. uart_init(uart0, 1000000);
  284. g_uart_initialized = true;
  285. #endif // DISABLE_SWO
  286. logmsg("Platform: ", g_platform_name);
  287. logmsg("FW Version: ", g_log_firmwareversion);
  288. #ifdef HAS_DIP_SWITCHES
  289. if (working_dip)
  290. {
  291. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  292. g_log_debug = dbglog;
  293. if (termination)
  294. {
  295. logmsg("SCSI termination is enabled");
  296. }
  297. else
  298. {
  299. logmsg("NOTE: SCSI termination is disabled");
  300. }
  301. }
  302. else
  303. {
  304. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  305. #if defined(ZULUSCSI_PICO) || defined(ZULUSCSI_PICO_2)
  306. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in zuluscsi.ini");
  307. logmsg("-- DEBUG DIP switch setting is ignored on ZuluSCSI Pico FS Rev. 2023b and 2023c boards");
  308. g_log_debug = false;
  309. #endif
  310. }
  311. #else
  312. g_log_debug = false;
  313. logmsg ("SCSI termination is handled by a hardware jumper");
  314. #endif // HAS_DIP_SWITCHES
  315. #ifdef ENABLE_AUDIO_OUTPUT
  316. logmsg("SP/DIF audio to expansion header enabled");
  317. if (platform_reclock(SPEED_GRADE_AUDIO) == ZULUSCSI_RECLOCK_SUCCESS)
  318. {
  319. logmsg("Reclocked for Audio Ouput at ", (int) platform_sys_clock_in_hz(), "Hz");
  320. }
  321. else
  322. {
  323. logmsg("Audio Output timings not found");
  324. }
  325. #endif // ENABLE_AUDIO_OUTPUT
  326. // Get flash chip size
  327. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  328. uint8_t response_jedec[4] = {0};
  329. uint32_t saved_irq = save_and_disable_interrupts();
  330. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  331. restore_interrupts(saved_irq);
  332. g_flash_chip_size = (1 << response_jedec[3]);
  333. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  334. // SD card pins
  335. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  336. // pin function pup pdown out state fast
  337. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  338. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  339. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  340. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  341. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  342. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  343. // LED pin
  344. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  345. #ifndef ENABLE_AUDIO_OUTPUT
  346. #ifdef GPIO_I2C_SDA
  347. // I2C pins
  348. // pin function pup pdown out state fast
  349. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  350. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  351. #endif // GPIO_I2C_SDA
  352. #else
  353. // pin function pup pdown out state fast
  354. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  355. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  356. // configuration of corresponding SPI unit occurs in audio_setup()
  357. #endif // ENABLE_AUDIO_OUTPUT
  358. #ifdef GPIO_USB_POWER
  359. gpio_conf(GPIO_USB_POWER, GPIO_FUNC_SIO, false, false, false, false, false);
  360. #endif
  361. }
  362. // late_init() only runs in main application, SCSI not needed in bootloader
  363. void platform_late_init()
  364. {
  365. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  366. if (g_scsi_initiator == true)
  367. {
  368. logmsg("SCSI initiator mode selected by DIP switch, expecting SCSI disks on the bus");
  369. }
  370. else
  371. {
  372. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  373. }
  374. #else
  375. g_scsi_initiator = false;
  376. logmsg("SCSI target/disk mode, acting as a SCSI disk");
  377. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  378. /* Initialize SCSI pins to required modes.
  379. * SCSI pins should be inactive / input at this point.
  380. */
  381. // SCSI data bus direction is switched by DATA_DIR signal.
  382. // Pullups make sure that no glitches occur when switching direction.
  383. // pin function pup pdown out state fast
  384. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  385. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  386. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  387. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  388. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  389. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  390. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  391. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  392. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  393. if (!g_scsi_initiator)
  394. {
  395. // Act as SCSI device / target
  396. // SCSI control outputs
  397. // pin function pup pdown out state fast
  398. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  399. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  400. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  401. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  402. // Shared pins are changed to input / output depending on communication phase
  403. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  404. if (SCSI_OUT_CD != SCSI_IN_SEL)
  405. {
  406. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  407. }
  408. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  409. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  410. {
  411. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  412. }
  413. // SCSI control inputs
  414. // pin function pup pdown out state fast
  415. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  416. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  417. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  418. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  419. Serial.begin();
  420. #endif
  421. #ifdef ENABLE_AUDIO_OUTPUT
  422. // one-time control setup for DMA channels and second core
  423. audio_setup();
  424. #endif // ENABLE_AUDIO_OUTPUT
  425. }
  426. else
  427. {
  428. #ifndef PLATFORM_HAS_INITIATOR_MODE
  429. assert(false);
  430. #else
  431. // Act as SCSI initiator
  432. // pin function pup pdown out state fast
  433. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  434. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  435. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  436. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  437. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  438. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  439. // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST.
  440. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true);
  441. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  442. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true);
  443. gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true);
  444. #endif // PLATFORM_HAS_INITIATOR_MODE
  445. }
  446. scsi_accel_rp2040_init();
  447. }
  448. void platform_post_sd_card_init() {}
  449. bool platform_is_initiator_mode_enabled()
  450. {
  451. return g_scsi_initiator;
  452. }
  453. void platform_write_led(bool state)
  454. {
  455. if (g_led_blinking) return;
  456. gpio_put(LED_PIN, state);
  457. }
  458. void platform_set_blink_status(bool status)
  459. {
  460. g_led_blinking = status;
  461. }
  462. void platform_write_led_override(bool state)
  463. {
  464. gpio_put(LED_PIN, state);
  465. }
  466. void platform_disable_led(void)
  467. {
  468. // pin function pup pdown out state fast
  469. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  470. logmsg("Disabling status LED");
  471. }
  472. /*****************************************/
  473. /* Crash handlers */
  474. /*****************************************/
  475. extern SdFs SD;
  476. extern uint32_t __StackTop;
  477. void platform_emergency_log_save()
  478. {
  479. if (g_rawdrive_active)
  480. return;
  481. platform_set_sd_callback(NULL, NULL);
  482. SD.begin(SD_CONFIG_CRASH);
  483. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  484. if (!crashfile.isOpen())
  485. {
  486. // Try to reinitialize
  487. int max_retry = 10;
  488. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  489. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  490. }
  491. uint32_t startpos = 0;
  492. crashfile.write(log_get_buffer(&startpos));
  493. crashfile.write(log_get_buffer(&startpos));
  494. crashfile.flush();
  495. crashfile.close();
  496. }
  497. static void usb_log_poll();
  498. static void usb_input_poll();
  499. __attribute__((noinline))
  500. void show_hardfault(uint32_t *sp)
  501. {
  502. uint32_t pc = sp[6];
  503. uint32_t lr = sp[5];
  504. logmsg("--------------");
  505. logmsg("CRASH!");
  506. logmsg("Platform: ", g_platform_name);
  507. logmsg("FW Version: ", g_log_firmwareversion);
  508. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  509. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  510. logmsg("SP: ", (uint32_t)sp);
  511. logmsg("PC: ", pc);
  512. logmsg("LR: ", lr);
  513. logmsg("R0: ", sp[0]);
  514. logmsg("R1: ", sp[1]);
  515. logmsg("R2: ", sp[2]);
  516. logmsg("R3: ", sp[3]);
  517. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  518. for (int i = 0; i < 8; i++)
  519. {
  520. if (p == &__StackTop) break; // End of stack
  521. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  522. p += 4;
  523. }
  524. platform_emergency_log_save();
  525. while (1)
  526. {
  527. usb_log_poll();
  528. // Flash the crash address on the LED
  529. // Short pulse means 0, long pulse means 1
  530. int base_delay = 500;
  531. for (int i = 31; i >= 0; i--)
  532. {
  533. LED_OFF();
  534. for (int j = 0; j < base_delay; j++) busy_wait_ms(1);
  535. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  536. LED_ON();
  537. for (int j = 0; j < delay; j++) busy_wait_ms(1);
  538. LED_OFF();
  539. }
  540. for (int j = 0; j < base_delay * 10; j++) busy_wait_ms(1);
  541. }
  542. }
  543. __attribute__((naked, interrupt))
  544. void isr_hardfault(void)
  545. {
  546. // Copies stack pointer into first argument
  547. asm("mrs r0, msp\n"
  548. "bl show_hardfault": : : "r0");
  549. }
  550. /*****************************************/
  551. /* Debug logging and watchdog */
  552. /*****************************************/
  553. // Send log data to USB UART if USB is connected.
  554. // Data is retrieved from the shared log ring buffer and
  555. // this function sends as much as fits in USB CDC buffer.
  556. //
  557. // This is normally called by platform_reset_watchdog() in
  558. // the normal polling loop. If code hangs, the watchdog_callback()
  559. // also starts calling this after 2 seconds.
  560. // This ensures that log messages get passed even if code hangs,
  561. // but does not unnecessarily delay normal execution.
  562. static void usb_log_poll()
  563. {
  564. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  565. static uint32_t logpos = 0;
  566. #ifdef PLATFORM_MASS_STORAGE
  567. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  568. #endif
  569. if (Serial.availableForWrite())
  570. {
  571. // Retrieve pointer to log start and determine number of bytes available.
  572. uint32_t available = 0;
  573. const char *data = log_get_buffer(&logpos, &available);
  574. // Limit to CDC packet size
  575. uint32_t len = available;
  576. if (len == 0) return;
  577. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  578. // Update log position by the actual number of bytes sent
  579. // If USB CDC buffer is full, this may be 0
  580. uint32_t actual = 0;
  581. actual = Serial.write(data, len);
  582. logpos -= available - actual;
  583. }
  584. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  585. }
  586. // Grab input from USB Serial terminal
  587. static void usb_input_poll()
  588. {
  589. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  590. #ifdef PLATFORM_MASS_STORAGE
  591. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  592. #endif
  593. // Caputure reboot key sequence
  594. static bool mass_storage_reboot_keyed = false;
  595. static bool basic_reboot_keyed = false;
  596. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  597. int32_t available = Serial.available();
  598. if(available > 0)
  599. {
  600. int32_t read = Serial.read();
  601. switch((char) read)
  602. {
  603. case 'R':
  604. case 'r':
  605. basic_reboot_keyed = true;
  606. mass_storage_reboot_keyed = false;
  607. logmsg("Basic reboot requested, press 'y' to engage or any key to clear");
  608. break;
  609. case 'M':
  610. case 'm':
  611. mass_storage_reboot_keyed = true;
  612. basic_reboot_keyed = false;
  613. logmsg("Boot into mass storage requested, press 'y' to engage or any key to clear");
  614. *scratch0 = REBOOT_INTO_MASS_STORAGE_MAGIC_NUM;
  615. break;
  616. case 'Y':
  617. case 'y':
  618. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  619. {
  620. logmsg("Rebooting", mass_storage_reboot_keyed ? " into mass storage": "");
  621. watchdog_reboot(0, 0, 2000);
  622. }
  623. break;
  624. case '\n':
  625. break;
  626. default:
  627. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  628. logmsg("Cleared reboot setting");
  629. mass_storage_reboot_keyed = false;
  630. basic_reboot_keyed = false;
  631. }
  632. }
  633. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  634. }
  635. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  636. // This works by sampling the temperature sensor channel, which has
  637. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  638. static void adc_poll()
  639. {
  640. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  641. static bool initialized = false;
  642. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  643. if (!initialized)
  644. {
  645. adc_init();
  646. adc_set_temp_sensor_enabled(true);
  647. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  648. adc_select_input(4);
  649. adc_fifo_setup(true, false, 0, false, false);
  650. adc_run(true);
  651. initialized = true;
  652. }
  653. #ifdef ENABLE_AUDIO_OUTPUT
  654. /*
  655. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  656. * at the same time a SPI DMA write begins, it appears that the first
  657. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  658. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  659. * is playing.
  660. */
  661. if (audio_is_active()) return;
  662. #endif // ENABLE_AUDIO_OUTPUT
  663. int adc_value_max = 0;
  664. while (!adc_fifo_is_empty())
  665. {
  666. int adc_value = adc_fifo_get();
  667. if (adc_value > adc_value_max) adc_value_max = adc_value;
  668. }
  669. // adc_value = 700mV * 4096 / Vdd
  670. // => Vdd = 700mV * 4096 / adc_value
  671. // To avoid wasting time on division, compare against
  672. // limit directly.
  673. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  674. if (adc_value_max > limit)
  675. {
  676. // Warn once, and then again if we detect even a lower drop.
  677. int vdd_mV = (700 * 4096) / adc_value_max;
  678. if (vdd_mV < lowest_vdd_seen)
  679. {
  680. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  681. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  682. }
  683. }
  684. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  685. }
  686. // This function is called for every log message.
  687. void platform_log(const char *s)
  688. {
  689. if (g_uart_initialized)
  690. {
  691. uart_puts(uart0, s);
  692. }
  693. }
  694. static int g_watchdog_timeout;
  695. static bool g_watchdog_initialized;
  696. static void watchdog_callback(unsigned alarm_num)
  697. {
  698. g_watchdog_timeout -= 1000;
  699. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  700. {
  701. // Been stuck for at least a second, start dumping USB log
  702. usb_log_poll();
  703. }
  704. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  705. {
  706. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  707. {
  708. logmsg("--------------");
  709. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  710. logmsg("Platform: ", g_platform_name);
  711. logmsg("FW Version: ", g_log_firmwareversion);
  712. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  713. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  714. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  715. scsi_accel_log_state();
  716. uint32_t msp;
  717. asm volatile ("MRS %0, msp" : "=r" (msp) );
  718. uint32_t *p = (uint32_t*)msp;
  719. for (int i = 0; i < 8; i++)
  720. {
  721. if (p == &__StackTop) break; // End of stack
  722. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  723. p += 4;
  724. }
  725. scsiDev.resetFlag = 1;
  726. g_scsiHostPhyReset = true;
  727. }
  728. if (g_watchdog_timeout <= 0)
  729. {
  730. logmsg("--------------");
  731. logmsg("WATCHDOG TIMEOUT, already attempted bus reset, rebooting");
  732. logmsg("Platform: ", g_platform_name);
  733. logmsg("FW Version: ", g_log_firmwareversion);
  734. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  735. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  736. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  737. uint32_t msp;
  738. asm volatile ("MRS %0, msp" : "=r" (msp) );
  739. uint32_t *p = (uint32_t*)msp;
  740. for (int i = 0; i < 8; i++)
  741. {
  742. if (p == &__StackTop) break; // End of stack
  743. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  744. p += 4;
  745. }
  746. usb_log_poll();
  747. platform_emergency_log_save();
  748. platform_boot_to_main_firmware();
  749. }
  750. }
  751. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  752. }
  753. // This function can be used to periodically reset watchdog timer for crash handling.
  754. // It can also be left empty if the platform does not use a watchdog timer.
  755. void platform_reset_watchdog()
  756. {
  757. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  758. if (!g_watchdog_initialized)
  759. {
  760. int alarm_num = -1;
  761. for (int i = 0; i < NUM_GENERIC_TIMERS; i++)
  762. {
  763. if (!hardware_alarm_is_claimed(i))
  764. {
  765. alarm_num = i;
  766. break;
  767. }
  768. }
  769. if (alarm_num == -1)
  770. {
  771. logmsg("No free watchdog hardware alarms to claim");
  772. return;
  773. }
  774. hardware_alarm_claim(alarm_num);
  775. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  776. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  777. g_watchdog_initialized = true;
  778. }
  779. // USB log is polled here also to make sure any log messages in fault states
  780. // get passed to USB.
  781. usb_log_poll();
  782. }
  783. // Poll function that is called every few milliseconds.
  784. // Can be left empty or used for platform-specific processing.
  785. void platform_poll()
  786. {
  787. usb_input_poll();
  788. usb_log_poll();
  789. adc_poll();
  790. #ifdef ENABLE_AUDIO_OUTPUT
  791. audio_poll();
  792. #endif // ENABLE_AUDIO_OUTPUT
  793. }
  794. void platform_reset_mcu()
  795. {
  796. watchdog_reboot(0, 0, 2000);
  797. }
  798. uint8_t platform_get_buttons()
  799. {
  800. uint8_t buttons = 0;
  801. #if defined(ENABLE_AUDIO_OUTPUT)
  802. // pulled to VCC via resistor, sinking when pressed
  803. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  804. #elif defined(GPIO_I2C_SDA)
  805. // SDA = button 1, SCL = button 2
  806. if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  807. if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  808. #endif // defined(ENABLE_AUDIO_OUTPUT)
  809. // Simple debouncing logic: handle button releases after 100 ms delay.
  810. static uint32_t debounce;
  811. static uint8_t buttons_debounced = 0;
  812. if (buttons != 0)
  813. {
  814. buttons_debounced = buttons;
  815. debounce = millis();
  816. }
  817. else if ((uint32_t)(millis() - debounce) > 100)
  818. {
  819. buttons_debounced = 0;
  820. }
  821. return buttons_debounced;
  822. }
  823. /************************************/
  824. /* ROM drive in extra flash space */
  825. /************************************/
  826. #ifdef PLATFORM_HAS_ROM_DRIVE
  827. # ifndef ROMDRIVE_OFFSET
  828. // Reserve up to 352 kB for firmware by default.
  829. #define ROMDRIVE_OFFSET (352 * 1024)
  830. # endif
  831. uint32_t platform_get_romdrive_maxsize()
  832. {
  833. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  834. {
  835. return g_flash_chip_size - ROMDRIVE_OFFSET;
  836. }
  837. else
  838. {
  839. // Failed to read flash chip size, default to 2 MB
  840. return 2048 * 1024 - ROMDRIVE_OFFSET;
  841. }
  842. }
  843. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  844. {
  845. xip_ctrl_hw->stream_ctr = 0;
  846. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  847. {
  848. (void) xip_ctrl_hw->stream_fifo;
  849. }
  850. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  851. xip_ctrl_hw->stream_ctr = count / 4;
  852. // Transfer happens in multiples of 4 bytes
  853. assert(start < platform_get_romdrive_maxsize());
  854. assert((count & 3) == 0);
  855. assert((((uint32_t)dest) & 3) == 0);
  856. uint32_t *dest32 = (uint32_t*)dest;
  857. uint32_t words_remain = count / 4;
  858. while (words_remain > 0)
  859. {
  860. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  861. {
  862. *dest32++ = xip_ctrl_hw->stream_fifo;
  863. words_remain--;
  864. }
  865. }
  866. return true;
  867. }
  868. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  869. {
  870. assert(start < platform_get_romdrive_maxsize());
  871. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  872. uint32_t saved_irq = save_and_disable_interrupts();
  873. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  874. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  875. restore_interrupts(saved_irq);
  876. return true;
  877. }
  878. #endif // PLATFORM_HAS_ROM_DRIVE
  879. /**********************************************/
  880. /* Mapping from data bytes to GPIO BOP values */
  881. /**********************************************/
  882. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  883. * For RP2040 we expect that the bits are consecutive and in order.
  884. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  885. * The parity table is placed into SRAM4 area to reduce bus contention.
  886. */
  887. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  888. #define X(n) (\
  889. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  890. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  891. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  892. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  893. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  894. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  895. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  896. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  897. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  898. )
  899. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  900. {
  901. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  902. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  903. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  904. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  905. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  906. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  907. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  908. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  909. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  910. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  911. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  912. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  913. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  914. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  915. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  916. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  917. };
  918. #undef X
  919. /* Similarly, another lookup table is used to verify parity of received data.
  920. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  921. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  922. */
  923. #define X(n) (\
  924. ((n & 0xFF) ^ 0xFF) | \
  925. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  926. )
  927. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  928. {
  929. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  930. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  931. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  932. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  933. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  934. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  935. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  936. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  937. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  938. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  939. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  940. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  941. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  942. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  943. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  944. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  945. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  946. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  947. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  948. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  949. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  950. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  951. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  952. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  953. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  954. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  955. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  956. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  957. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  958. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  959. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  960. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  961. };
  962. #undef X
  963. } /* extern "C" */