usb_conf.h 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192
  1. /*!
  2. \file usb_conf.h
  3. \brief USB core driver basic configuration
  4. \version 2020-08-01, V3.0.0, firmware for GD32F4xx
  5. \version 2022-03-09, V3.1.0, firmware for GD32F4xx
  6. \version 2022-06-30, V3.2.0, firmware for GD32F4xx
  7. */
  8. /*
  9. Copyright (c) 2022, GigaDevice Semiconductor Inc.
  10. Redistribution and use in source and binary forms, with or without modification,
  11. are permitted provided that the following conditions are met:
  12. 1. Redistributions of source code must retain the above copyright notice, this
  13. list of conditions and the following disclaimer.
  14. 2. Redistributions in binary form must reproduce the above copyright notice,
  15. this list of conditions and the following disclaimer in the documentation
  16. and/or other materials provided with the distribution.
  17. 3. Neither the name of the copyright holder nor the names of its contributors
  18. may be used to endorse or promote products derived from this software without
  19. specific prior written permission.
  20. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  22. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  24. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  26. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  29. OF SUCH DAMAGE.
  30. */
  31. #ifndef __USB_CONF_H
  32. #define __USB_CONF_H
  33. #include <stdlib.h>
  34. #include "gd32f4xx.h"
  35. /* USB Core and PHY interface configuration */
  36. /****************** USB FS PHY CONFIGURATION *******************************
  37. * The USB FS Core supports one on-chip Full Speed PHY.
  38. * The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
  39. * when FS core is used.
  40. *******************************************************************************/
  41. #define USE_USB_HS
  42. #define USE_ULPI_PHY
  43. #ifdef USE_USB_FS
  44. #define USB_FS_CORE
  45. #endif /* USE_USB_FS */
  46. #ifdef USE_USB_HS
  47. #define USB_HS_CORE
  48. #endif /* USE_USB_HS */
  49. /*******************************************************************************
  50. * FIFO Size Configuration in Device mode
  51. *
  52. * (i) Receive data FIFO size = RAM for setup packets +
  53. * OUT endpoint control information +
  54. * data OUT packets + miscellaneous
  55. * Space = ONE 32-bits words
  56. * --> RAM for setup packets = 10 spaces
  57. * (n is the nbr of CTRL EPs the device core supports)
  58. * --> OUT EP CTRL info = 1 space
  59. * (one space for status information written to the FIFO along with each
  60. * received packet)
  61. * --> Data OUT packets = (Largest Packet Size / 4) + 1 spaces
  62. * (MINIMUM to receive packets)
  63. * --> OR data OUT packets = at least 2* (Largest Packet Size / 4) + 1 spaces
  64. * (if high-bandwidth EP is enabled or multiple isochronous EPs)
  65. * --> Miscellaneous = 1 space per OUT EP
  66. * (one space for transfer complete status information also pushed to the
  67. * FIFO with each endpoint's last packet)
  68. *
  69. * (ii) MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
  70. * that particular IN EP. More space allocated in the IN EP Tx FIFO results
  71. * in a better performance on the USB and can hide latencies on the AHB.
  72. *
  73. * (iii) TXn min size = 16 words. (n:Transmit FIFO index)
  74. *
  75. * (iv) When a TxFIFO is not used, the Configuration should be as follows:
  76. * case 1: n > m and Txn is not used (n,m:Transmit FIFO indexes)
  77. * --> Txm can use the space allocated for Txn.
  78. * case 2: n < m and Txn is not used (n,m:Transmit FIFO indexes)
  79. * --> Txn should be configured with the minimum space of 16 words
  80. *
  81. * (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
  82. * of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
  83. *
  84. * (vi) In HS case12 FIFO locations should be reserved for internal DMA registers
  85. * so total FIFO size should be 1012 Only instead of 1024
  86. *******************************************************************************/
  87. #ifdef USB_FS_CORE
  88. #define RX_FIFO_FS_SIZE 128
  89. #define TX0_FIFO_FS_SIZE 64
  90. #define TX1_FIFO_FS_SIZE 64
  91. #define TX2_FIFO_FS_SIZE 64
  92. #define TX3_FIFO_FS_SIZE 0
  93. #define USBFS_SOF_OUTPUT 0
  94. #define USBFS_LOW_POWER 0
  95. #endif /* USB_FS_CORE */
  96. #ifdef USB_HS_CORE
  97. #define RX_FIFO_HS_SIZE 512
  98. #define TX0_FIFO_HS_SIZE 128
  99. #define TX1_FIFO_HS_SIZE 128
  100. #define TX2_FIFO_HS_SIZE 128
  101. #define TX3_FIFO_HS_SIZE 0
  102. #define TX4_FIFO_HS_SIZE 0
  103. #define TX5_FIFO_HS_SIZE 0
  104. #ifdef USE_ULPI_PHY
  105. #define USB_ULPI_PHY_ENABLED
  106. #endif
  107. #ifdef USE_EMBEDDED_PHY
  108. #define USB_EMBEDDED_PHY_ENABLED
  109. #endif
  110. #define USB_HS_INTERNAL_DMA_ENABLED
  111. // #define USB_HS_DEDICATED_EP1_ENABLED
  112. #define USB_SOF_OUTPUT 0
  113. #define USB_LOW_POWER 0
  114. #endif /* USB_HS_CORE */
  115. //#define VBUS_SENSING_ENABLED
  116. //#define USE_HOST_MODE
  117. #define USE_DEVICE_MODE
  118. //#define USE_OTG_MODE
  119. #ifndef USB_FS_CORE
  120. #ifndef USB_HS_CORE
  121. #error "USB_HS_CORE or USB_FS_CORE should be defined!"
  122. #endif
  123. #endif
  124. #ifndef USE_DEVICE_MODE
  125. #ifndef USE_HOST_MODE
  126. #error "USE_DEVICE_MODE or USE_HOST_MODE should be defined!"
  127. #endif
  128. #endif
  129. #ifndef USE_USB_HS
  130. #ifndef USE_USB_FS
  131. #error "USE_USB_HS or USE_USB_FS should be defined!"
  132. #endif
  133. #endif
  134. /* In HS mode and when the DMA is used, all variables and data structures dealing
  135. with the DMA during the transaction process should be 4-bytes aligned */
  136. #ifdef USB_HS_INTERNAL_DMA_ENABLED
  137. #if defined (__GNUC__) /* GNU Compiler */
  138. #define __ALIGN_END __attribute__ ((aligned (4)))
  139. #define __ALIGN_BEGIN
  140. #else
  141. #define __ALIGN_END
  142. #if defined (__CC_ARM) /* ARM Compiler */
  143. #define __ALIGN_BEGIN __align(4)
  144. #elif defined (__ICCARM__) /* IAR Compiler */
  145. #define __ALIGN_BEGIN
  146. #elif defined (__TASKING__)/* TASKING Compiler */
  147. #define __ALIGN_BEGIN __align(4)
  148. #endif /* __CC_ARM */
  149. #endif /* __GNUC__ */
  150. #else
  151. #define __ALIGN_BEGIN
  152. #define __ALIGN_END
  153. #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
  154. /* __packed keyword used to decrease the data type alignment to 1-byte */
  155. #if defined (__GNUC__) /* GNU Compiler */
  156. #ifndef __packed
  157. #define __packed __attribute__ ((__packed__))
  158. #endif
  159. #elif defined (__TASKING__) /* TASKING Compiler */
  160. #define __packed __unaligned
  161. #endif /* __CC_ARM */
  162. #endif /* __USB_CONF_H */