BlueSCSI_platform.cpp 49 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022-2025 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "BlueSCSI_platform.h"
  22. #include "BlueSCSI_log.h"
  23. #include <SdFat.h>
  24. #include <sdio.h>
  25. #include <scsi.h>
  26. #include <assert.h>
  27. #include <hardware/gpio.h>
  28. #include <hardware/pio.h>
  29. #include <hardware/uart.h>
  30. #include <hardware/pll.h>
  31. #include <hardware/clocks.h>
  32. #include <hardware/spi.h>
  33. #include <hardware/adc.h>
  34. #include <hardware/flash.h>
  35. #include <hardware/structs/xip_ctrl.h>
  36. #include <hardware/structs/usb.h>
  37. #include <hardware/sync.h>
  38. #include "scsi_accel_target.h"
  39. #include "custom_timings.h"
  40. #include <BlueSCSI_settings.h>
  41. #include <minIni.h>
  42. #ifdef SD_USE_RP2350_SDIO
  43. #include <sdio_rp2350.h>
  44. #else
  45. #include <sdio.h>
  46. #endif
  47. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  48. # include <SerialUSB.h>
  49. # include <class/cdc/cdc_device.h>
  50. #endif
  51. #include <pico/multicore.h>
  52. // Definitions of Global PIN definitions that may change depending on hardware rev
  53. uint32_t SCSI_ACCEL_PINMASK = SCSI_ACCEL_SETPINS;
  54. uint8_t SCSI_OUT_REQ = SCSI_OUT_REQ_CURRENT;
  55. uint8_t SCSI_OUT_SEL = SCSI_OUT_SEL_CURRENT;
  56. #ifdef BLUESCSI_NETWORK
  57. extern "C" {
  58. # include <pico/cyw43_arch.h>
  59. }
  60. # ifdef BLUESCSI_RM2
  61. # include <pico/cyw43_driver.h>
  62. # endif
  63. #endif // BLUESCSI_NETWORK
  64. #ifdef PLATFORM_MASS_STORAGE
  65. #include "BlueSCSI_platform_msc.h"
  66. #endif
  67. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  68. # include "audio_spdif.h"
  69. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  70. # include "audio_i2s.h"
  71. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  72. extern bool g_rawdrive_active;
  73. extern "C" {
  74. #include "timings_RP2MCU.h"
  75. const char *g_platform_name = PLATFORM_NAME;
  76. static bool g_scsi_initiator = false;
  77. static bool g_supports_initiator = false;
  78. static uint32_t g_flash_chip_size = 0;
  79. static bool g_uart_initialized = false;
  80. static bool g_led_blinking = false;
  81. static void usb_log_poll();
  82. /***************/
  83. /* GPIO init */
  84. /***************/
  85. // Helper function to configure whole GPIO in one line
  86. static void gpio_conf(uint gpio, gpio_function_t fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  87. {
  88. gpio_put(gpio, initial_state);
  89. gpio_set_dir(gpio, output);
  90. gpio_set_pulls(gpio, pullup, pulldown);
  91. gpio_set_function(gpio, fn);
  92. if (fast_slew)
  93. {
  94. pads_bank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  95. }
  96. }
  97. static void reclock() {
  98. // ensure UART is fully drained before we mess up its clock
  99. if (uart_is_enabled(uart0))
  100. uart_tx_wait_blocking(uart0);
  101. // switch clk_sys and clk_peri to pll_usb
  102. // see code in 2.15.6.1 of the datasheet for useful comments
  103. clock_configure(clk_sys,
  104. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  105. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  106. 48 * MHZ,
  107. 48 * MHZ);
  108. clock_configure(clk_peri,
  109. 0,
  110. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  111. 48 * MHZ,
  112. 48 * MHZ);
  113. // reset PLL
  114. pll_init(pll_sys,
  115. g_bluescsi_timings->pll.refdiv,
  116. g_bluescsi_timings->pll.vco_freq,
  117. g_bluescsi_timings->pll.post_div1,
  118. g_bluescsi_timings->pll.post_div2);
  119. // switch clocks back to pll_sys
  120. clock_configure(clk_sys,
  121. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  122. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  123. g_bluescsi_timings->clk_hz,
  124. g_bluescsi_timings->clk_hz);
  125. clock_configure(clk_peri,
  126. 0,
  127. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  128. g_bluescsi_timings->clk_hz,
  129. g_bluescsi_timings->clk_hz);
  130. // reset UART for the new clock speed
  131. if (uart_is_enabled(uart0))
  132. uart_init(uart0, 1000000);
  133. }
  134. uint32_t platform_sys_clock_in_hz()
  135. {
  136. return clock_get_hz(clk_sys);
  137. }
  138. bool platform_reclock(bluescsi_speed_grade_t speed_grade)
  139. {
  140. CustomTimings ct;
  141. bool do_reclock = false;
  142. if (speed_grade != SPEED_GRADE_DEFAULT)
  143. {
  144. if (speed_grade == SPEED_GRADE_CUSTOM)
  145. {
  146. if (ct.use_custom_timings())
  147. {
  148. logmsg("Using custom timings found in \"", CUSTOM_TIMINGS_FILE, "\" for reclocking");
  149. ct.set_timings_from_file();
  150. do_reclock = true;
  151. }
  152. else
  153. {
  154. logmsg("Custom timings file, \"", CUSTOM_TIMINGS_FILE, "\" not found or disabled");
  155. }
  156. }
  157. else if (set_timings(speed_grade))
  158. do_reclock = true;
  159. if (do_reclock)
  160. {
  161. #ifdef ENABLE_AUDIO_OUTPUT
  162. if (g_bluescsi_timings->audio.audio_clocked)
  163. logmsg("Reclocking with these settings are compatible with CD audio playback");
  164. else
  165. logmsg("Reclocking with these settings may cause audio playback to be too fast or slow ");
  166. #endif
  167. logmsg("Initial Clock set to ", (int) platform_sys_clock_in_hz() / MHZ, "MHz");
  168. logmsg("Reclocking the MCU to ",(int) g_bluescsi_timings->clk_hz / MHZ, "MHz");
  169. #ifndef SD_USE_RP2350_SDIO
  170. logmsg("Setting the SDIO clock to ", (int)((g_bluescsi_timings->clk_hz / g_bluescsi_timings->sdio.clk_div_pio + (5 * MHZ / 10)) / MHZ) , "MHz");
  171. #endif
  172. usb_log_poll();
  173. reclock();
  174. logmsg("After reclocking, system reports clock set to ", (int) platform_sys_clock_in_hz() / MHZ, "MHz");
  175. }
  176. }
  177. else
  178. dbgmsg("Speed grade is set to default, reclocking skipped");
  179. return do_reclock;
  180. }
  181. bool platform_rebooted_into_mass_storage()
  182. {
  183. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  184. if (*scratch0 == REBOOT_INTO_MASS_STORAGE_MAGIC_NUM)
  185. {
  186. *scratch0 = 0;
  187. return true;
  188. }
  189. return false;
  190. }
  191. #ifdef HAS_DIP_SWITCHES
  192. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  193. static pin_setup_state_t read_setup_ack_pin()
  194. {
  195. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  196. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  197. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  198. *
  199. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  200. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  201. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  202. */
  203. // Strong output high, then pulldown
  204. // pin function pup pdown out state fast
  205. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  206. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  207. delay(1);
  208. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  209. // Strong output low, then pullup
  210. // pin function pup pdown out state fast
  211. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  212. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  213. delay(1);
  214. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  215. if (ack_state1 == ack_state2)
  216. {
  217. // Ok, was able to read the state directly
  218. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  219. }
  220. // Enable OUT_BSY for a short time.
  221. // If in target mode, this will force GPIO_ACK high.
  222. gpio_put(SCSI_OUT_BSY, 0);
  223. delay_100ns();
  224. gpio_put(SCSI_OUT_BSY, 1);
  225. return SETUP_UNDETERMINED;
  226. }
  227. #endif
  228. bool is2023a() {
  229. // Force out low for RP2350 errata
  230. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_SIO, false, false, true, false, true);
  231. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_SIO, false, false, true, false, true);
  232. delay(10);
  233. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, false, false, false, false, true);
  234. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, false, false, false, false, true);
  235. const bool d50_2023_09a = gpio_get(GPIO_I2C_SCL) && gpio_get(GPIO_I2C_SDA);
  236. if (d50_2023_09a) {
  237. logmsg("I2C Supported");
  238. g_supports_initiator = true;
  239. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true, false, false, true, true);
  240. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true, false, false, true, true);
  241. // Use Pico SDK methods
  242. gpio_set_function(GPIO_I2C_SCL, GPIO_FUNC_I2C);
  243. gpio_set_function(GPIO_I2C_SDA, GPIO_FUNC_I2C);
  244. // gpio_pull_up(GPIO_I2C_SCL); // TODO necessary?
  245. // gpio_pull_up(GPIO_I2C_SDA);
  246. } else {
  247. logmsg("I2C Not Supported on this rev of hardware");
  248. /* Check option switch settings */
  249. // Option switches: S1 is iATN, S2 is iACK
  250. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  251. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, false, false, false, false, false);
  252. delay(10); /// Settle time
  253. // Check option switches
  254. [[maybe_unused]] bool optionS1 = !gpio_get(SCSI_IN_ATN);
  255. [[maybe_unused]] bool optionS2 = !gpio_get(SCSI_IN_ACK);
  256. // Reset REQ to the appropriate pin for older hardware
  257. SCSI_OUT_REQ = SCSI_OUT_REQ_PRE09A;
  258. SCSI_ACCEL_PINMASK = SCSI_ACCEL_SETPINS_PRE09A;
  259. SCSI_OUT_SEL = SCSI_OUT_SEL_PRE09A;
  260. // Initialize logging to SWO pin (UART0)
  261. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  262. uart_init(uart0, 115200);
  263. g_uart_initialized = true;
  264. }
  265. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  266. return d50_2023_09a;
  267. }
  268. void platform_init()
  269. {
  270. // Make sure second core is stopped
  271. multicore_reset_core1();
  272. pio_clear_instruction_memory(pio0);
  273. pio_clear_instruction_memory(pio1);
  274. /* First configure the pins that affect external buffer directions.
  275. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  276. */
  277. // pin function pup pdown out state fast
  278. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  279. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  280. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  281. /* Check dip switch settings */
  282. #ifdef HAS_DIP_SWITCHES
  283. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  284. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  285. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  286. delay(10); // 10 ms delay to let pull-ups do their work
  287. bool working_dip = true;
  288. bool dbglog = false;
  289. bool termination = false;
  290. # if defined(BLUESCSI_PICO) || defined(BLUESCSI_PICO_2)
  291. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  292. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  293. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  294. if (working_dip)
  295. {
  296. dbglog = !gpio_get(DIP_DBGLOG);
  297. termination = !gpio_get(DIP_TERM);
  298. }
  299. # elif defined(BLUESCSI_V2_0)
  300. pin_setup_state_t dip_state = read_setup_ack_pin();
  301. if (dip_state == SETUP_UNDETERMINED)
  302. {
  303. // This path is used for the few early RP2040 boards assembled with
  304. // Diodes Incorporated 74LVT245B, which has higher bus hold
  305. // current.
  306. working_dip = false;
  307. g_scsi_initiator = !gpio_get(DIP_INITIATOR); // Read fallback value
  308. }
  309. else
  310. {
  311. g_scsi_initiator = (SETUP_TRUE == dip_state);
  312. termination = !gpio_get(DIP_TERM);
  313. }
  314. // dbglog DIP switch works in any case, as it does not have bus hold.
  315. dbglog = !gpio_get(DIP_DBGLOG);
  316. g_log_debug = dbglog;
  317. # else
  318. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  319. termination = !gpio_get(DIP_TERM);
  320. dbglog = !gpio_get(DIP_DBGLOG);
  321. g_log_debug = dbglog;
  322. # endif
  323. #else
  324. delay(10);
  325. #endif // HAS_DIP_SWITCHES
  326. #ifndef DISABLE_SWO
  327. /* Initialize logging to SWO pin (UART0) */
  328. // gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  329. // uart_init(uart0, 1000000);
  330. // g_uart_initialized = true;
  331. #endif // DISABLE_SWO
  332. logmsg("Platform: ", g_platform_name);
  333. logmsg("FW Version: ", g_log_firmwareversion);
  334. #ifdef HAS_DIP_SWITCHES
  335. if (working_dip)
  336. {
  337. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  338. g_log_debug = dbglog;
  339. if (termination)
  340. {
  341. logmsg("SCSI termination is enabled");
  342. }
  343. else
  344. {
  345. logmsg("NOTE: SCSI termination is disabled");
  346. }
  347. }
  348. else
  349. {
  350. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  351. #if defined(BLUESCSI_PICO) || defined(BLUESCSI_PICO_2)
  352. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in bluescsi.ini");
  353. logmsg("-- DEBUG DIP switch setting is ignored on BlueSCSI Pico FS Rev. 2023b and 2023c boards");
  354. g_log_debug = false;
  355. #endif
  356. }
  357. #else
  358. g_log_debug = false;
  359. //logmsg ("SCSI termination is handled by a hardware jumper");
  360. #endif // HAS_DIP_SWITCHES
  361. // logmsg("===========================================================");
  362. // logmsg(" Powered by Raspberry Pi");
  363. // logmsg(" Raspberry Pi is a trademark of Raspberry Pi Ltd");
  364. // logmsg("===========================================================");
  365. // Get flash chip size
  366. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  367. uint8_t response_jedec[4] = {0};
  368. uint32_t saved_irq = save_and_disable_interrupts();
  369. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  370. restore_interrupts(saved_irq);
  371. g_flash_chip_size = (1 << response_jedec[3]);
  372. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  373. // SD card pins
  374. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  375. // pin function pup pdown out state fast
  376. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  377. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  378. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  379. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  380. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  381. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  382. // LED pin
  383. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  384. #ifndef ENABLE_AUDIO_OUTPUT_SPDIF
  385. #ifdef GPIO_I2C_SDA
  386. // I2C pins
  387. // pin function pup pdown out state fast
  388. // gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  389. // gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  390. #endif // GPIO_I2C_SDA
  391. #else
  392. // pin function pup pdown out state fast
  393. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  394. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  395. // configuration of corresponding SPI unit occurs in audio_setup()
  396. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  397. #ifdef GPIO_USB_POWER
  398. gpio_conf(GPIO_USB_POWER, GPIO_FUNC_SIO, false, false, false, false, false);
  399. #endif
  400. is2023a();
  401. }
  402. void platform_enable_initiator_mode()
  403. {
  404. if (ini_getbool("SCSI", "InitiatorMode", false, CONFIGFILE))
  405. {
  406. logmsg("InitiatorMode true");
  407. if (g_supports_initiator) {
  408. g_scsi_initiator = true;
  409. logmsg("SCSI Initiator Mode");
  410. if (! ini_getbool("SCSI", "InitiatorParity", true, CONFIGFILE))
  411. {
  412. logmsg("Initiator Mode Skipping Parity Check.");
  413. // setInitiatorModeParityCheck(false);
  414. }
  415. } else {
  416. logmsg("SCSI Initiator Mode not supported.");
  417. }
  418. }
  419. }
  420. // late_init() only runs in main application, SCSI not needed in bootloader
  421. void platform_late_init()
  422. {
  423. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  424. if (g_scsi_initiator == true)
  425. {
  426. logmsg("*************************************************************************");
  427. logmsg(" SCSI initiator mode enabled, expecting SCSI disks on the bus ");
  428. logmsg("*************************************************************************");
  429. }
  430. else
  431. {
  432. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  433. }
  434. #else
  435. // Initiator mode detected via ini.
  436. platform_enable_initiator_mode();
  437. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  438. /* Initialize SCSI pins to required modes.
  439. * SCSI pins should be inactive / input at this point.
  440. */
  441. // SCSI data bus direction is switched by DATA_DIR signal.
  442. // Pullups make sure that no glitches occur when switching direction.
  443. // pin function pup pdown out state fast
  444. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  445. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  446. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  447. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  448. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  449. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  450. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  451. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  452. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  453. if (!g_scsi_initiator)
  454. {
  455. // Act as SCSI device / target
  456. // SCSI control outputs
  457. // pin function pup pdown out state fast
  458. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  459. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  460. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  461. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  462. // Shared pins are changed to input / output depending on communication phase
  463. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  464. if (SCSI_OUT_CD != SCSI_IN_SEL)
  465. {
  466. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  467. }
  468. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  469. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  470. {
  471. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  472. }
  473. // SCSI control inputs
  474. // pin function pup pdown out state fast
  475. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  476. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  477. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  478. #ifdef BLUESCSI_RM2
  479. uint rm2_pins[CYW43_PIN_INDEX_WL_COUNT] = {0};
  480. rm2_pins[CYW43_PIN_INDEX_WL_REG_ON] = GPIO_RM2_ON;
  481. rm2_pins[CYW43_PIN_INDEX_WL_DATA_OUT] = GPIO_RM2_DATA;
  482. rm2_pins[CYW43_PIN_INDEX_WL_DATA_IN] = GPIO_RM2_DATA;
  483. rm2_pins[CYW43_PIN_INDEX_WL_HOST_WAKE] = GPIO_RM2_DATA;
  484. rm2_pins[CYW43_PIN_INDEX_WL_CLOCK] = GPIO_RM2_CLK;
  485. rm2_pins[CYW43_PIN_INDEX_WL_CS] = GPIO_RM2_CS;
  486. assert(PICO_OK == cyw43_set_pins_wl(rm2_pins));
  487. if (platform_reclock(SPEED_GRADE_WIFI_RM2))
  488. {
  489. // The iface check turns on the LED on the RM2 early in the init process
  490. // Should tell the user that the RM2 is working
  491. if(platform_network_iface_check())
  492. {
  493. logmsg("RM2 found");
  494. }
  495. else
  496. {
  497. # ifdef BLUESCSI_BLASTER
  498. logmsg("RM2 not found, upclocking");
  499. platform_reclock(SPEED_GRADE_AUDIO_I2S);
  500. # else
  501. logmsg("RM2 not found");
  502. # endif
  503. }
  504. }
  505. else
  506. {
  507. logmsg("WiFi RM2 timings not found");
  508. }
  509. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  510. logmsg("I2S audio to expansion header enabled");
  511. if (!platform_reclock(SPEED_GRADE_AUDIO_I2S))
  512. {
  513. logmsg("Audio output timings not found");
  514. }
  515. #elif defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  516. logmsg("S/PDIF audio to expansion header enabled");
  517. if (platform_reclock(SPEED_GRADE_AUDIO_SPDIF))
  518. {
  519. logmsg("Reclocked for Audio Ouput at ", (int) platform_sys_clock_in_hz(), "Hz");
  520. }
  521. else
  522. {
  523. logmsg("Audio Output timings not found");
  524. }
  525. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  526. // This should turn on the LED for Pico 1/2 W devices early in the init process
  527. // It should help indicate to the user that interface is working and the board is ready for DaynaPORT
  528. #if defined(BLUESCSI_NETWORK) && ! defined(BLUESCSI_RM2)
  529. if (platform_network_supported())
  530. platform_network_iface_check();
  531. #endif
  532. #ifdef ENABLE_AUDIO_OUTPUT
  533. // one-time control setup for DMA channels and second core
  534. audio_setup();
  535. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  536. }
  537. else
  538. {
  539. #ifndef PLATFORM_HAS_INITIATOR_MODE
  540. assert(false);
  541. #else
  542. // Act as SCSI initiator
  543. // pin function pup pdown out state fast
  544. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  545. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  546. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  547. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  548. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  549. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  550. // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST.
  551. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true);
  552. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  553. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true);
  554. gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true);
  555. #endif // PLATFORM_HAS_INITIATOR_MODE
  556. }
  557. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  558. Serial.begin();
  559. #endif
  560. scsi_accel_rp2040_init();
  561. }
  562. void platform_post_sd_card_init() {}
  563. bool platform_is_initiator_mode_enabled()
  564. {
  565. // logmsg("Initiator mode enabled: ", g_scsi_initiator);
  566. return g_scsi_initiator;
  567. }
  568. void platform_write_led(bool state)
  569. {
  570. if (g_led_blinking) return;
  571. if (g_scsi_settings.getSystem()->invertStatusLed)
  572. state = !state;
  573. gpio_put(LED_PIN, state);
  574. }
  575. void platform_set_blink_status(bool status)
  576. {
  577. g_led_blinking = status;
  578. }
  579. void platform_write_led_override(bool state)
  580. {
  581. if (g_scsi_settings.getSystem()->invertStatusLed)
  582. state = !state;
  583. gpio_put(LED_PIN, state);
  584. }
  585. void platform_disable_led(void)
  586. {
  587. // pin function pup pdown out state fast
  588. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  589. logmsg("Disabling status LED");
  590. }
  591. uint8_t platform_no_sd_card_on_init_error_code()
  592. {
  593. return SDIO_ERR_RESPONSE_TIMEOUT;
  594. }
  595. /*****************************************/
  596. /* Crash handlers */
  597. /*****************************************/
  598. extern SdFs SD;
  599. extern uint32_t __StackTop;
  600. void platform_emergency_log_save()
  601. {
  602. if (g_rawdrive_active)
  603. return;
  604. platform_set_sd_callback(NULL, NULL);
  605. SD.begin(SD_CONFIG_CRASH);
  606. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  607. if (!crashfile.isOpen())
  608. {
  609. // Try to reinitialize
  610. int max_retry = 10;
  611. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  612. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  613. }
  614. uint32_t startpos = 0;
  615. crashfile.write(log_get_buffer(&startpos));
  616. crashfile.write(log_get_buffer(&startpos));
  617. crashfile.flush();
  618. crashfile.close();
  619. }
  620. static void usb_log_poll();
  621. static void usb_input_poll();
  622. __attribute__((noinline))
  623. void show_hardfault(uint32_t *sp)
  624. {
  625. uint32_t pc = sp[6];
  626. uint32_t lr = sp[5];
  627. logmsg("--------------");
  628. logmsg("CRASH!");
  629. logmsg("Platform: ", g_platform_name);
  630. logmsg("FW Version: ", g_log_firmwareversion);
  631. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  632. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  633. logmsg("SP: ", (uint32_t)sp);
  634. logmsg("PC: ", pc);
  635. logmsg("LR: ", lr);
  636. logmsg("R0: ", sp[0]);
  637. logmsg("R1: ", sp[1]);
  638. logmsg("R2: ", sp[2]);
  639. logmsg("R3: ", sp[3]);
  640. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  641. for (int i = 0; i < 8; i++)
  642. {
  643. if (p == &__StackTop) break; // End of stack
  644. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  645. p += 4;
  646. }
  647. platform_emergency_log_save();
  648. while (1)
  649. {
  650. usb_log_poll();
  651. // Flash the crash address on the LED
  652. // Short pulse means 0, long pulse means 1
  653. int base_delay = 500;
  654. for (int i = 31; i >= 0; i--)
  655. {
  656. LED_OFF();
  657. for (int j = 0; j < base_delay; j++) busy_wait_ms(1);
  658. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  659. LED_ON();
  660. for (int j = 0; j < delay; j++) busy_wait_ms(1);
  661. LED_OFF();
  662. }
  663. for (int j = 0; j < base_delay * 10; j++) busy_wait_ms(1);
  664. }
  665. }
  666. __attribute__((naked, interrupt))
  667. void isr_hardfault(void)
  668. {
  669. // Copies stack pointer into first argument
  670. asm("mrs r0, msp\n"
  671. "bl show_hardfault": : : "r0");
  672. }
  673. /*****************************************/
  674. /* Debug logging and watchdog */
  675. /*****************************************/
  676. static bool usb_serial_connected()
  677. {
  678. #ifdef PIO_FRAMEWORK_ARDUINO_NO_USB
  679. return false;
  680. #endif
  681. static bool connected;
  682. static uint32_t last_check_time;
  683. #ifdef PLATFORM_MASS_STORAGE
  684. if (platform_msc_lock_get()) return connected; // Avoid re-entrant USB events
  685. #endif
  686. if (last_check_time == 0 || (uint32_t)(millis() - last_check_time) > 50)
  687. {
  688. connected = bool(Serial);
  689. last_check_time = millis();
  690. }
  691. return connected;
  692. }
  693. // Send log data to USB UART if USB is connected.
  694. // Data is retrieved from the shared log ring buffer and
  695. // this function sends as much as fits in USB CDC buffer.
  696. //
  697. // This is normally called by platform_reset_watchdog() in
  698. // the normal polling loop. If code hangs, the watchdog_callback()
  699. // also starts calling this after 2 seconds.
  700. // This ensures that log messages get passed even if code hangs,
  701. // but does not unnecessarily delay normal execution.
  702. static void usb_log_poll()
  703. {
  704. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  705. static uint32_t logpos = 0;
  706. if (!usb_serial_connected()) return;
  707. #ifdef PLATFORM_MASS_STORAGE
  708. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  709. #endif
  710. if (Serial.availableForWrite())
  711. {
  712. // Retrieve pointer to log start and determine number of bytes available.
  713. uint32_t available = 0;
  714. const char *data = log_get_buffer(&logpos, &available);
  715. // Limit to CDC packet size
  716. uint32_t len = available;
  717. if (len == 0) return;
  718. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  719. // Update log position by the actual number of bytes sent
  720. // If USB CDC buffer is full, this may be 0
  721. uint32_t actual = 0;
  722. actual = Serial.write(data, len);
  723. logpos -= available - actual;
  724. }
  725. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  726. }
  727. // Grab input from USB Serial terminal
  728. static void usb_input_poll()
  729. {
  730. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  731. if (!usb_serial_connected()) return;
  732. #ifdef PLATFORM_MASS_STORAGE
  733. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  734. #endif
  735. // Capture reboot key sequence
  736. static bool mass_storage_reboot_keyed = false;
  737. static bool basic_reboot_keyed = false;
  738. static bool uf2_reboot_keyed = false;
  739. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  740. int32_t available = Serial.available();
  741. if(available > 0)
  742. {
  743. int32_t read = Serial.read();
  744. switch((char) read)
  745. {
  746. case 'R':
  747. case 'r':
  748. basic_reboot_keyed = true;
  749. mass_storage_reboot_keyed = uf2_reboot_keyed = false;
  750. logmsg("Basic reboot requested, press 'y' to engage or any key to clear");
  751. break;
  752. case 'M':
  753. case 'm':
  754. mass_storage_reboot_keyed = true;
  755. basic_reboot_keyed = uf2_reboot_keyed = false;
  756. logmsg("Boot into mass storage requested, press 'y' to engage or any key to clear");
  757. *scratch0 = REBOOT_INTO_MASS_STORAGE_MAGIC_NUM;
  758. break;
  759. case 'B':
  760. case 'b':
  761. uf2_reboot_keyed = true;
  762. basic_reboot_keyed = mass_storage_reboot_keyed = false;
  763. logmsg("Boot into uf2 bootloader requested, press 'y' to engage or any key to clear");
  764. break;
  765. case 'd':
  766. case 'D':
  767. g_log_debug = !g_log_debug;
  768. logmsg("Debug logging ", g_log_debug ? "enabled" : "disabled");
  769. break;
  770. case 'Y':
  771. case 'y':
  772. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  773. {
  774. logmsg("Rebooting", mass_storage_reboot_keyed ? " into mass storage": "");
  775. watchdog_reboot(0, 0, 2000);
  776. } else if (uf2_reboot_keyed) {
  777. rom_reset_usb_boot(0, 0);
  778. }
  779. break;
  780. case '\n':
  781. break;
  782. default:
  783. if (basic_reboot_keyed || mass_storage_reboot_keyed || uf2_reboot_keyed)
  784. logmsg("Cleared reboot setting");
  785. mass_storage_reboot_keyed =basic_reboot_keyed = uf2_reboot_keyed = false;
  786. }
  787. }
  788. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  789. }
  790. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  791. // This works by sampling the temperature sensor channel, which has
  792. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  793. static void adc_poll()
  794. {
  795. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  796. static bool initialized = false;
  797. static bool adc_initial_logged = false;
  798. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  799. if (!initialized)
  800. {
  801. adc_init();
  802. adc_set_temp_sensor_enabled(true);
  803. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  804. #ifdef BLUESCSI_BLASTER
  805. adc_select_input(8);
  806. #else
  807. adc_select_input(4);
  808. #endif
  809. adc_fifo_setup(true, false, 0, false, false);
  810. adc_run(true);
  811. initialized = true;
  812. }
  813. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  814. /*
  815. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  816. * at the same time a SPI DMA write begins, it appears that the first
  817. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  818. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  819. * is playing.
  820. */
  821. if (audio_is_active()) return;
  822. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  823. int adc_value_max = 0;
  824. while (!adc_fifo_is_empty())
  825. {
  826. int adc_value = adc_fifo_get();
  827. if (adc_value > adc_value_max) adc_value_max = adc_value;
  828. }
  829. // adc_value = 700mV * 4096 / Vdd
  830. // => Vdd = 700mV * 4096 / adc_value
  831. // To avoid wasting time on division, compare against
  832. // limit directly.
  833. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  834. if (adc_value_max > limit)
  835. {
  836. // Warn once, and then again if we detect even a lower drop.
  837. int vdd_mV = (700 * 4096) / adc_value_max;
  838. if (vdd_mV < lowest_vdd_seen)
  839. {
  840. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  841. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  842. }
  843. }
  844. else if (!adc_initial_logged && adc_value_max != 0)
  845. {
  846. adc_initial_logged = true;
  847. int vdd_mV = (700 * 4096) / adc_value_max;
  848. logmsg("INFO: Pico Voltage: ", (vdd_mV / 1000.0), "V.");
  849. }
  850. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  851. }
  852. // This function is called for every log message.
  853. void platform_log(const char *s)
  854. {
  855. if (g_uart_initialized)
  856. {
  857. uart_puts(uart0, s);
  858. }
  859. }
  860. static int g_watchdog_timeout;
  861. static bool g_watchdog_initialized;
  862. static void watchdog_callback(unsigned alarm_num)
  863. {
  864. g_watchdog_timeout -= 1000;
  865. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  866. {
  867. // Been stuck for at least a second, start dumping USB log
  868. usb_log_poll();
  869. }
  870. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  871. {
  872. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  873. {
  874. logmsg("--------------");
  875. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  876. logmsg("Platform: ", g_platform_name);
  877. logmsg("FW Version: ", g_log_firmwareversion);
  878. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  879. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  880. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  881. scsi_accel_log_state();
  882. uint32_t msp;
  883. asm volatile ("MRS %0, msp" : "=r" (msp) );
  884. uint32_t *p = (uint32_t*)msp;
  885. for (int i = 0; i < 8; i++)
  886. {
  887. if (p == &__StackTop) break; // End of stack
  888. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  889. p += 4;
  890. }
  891. scsiDev.resetFlag = 1;
  892. g_scsiHostPhyReset = true;
  893. }
  894. if (g_watchdog_timeout <= 0)
  895. {
  896. logmsg("--------------");
  897. logmsg("WATCHDOG TIMEOUT, already attempted bus reset, rebooting");
  898. logmsg("Platform: ", g_platform_name);
  899. logmsg("FW Version: ", g_log_firmwareversion);
  900. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  901. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  902. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  903. uint32_t msp;
  904. asm volatile ("MRS %0, msp" : "=r" (msp) );
  905. uint32_t *p = (uint32_t*)msp;
  906. for (int i = 0; i < 8; i++)
  907. {
  908. if (p == &__StackTop) break; // End of stack
  909. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  910. p += 4;
  911. }
  912. usb_log_poll();
  913. platform_emergency_log_save();
  914. platform_boot_to_main_firmware();
  915. }
  916. }
  917. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  918. }
  919. // This function can be used to periodically reset watchdog timer for crash handling.
  920. // It can also be left empty if the platform does not use a watchdog timer.
  921. void platform_reset_watchdog()
  922. {
  923. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  924. if (!g_watchdog_initialized)
  925. {
  926. int alarm_num = -1;
  927. for (int i = 0; i < NUM_GENERIC_TIMERS; i++)
  928. {
  929. if (!hardware_alarm_is_claimed(i))
  930. {
  931. alarm_num = i;
  932. break;
  933. }
  934. }
  935. if (alarm_num == -1)
  936. {
  937. logmsg("No free watchdog hardware alarms to claim");
  938. return;
  939. }
  940. hardware_alarm_claim(alarm_num);
  941. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  942. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  943. g_watchdog_initialized = true;
  944. }
  945. // USB log is polled here also to make sure any log messages in fault states
  946. // get passed to USB.
  947. usb_log_poll();
  948. }
  949. // Poll function that is called every few milliseconds.
  950. // Can be left empty or used for platform-specific processing.
  951. void platform_poll()
  952. {
  953. usb_input_poll();
  954. usb_log_poll();
  955. adc_poll();
  956. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF) || defined(ENABLE_AUDIO_OUTPUT_I2S)
  957. audio_poll();
  958. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  959. }
  960. void platform_reset_mcu()
  961. {
  962. watchdog_reboot(0, 0, 2000);
  963. }
  964. uint8_t platform_get_buttons()
  965. {
  966. uint8_t buttons = 0;
  967. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  968. // pulled to VCC via resistor, sinking when pressed
  969. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  970. #elif defined(GPIO_I2C_SDA)
  971. // SDA = button 1, SCL = button 2
  972. // if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  973. // if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  974. #endif // defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  975. // Simple debouncing logic: handle button releases after 100 ms delay.
  976. static uint32_t debounce;
  977. static uint8_t buttons_debounced = 0;
  978. if (buttons != 0)
  979. {
  980. buttons_debounced = buttons;
  981. debounce = millis();
  982. }
  983. else if ((uint32_t)(millis() - debounce) > 100)
  984. {
  985. buttons_debounced = 0;
  986. }
  987. return buttons_debounced;
  988. }
  989. bool platform_has_phy_eject_button()
  990. {
  991. return false;
  992. }
  993. /************************************/
  994. /* ROM drive in extra flash space */
  995. /************************************/
  996. #ifdef PLATFORM_HAS_ROM_DRIVE
  997. # ifndef ROMDRIVE_OFFSET
  998. // Reserve up to 352 kB for firmware by default.
  999. #define ROMDRIVE_OFFSET (352 * 1024)
  1000. # endif
  1001. uint32_t platform_get_romdrive_maxsize()
  1002. {
  1003. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  1004. {
  1005. return g_flash_chip_size - ROMDRIVE_OFFSET;
  1006. }
  1007. else
  1008. {
  1009. // Failed to read flash chip size, default to 2 MB
  1010. return 2048 * 1024 - ROMDRIVE_OFFSET;
  1011. }
  1012. }
  1013. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  1014. {
  1015. xip_ctrl_hw->stream_ctr = 0;
  1016. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  1017. {
  1018. (void) xip_ctrl_hw->stream_fifo;
  1019. }
  1020. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  1021. xip_ctrl_hw->stream_ctr = count / 4;
  1022. // Transfer happens in multiples of 4 bytes
  1023. assert(start < platform_get_romdrive_maxsize());
  1024. assert((count & 3) == 0);
  1025. assert((((uint32_t)dest) & 3) == 0);
  1026. uint32_t *dest32 = (uint32_t*)dest;
  1027. uint32_t words_remain = count / 4;
  1028. while (words_remain > 0)
  1029. {
  1030. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  1031. {
  1032. *dest32++ = xip_ctrl_hw->stream_fifo;
  1033. words_remain--;
  1034. }
  1035. }
  1036. return true;
  1037. }
  1038. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  1039. {
  1040. assert(start < platform_get_romdrive_maxsize());
  1041. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  1042. uint32_t saved_irq = save_and_disable_interrupts();
  1043. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  1044. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  1045. restore_interrupts(saved_irq);
  1046. return true;
  1047. }
  1048. #endif // PLATFORM_HAS_ROM_DRIVE
  1049. /**********************************************/
  1050. /* Mapping from data bytes to GPIO BOP values */
  1051. /**********************************************/
  1052. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  1053. * For RP2040 we expect that the bits are consecutive and in order.
  1054. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  1055. * The parity table is placed into SRAM4 area to reduce bus contention.
  1056. */
  1057. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  1058. #ifdef BLUESCSI_BLASTER
  1059. # define X(n) (\
  1060. ((n & 0x01) ? 0 : (1 << 0)) | \
  1061. ((n & 0x02) ? 0 : (1 << 1)) | \
  1062. ((n & 0x04) ? 0 : (1 << 2)) | \
  1063. ((n & 0x08) ? 0 : (1 << 3)) | \
  1064. ((n & 0x10) ? 0 : (1 << 4)) | \
  1065. ((n & 0x20) ? 0 : (1 << 5)) | \
  1066. ((n & 0x40) ? 0 : (1 << 6)) | \
  1067. ((n & 0x80) ? 0 : (1 << 7)) | \
  1068. (PARITY(n) ? 0 : (1 << 8)) \
  1069. )
  1070. #else
  1071. # define X(n) (\
  1072. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  1073. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  1074. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  1075. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  1076. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  1077. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  1078. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  1079. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  1080. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  1081. )
  1082. #endif
  1083. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  1084. {
  1085. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  1086. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  1087. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  1088. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  1089. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  1090. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  1091. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  1092. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  1093. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  1094. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  1095. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  1096. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  1097. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  1098. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  1099. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  1100. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  1101. };
  1102. #undef X
  1103. /* Similarly, another lookup table is used to verify parity of received data.
  1104. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  1105. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  1106. */
  1107. #define X(n) (\
  1108. ((n & 0xFF) ^ 0xFF) | \
  1109. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  1110. )
  1111. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  1112. {
  1113. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  1114. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  1115. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  1116. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  1117. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  1118. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  1119. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  1120. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  1121. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  1122. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  1123. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  1124. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  1125. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  1126. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  1127. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  1128. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  1129. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  1130. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  1131. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  1132. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  1133. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  1134. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  1135. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  1136. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  1137. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  1138. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  1139. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  1140. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  1141. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  1142. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  1143. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  1144. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  1145. };
  1146. #undef X
  1147. } /* extern "C" */
  1148. #ifdef SD_USE_SDIO
  1149. // These functions are not used for SDIO mode but are needed to avoid build error.
  1150. void sdCsInit(SdCsPin_t pin) {}
  1151. void sdCsWrite(SdCsPin_t pin, bool level) {}
  1152. // SDIO configuration for main program
  1153. SdioConfig g_sd_sdio_config(DMA_SDIO);
  1154. #ifdef SD_USE_RP2350_SDIO
  1155. void platform_set_sd_callback(sd_callback_t func, const uint8_t *buffer)
  1156. {
  1157. rp2350_sdio_sdfat_set_callback(func, buffer);
  1158. }
  1159. #endif
  1160. #endif