ZuluSCSI_platform.cpp 39 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version. 
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version. 
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details. 
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "ZuluSCSI_platform.h"
  22. #include "ZuluSCSI_log.h"
  23. #include "ZuluSCSI_config.h"
  24. #include <SdFat.h>
  25. #include <scsi.h>
  26. #include <assert.h>
  27. #include <hardware/gpio.h>
  28. #include <hardware/pio.h>
  29. #include <hardware/uart.h>
  30. #include <hardware/pll.h>
  31. #include <hardware/clocks.h>
  32. #include <hardware/spi.h>
  33. #include <hardware/adc.h>
  34. #include <hardware/flash.h>
  35. #include <hardware/structs/xip_ctrl.h>
  36. #include <hardware/structs/usb.h>
  37. #include "scsi_accel_target.h"
  38. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  39. # include <SerialUSB.h>
  40. # include <class/cdc/cdc_device.h>
  41. #endif
  42. #include <pico/multicore.h>
  43. #ifdef ZULUSCSI_NETWORK
  44. extern "C" {
  45. # include <pico/cyw43_arch.h>
  46. }
  47. #endif // ZULUSCSI_NETWORK
  48. #ifdef ENABLE_AUDIO_OUTPUT
  49. # include "audio.h"
  50. #endif // ENABLE_AUDIO_OUTPUT
  51. extern "C" {
  52. const char *g_platform_name = PLATFORM_NAME;
  53. static bool g_scsi_initiator = false;
  54. static uint32_t g_flash_chip_size = 0;
  55. static bool g_uart_initialized = false;
  56. /***************/
  57. /* GPIO init */
  58. /***************/
  59. // Helper function to configure whole GPIO in one line
  60. static void gpio_conf(uint gpio, enum gpio_function fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  61. {
  62. gpio_put(gpio, initial_state);
  63. gpio_set_dir(gpio, output);
  64. gpio_set_pulls(gpio, pullup, pulldown);
  65. gpio_set_function(gpio, fn);
  66. if (fast_slew)
  67. {
  68. padsbank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  69. }
  70. }
  71. #ifdef ENABLE_AUDIO_OUTPUT
  72. // Increases clk_sys and clk_peri to 135.428571MHz at runtime to support
  73. // division to audio output rates. Invoke before anything is using clk_peri
  74. // except for the logging UART, which is handled below.
  75. static void reclock_for_audio() {
  76. // ensure UART is fully drained before we mess up its clock
  77. uart_tx_wait_blocking(uart0);
  78. // switch clk_sys and clk_peri to pll_usb
  79. // see code in 2.15.6.1 of the datasheet for useful comments
  80. clock_configure(clk_sys,
  81. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  82. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  83. 48 * MHZ,
  84. 48 * MHZ);
  85. clock_configure(clk_peri,
  86. 0,
  87. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  88. 48 * MHZ,
  89. 48 * MHZ);
  90. // reset PLL for 135.428571MHz
  91. pll_init(pll_sys, 1, 948000000, 7, 1);
  92. // switch clocks back to pll_sys
  93. clock_configure(clk_sys,
  94. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  95. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  96. 135428571,
  97. 135428571);
  98. clock_configure(clk_peri,
  99. 0,
  100. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  101. 135428571,
  102. 135428571);
  103. // reset UART for the new clock speed
  104. uart_init(uart0, 1000000);
  105. }
  106. #endif // ENABLE_AUDIO_OUT
  107. #ifdef HAS_DIP_SWITCHES
  108. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  109. static pin_setup_state_t read_setup_ack_pin()
  110. {
  111. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  112. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  113. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  114. *
  115. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  116. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  117. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  118. */
  119. // Strong output high, then pulldown
  120. // pin function pup pdown out state fast
  121. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  122. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  123. delay(1);
  124. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  125. // Strong output low, then pullup
  126. // pin function pup pdown out state fast
  127. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  128. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  129. delay(1);
  130. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  131. if (ack_state1 == ack_state2)
  132. {
  133. // Ok, was able to read the state directly
  134. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  135. }
  136. // Enable OUT_BSY for a short time.
  137. // If in target mode, this will force GPIO_ACK high.
  138. gpio_put(SCSI_OUT_BSY, 0);
  139. delay_100ns();
  140. gpio_put(SCSI_OUT_BSY, 1);
  141. return SETUP_UNDETERMINED;
  142. }
  143. #endif
  144. void platform_init()
  145. {
  146. // Make sure second core is stopped
  147. multicore_reset_core1();
  148. pio_clear_instruction_memory(pio0);
  149. pio_clear_instruction_memory(pio1);
  150. /* First configure the pins that affect external buffer directions.
  151. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  152. */
  153. // pin function pup pdown out state fast
  154. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  155. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  156. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  157. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  158. /* Check dip switch settings */
  159. #ifdef HAS_DIP_SWITCHES
  160. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  161. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  162. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  163. delay(10); // 10 ms delay to let pull-ups do their work
  164. bool working_dip = true;
  165. bool dbglog = false;
  166. bool termination = false;
  167. # ifdef ZULUSCSI_PICO
  168. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  169. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  170. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  171. if (working_dip)
  172. {
  173. dbglog = !gpio_get(DIP_DBGLOG);
  174. termination = !gpio_get(DIP_TERM);
  175. }
  176. # else
  177. g_scsi_initiator = SETUP_TRUE == read_setup_ack_pin();
  178. dbglog = !gpio_get(DIP_DBGLOG);
  179. termination = !gpio_get(DIP_TERM);
  180. # endif
  181. #else
  182. delay(10);
  183. #endif // HAS_DIP_SWITCHES
  184. #ifndef DISABLE_SWO
  185. /* Initialize logging to SWO pin (UART0) */
  186. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  187. uart_init(uart0, 1000000);
  188. g_uart_initialized = true;
  189. #endif // DISABLE_SWO
  190. logmsg("Platform: ", g_platform_name);
  191. logmsg("FW Version: ", g_log_firmwareversion);
  192. #ifdef HAS_DIP_SWITCHES
  193. if (working_dip)
  194. {
  195. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  196. g_log_debug = dbglog;
  197. if (termination)
  198. {
  199. logmsg("SCSI termination is enabled");
  200. }
  201. else
  202. {
  203. logmsg("NOTE: SCSI termination is disabled");
  204. }
  205. }
  206. else
  207. {
  208. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  209. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in zuluscsi.ini");
  210. logmsg("-- DEBUG DIP switch setting is ignored on ZuluSCSI Pico FS Rev. 2023b and 2023c boards");
  211. g_log_debug = false;
  212. }
  213. #else
  214. g_log_debug = false;
  215. logmsg ("SCSI termination is handled by a hardware jumper");
  216. #endif // HAS_DIP_SWITCHES
  217. #ifdef ENABLE_AUDIO_OUTPUT
  218. logmsg("SP/DIF audio to expansion header enabled");
  219. logmsg("-- Overclocking to 135.428571MHz");
  220. reclock_for_audio();
  221. #endif // ENABLE_AUDIO_OUTPUT
  222. // Get flash chip size
  223. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  224. uint8_t response_jedec[4] = {0};
  225. __disable_irq();
  226. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  227. __enable_irq();
  228. g_flash_chip_size = (1 << response_jedec[3]);
  229. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  230. // SD card pins
  231. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  232. // pin function pup pdown out state fast
  233. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  234. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  235. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  236. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  237. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  238. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  239. // LED pin
  240. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  241. #ifndef ENABLE_AUDIO_OUTPUT
  242. #ifdef GPIO_I2C_SDA
  243. // I2C pins
  244. // pin function pup pdown out state fast
  245. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  246. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  247. #endif // GPIO_I2C_SDA
  248. #else
  249. // pin function pup pdown out state fast
  250. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  251. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  252. // configuration of corresponding SPI unit occurs in audio_setup()
  253. #endif // ENABLE_AUDIO_OUTPUT
  254. }
  255. // late_init() only runs in main application, SCSI not needed in bootloader
  256. void platform_late_init()
  257. {
  258. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  259. if (g_scsi_initiator == true)
  260. {
  261. logmsg("SCSI initiator mode selected by DIP switch, expecting SCSI disks on the bus");
  262. }
  263. else
  264. {
  265. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  266. }
  267. #else
  268. g_scsi_initiator = false;
  269. logmsg("SCSI target/disk mode, acting as a SCSI disk");
  270. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  271. /* Initialize SCSI pins to required modes.
  272. * SCSI pins should be inactive / input at this point.
  273. */
  274. // SCSI data bus direction is switched by DATA_DIR signal.
  275. // Pullups make sure that no glitches occur when switching direction.
  276. // pin function pup pdown out state fast
  277. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  278. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  279. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  280. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  281. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  282. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  283. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  284. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  285. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  286. if (!g_scsi_initiator)
  287. {
  288. // Act as SCSI device / target
  289. // SCSI control outputs
  290. // pin function pup pdown out state fast
  291. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  292. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  293. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  294. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  295. // Shared pins are changed to input / output depending on communication phase
  296. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  297. if (SCSI_OUT_CD != SCSI_IN_SEL)
  298. {
  299. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  300. }
  301. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  302. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  303. {
  304. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  305. }
  306. // SCSI control inputs
  307. // pin function pup pdown out state fast
  308. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  309. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  310. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  311. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  312. Serial.begin();
  313. #endif
  314. #ifdef ENABLE_AUDIO_OUTPUT
  315. // one-time control setup for DMA channels and second core
  316. audio_setup();
  317. #endif // ENABLE_AUDIO_OUTPUT
  318. }
  319. else
  320. {
  321. #ifndef PLATFORM_HAS_INITIATOR_MODE
  322. assert(false);
  323. #else
  324. // Act as SCSI initiator
  325. // pin function pup pdown out state fast
  326. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  327. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  328. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  329. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  330. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  331. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  332. // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST.
  333. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true);
  334. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  335. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true);
  336. gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true);
  337. #endif // PLATFORM_HAS_INITIATOR_MODE
  338. }
  339. }
  340. void platform_post_sd_card_init() {}
  341. bool platform_is_initiator_mode_enabled()
  342. {
  343. return g_scsi_initiator;
  344. }
  345. void platform_disable_led(void)
  346. {
  347. // pin function pup pdown out state fast
  348. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  349. logmsg("Disabling status LED");
  350. }
  351. /*****************************************/
  352. /* Crash handlers */
  353. /*****************************************/
  354. extern SdFs SD;
  355. extern uint32_t __StackTop;
  356. void platform_emergency_log_save()
  357. {
  358. platform_set_sd_callback(NULL, NULL);
  359. SD.begin(SD_CONFIG_CRASH);
  360. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  361. if (!crashfile.isOpen())
  362. {
  363. // Try to reinitialize
  364. int max_retry = 10;
  365. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  366. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  367. }
  368. uint32_t startpos = 0;
  369. crashfile.write(log_get_buffer(&startpos));
  370. crashfile.write(log_get_buffer(&startpos));
  371. crashfile.flush();
  372. crashfile.close();
  373. }
  374. static void usb_log_poll();
  375. __attribute__((noinline))
  376. void show_hardfault(uint32_t *sp)
  377. {
  378. uint32_t pc = sp[6];
  379. uint32_t lr = sp[5];
  380. logmsg("--------------");
  381. logmsg("CRASH!");
  382. logmsg("Platform: ", g_platform_name);
  383. logmsg("FW Version: ", g_log_firmwareversion);
  384. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  385. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  386. logmsg("SP: ", (uint32_t)sp);
  387. logmsg("PC: ", pc);
  388. logmsg("LR: ", lr);
  389. logmsg("R0: ", sp[0]);
  390. logmsg("R1: ", sp[1]);
  391. logmsg("R2: ", sp[2]);
  392. logmsg("R3: ", sp[3]);
  393. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  394. for (int i = 0; i < 8; i++)
  395. {
  396. if (p == &__StackTop) break; // End of stack
  397. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  398. p += 4;
  399. }
  400. platform_emergency_log_save();
  401. while (1)
  402. {
  403. usb_log_poll();
  404. // Flash the crash address on the LED
  405. // Short pulse means 0, long pulse means 1
  406. int base_delay = 500;
  407. for (int i = 31; i >= 0; i--)
  408. {
  409. LED_OFF();
  410. for (int j = 0; j < base_delay; j++) busy_wait_ms(1);
  411. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  412. LED_ON();
  413. for (int j = 0; j < delay; j++) busy_wait_ms(1);
  414. LED_OFF();
  415. }
  416. for (int j = 0; j < base_delay * 10; j++) busy_wait_ms(1);
  417. }
  418. }
  419. __attribute__((naked, interrupt))
  420. void isr_hardfault(void)
  421. {
  422. // Copies stack pointer into first argument
  423. asm("mrs r0, msp\n"
  424. "bl show_hardfault": : : "r0");
  425. }
  426. /*****************************************/
  427. /* Debug logging and watchdog */
  428. /*****************************************/
  429. // Send log data to USB UART if USB is connected.
  430. // Data is retrieved from the shared log ring buffer and
  431. // this function sends as much as fits in USB CDC buffer.
  432. //
  433. // This is normally called by platform_reset_watchdog() in
  434. // the normal polling loop. If code hangs, the watchdog_callback()
  435. // also starts calling this after 2 seconds.
  436. // This ensures that log messages get passed even if code hangs,
  437. // but does not unnecessarily delay normal execution.
  438. static void usb_log_poll()
  439. {
  440. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  441. static uint32_t logpos = 0;
  442. if (Serial.availableForWrite())
  443. {
  444. // Retrieve pointer to log start and determine number of bytes available.
  445. uint32_t available = 0;
  446. const char *data = log_get_buffer(&logpos, &available);
  447. // Limit to CDC packet size
  448. uint32_t len = available;
  449. if (len == 0) return;
  450. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  451. // Update log position by the actual number of bytes sent
  452. // If USB CDC buffer is full, this may be 0
  453. uint32_t actual = 0;
  454. actual = Serial.write(data, len);
  455. logpos -= available - actual;
  456. }
  457. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  458. }
  459. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  460. // This works by sampling the temperature sensor channel, which has
  461. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  462. static void adc_poll()
  463. {
  464. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  465. static bool initialized = false;
  466. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  467. if (!initialized)
  468. {
  469. adc_init();
  470. adc_set_temp_sensor_enabled(true);
  471. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  472. adc_select_input(4);
  473. adc_fifo_setup(true, false, 0, false, false);
  474. adc_run(true);
  475. initialized = true;
  476. }
  477. #ifdef ENABLE_AUDIO_OUTPUT
  478. /*
  479. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  480. * at the same time a SPI DMA write begins, it appears that the first
  481. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  482. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  483. * is playing.
  484. */
  485. if (audio_is_active()) return;
  486. #endif // ENABLE_AUDIO_OUTPUT
  487. int adc_value_max = 0;
  488. while (!adc_fifo_is_empty())
  489. {
  490. int adc_value = adc_fifo_get();
  491. if (adc_value > adc_value_max) adc_value_max = adc_value;
  492. }
  493. // adc_value = 700mV * 4096 / Vdd
  494. // => Vdd = 700mV * 4096 / adc_value
  495. // To avoid wasting time on division, compare against
  496. // limit directly.
  497. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  498. if (adc_value_max > limit)
  499. {
  500. // Warn once, and then again if we detect even a lower drop.
  501. int vdd_mV = (700 * 4096) / adc_value_max;
  502. if (vdd_mV < lowest_vdd_seen)
  503. {
  504. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  505. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  506. }
  507. }
  508. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  509. }
  510. // This function is called for every log message.
  511. void platform_log(const char *s)
  512. {
  513. if (g_uart_initialized)
  514. {
  515. uart_puts(uart0, s);
  516. }
  517. }
  518. static int g_watchdog_timeout;
  519. static bool g_watchdog_initialized;
  520. static void watchdog_callback(unsigned alarm_num)
  521. {
  522. g_watchdog_timeout -= 1000;
  523. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  524. {
  525. // Been stuck for at least a second, start dumping USB log
  526. usb_log_poll();
  527. }
  528. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  529. {
  530. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  531. {
  532. logmsg("--------------");
  533. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  534. logmsg("Platform: ", g_platform_name);
  535. logmsg("FW Version: ", g_log_firmwareversion);
  536. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  537. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  538. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  539. scsi_accel_log_state();
  540. uint32_t *p = (uint32_t*)__get_MSP();
  541. for (int i = 0; i < 8; i++)
  542. {
  543. if (p == &__StackTop) break; // End of stack
  544. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  545. p += 4;
  546. }
  547. scsiDev.resetFlag = 1;
  548. g_scsiHostPhyReset = true;
  549. }
  550. if (g_watchdog_timeout <= 0)
  551. {
  552. logmsg("--------------");
  553. logmsg("WATCHDOG TIMEOUT, already attempted bus reset, rebooting");
  554. logmsg("Platform: ", g_platform_name);
  555. logmsg("FW Version: ", g_log_firmwareversion);
  556. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  557. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  558. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  559. uint32_t *p = (uint32_t*)__get_MSP();
  560. for (int i = 0; i < 8; i++)
  561. {
  562. if (p == &__StackTop) break; // End of stack
  563. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  564. p += 4;
  565. }
  566. usb_log_poll();
  567. platform_emergency_log_save();
  568. platform_boot_to_main_firmware();
  569. }
  570. }
  571. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  572. }
  573. // This function can be used to periodically reset watchdog timer for crash handling.
  574. // It can also be left empty if the platform does not use a watchdog timer.
  575. void platform_reset_watchdog()
  576. {
  577. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  578. if (!g_watchdog_initialized)
  579. {
  580. int alarm_num = -1;
  581. for (int i = 0; i < NUM_TIMERS; i++)
  582. {
  583. if (!hardware_alarm_is_claimed(i))
  584. {
  585. alarm_num = i;
  586. break;
  587. }
  588. }
  589. if (alarm_num == -1)
  590. {
  591. logmsg("No free watchdog hardware alarms to claim");
  592. return;
  593. }
  594. hardware_alarm_claim(alarm_num);
  595. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  596. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  597. g_watchdog_initialized = true;
  598. }
  599. // USB log is polled here also to make sure any log messages in fault states
  600. // get passed to USB.
  601. usb_log_poll();
  602. }
  603. // Poll function that is called every few milliseconds.
  604. // Can be left empty or used for platform-specific processing.
  605. void platform_poll()
  606. {
  607. usb_log_poll();
  608. adc_poll();
  609. #ifdef ENABLE_AUDIO_OUTPUT
  610. audio_poll();
  611. #endif // ENABLE_AUDIO_OUTPUT
  612. }
  613. uint8_t platform_get_buttons()
  614. {
  615. uint8_t buttons = 0;
  616. #if defined(ENABLE_AUDIO_OUTPUT)
  617. // pulled to VCC via resistor, sinking when pressed
  618. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  619. #elif defined(GPIO_I2C_SDA)
  620. // SDA = button 1, SCL = button 2
  621. if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  622. if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  623. #endif // defined(ENABLE_AUDIO_OUTPUT)
  624. // Simple debouncing logic: handle button releases after 100 ms delay.
  625. static uint32_t debounce;
  626. static uint8_t buttons_debounced = 0;
  627. if (buttons != 0)
  628. {
  629. buttons_debounced = buttons;
  630. debounce = millis();
  631. }
  632. else if ((uint32_t)(millis() - debounce) > 100)
  633. {
  634. buttons_debounced = 0;
  635. }
  636. return buttons_debounced;
  637. }
  638. /*****************************************/
  639. /* Flash reprogramming from bootloader */
  640. /*****************************************/
  641. #ifdef PLATFORM_BOOTLOADER_SIZE
  642. extern uint32_t __real_vectors_start;
  643. extern uint32_t __StackTop;
  644. static volatile void *g_bootloader_exit_req;
  645. __attribute__((section(".time_critical.platform_rewrite_flash_page")))
  646. bool platform_rewrite_flash_page(uint32_t offset, uint8_t buffer[PLATFORM_FLASH_PAGE_SIZE])
  647. {
  648. if (offset == PLATFORM_BOOTLOADER_SIZE)
  649. {
  650. if (buffer[3] != 0x20 || buffer[7] != 0x10)
  651. {
  652. logmsg("Invalid firmware file, starts with: ", bytearray(buffer, 16));
  653. return false;
  654. }
  655. }
  656. if (NVIC_GetEnableIRQ(USBCTRL_IRQ_IRQn))
  657. {
  658. logmsg("Disabling USB during firmware flashing");
  659. NVIC_DisableIRQ(USBCTRL_IRQ_IRQn);
  660. usb_hw->main_ctrl = 0;
  661. }
  662. dbgmsg("Writing flash at offset ", offset, " data ", bytearray(buffer, 4));
  663. assert(offset % PLATFORM_FLASH_PAGE_SIZE == 0);
  664. assert(offset >= PLATFORM_BOOTLOADER_SIZE);
  665. // Avoid any mbed timer interrupts triggering during the flashing.
  666. __disable_irq();
  667. // For some reason any code executed after flashing crashes
  668. // unless we disable the XIP cache.
  669. // Not sure why this happens, as flash_range_program() is flushing
  670. // the cache correctly.
  671. // The cache is now enabled from bootloader start until it starts
  672. // flashing, and again after reset to main firmware.
  673. xip_ctrl_hw->ctrl = 0;
  674. flash_range_erase(offset, PLATFORM_FLASH_PAGE_SIZE);
  675. flash_range_program(offset, buffer, PLATFORM_FLASH_PAGE_SIZE);
  676. uint32_t *buf32 = (uint32_t*)buffer;
  677. uint32_t num_words = PLATFORM_FLASH_PAGE_SIZE / 4;
  678. for (int i = 0; i < num_words; i++)
  679. {
  680. uint32_t expected = buf32[i];
  681. uint32_t actual = *(volatile uint32_t*)(XIP_NOCACHE_BASE + offset + i * 4);
  682. if (actual != expected)
  683. {
  684. logmsg("Flash verify failed at offset ", offset + i * 4, " got ", actual, " expected ", expected);
  685. __enable_irq();
  686. return false;
  687. }
  688. }
  689. __enable_irq();
  690. return true;
  691. }
  692. void platform_boot_to_main_firmware()
  693. {
  694. // To ensure that the system state is reset properly, we perform
  695. // a SYSRESETREQ and jump straight from the reset vector to main application.
  696. g_bootloader_exit_req = &g_bootloader_exit_req;
  697. SCB->AIRCR = 0x05FA0004;
  698. while(1);
  699. }
  700. void btldr_reset_handler()
  701. {
  702. uint32_t* application_base = &__real_vectors_start;
  703. if (g_bootloader_exit_req == &g_bootloader_exit_req)
  704. {
  705. // Boot to main application
  706. application_base = (uint32_t*)(XIP_BASE + PLATFORM_BOOTLOADER_SIZE);
  707. }
  708. SCB->VTOR = (uint32_t)application_base;
  709. __asm__(
  710. "msr msp, %0\n\t"
  711. "bx %1" : : "r" (application_base[0]),
  712. "r" (application_base[1]) : "memory");
  713. }
  714. // Replace the reset handler when building the bootloader
  715. // The rp2040_btldr.ld places real vector table at an offset.
  716. __attribute__((section(".btldr_vectors")))
  717. const void * btldr_vectors[2] = {&__StackTop, (void*)&btldr_reset_handler};
  718. #endif // PLATFORM_BOOTLOADER_SIZE
  719. /************************************/
  720. /* ROM drive in extra flash space */
  721. /************************************/
  722. #ifdef PLATFORM_HAS_ROM_DRIVE
  723. // Reserve up to 352 kB for firmware.
  724. #define ROMDRIVE_OFFSET (352 * 1024)
  725. uint32_t platform_get_romdrive_maxsize()
  726. {
  727. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  728. {
  729. return g_flash_chip_size - ROMDRIVE_OFFSET;
  730. }
  731. else
  732. {
  733. // Failed to read flash chip size, default to 2 MB
  734. return 2048 * 1024 - ROMDRIVE_OFFSET;
  735. }
  736. }
  737. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  738. {
  739. xip_ctrl_hw->stream_ctr = 0;
  740. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  741. {
  742. (void) xip_ctrl_hw->stream_fifo;
  743. }
  744. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  745. xip_ctrl_hw->stream_ctr = count / 4;
  746. // Transfer happens in multiples of 4 bytes
  747. assert(start < platform_get_romdrive_maxsize());
  748. assert((count & 3) == 0);
  749. assert((((uint32_t)dest) & 3) == 0);
  750. uint32_t *dest32 = (uint32_t*)dest;
  751. uint32_t words_remain = count / 4;
  752. while (words_remain > 0)
  753. {
  754. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  755. {
  756. *dest32++ = xip_ctrl_hw->stream_fifo;
  757. words_remain--;
  758. }
  759. }
  760. return true;
  761. }
  762. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  763. {
  764. assert(start < platform_get_romdrive_maxsize());
  765. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  766. __disable_irq();
  767. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  768. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  769. __enable_irq();
  770. return true;
  771. }
  772. #endif // PLATFORM_HAS_ROM_DRIVE
  773. /**********************************************/
  774. /* Mapping from data bytes to GPIO BOP values */
  775. /**********************************************/
  776. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  777. * For RP2040 we expect that the bits are consecutive and in order.
  778. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  779. * The parity table is placed into SRAM4 area to reduce bus contention.
  780. */
  781. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  782. #define X(n) (\
  783. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  784. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  785. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  786. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  787. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  788. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  789. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  790. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  791. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  792. )
  793. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  794. {
  795. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  796. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  797. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  798. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  799. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  800. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  801. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  802. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  803. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  804. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  805. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  806. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  807. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  808. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  809. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  810. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  811. };
  812. #undef X
  813. /* Similarly, another lookup table is used to verify parity of received data.
  814. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  815. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  816. */
  817. #define X(n) (\
  818. ((n & 0xFF) ^ 0xFF) | \
  819. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  820. )
  821. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  822. {
  823. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  824. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  825. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  826. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  827. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  828. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  829. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  830. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  831. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  832. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  833. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  834. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  835. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  836. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  837. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  838. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  839. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  840. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  841. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  842. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  843. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  844. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  845. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  846. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  847. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  848. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  849. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  850. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  851. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  852. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  853. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  854. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  855. };
  856. #undef X
  857. } /* extern "C" */