fsmc.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249
  1. /**
  2. ******************************************************************************
  3. * File Name : FSMC.c
  4. * Description : This file provides code for the configuration
  5. * of the FSMC peripheral.
  6. ******************************************************************************
  7. *
  8. * COPYRIGHT(c) 2016 STMicroelectronics
  9. *
  10. * Redistribution and use in source and binary forms, with or without modification,
  11. * are permitted provided that the following conditions are met:
  12. * 1. Redistributions of source code must retain the above copyright notice,
  13. * this list of conditions and the following disclaimer.
  14. * 2. Redistributions in binary form must reproduce the above copyright notice,
  15. * this list of conditions and the following disclaimer in the documentation
  16. * and/or other materials provided with the distribution.
  17. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  18. * may be used to endorse or promote products derived from this software
  19. * without specific prior written permission.
  20. *
  21. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  25. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  26. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  27. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  28. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. ******************************************************************************
  33. */
  34. /* Includes ------------------------------------------------------------------*/
  35. #include "fsmc.h"
  36. #include "gpio.h"
  37. /* USER CODE BEGIN 0 */
  38. /* USER CODE END 0 */
  39. SRAM_HandleTypeDef hsram1;
  40. /* FSMC initialization function */
  41. void MX_FSMC_Init(void)
  42. {
  43. FSMC_NORSRAM_TimingTypeDef Timing;
  44. /** Perform the SRAM1 memory initialization sequence
  45. */
  46. hsram1.Instance = FSMC_NORSRAM_DEVICE;
  47. hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
  48. /* hsram1.Init */
  49. hsram1.Init.NSBank = FSMC_NORSRAM_BANK1;
  50. hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_ENABLE;
  51. hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_PSRAM;
  52. hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
  53. hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
  54. hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
  55. hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
  56. hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
  57. hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
  58. hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
  59. hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
  60. hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
  61. hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
  62. /* Timing */
  63. // 1 clock to read the address, + 1 for synchroniser skew
  64. Timing.AddressSetupTime = 2;
  65. Timing.AddressHoldTime = 1;
  66. // Writes to device:
  67. // 1 for synchroniser skew (dbx also delayed)
  68. // 1 to skip hold time
  69. // 1 to write data.
  70. // Reads from device:
  71. // 3 for syncroniser
  72. // 1 to write back to fsmc bus.
  73. Timing.DataSetupTime = 4;
  74. // Allow a clock for us to release signals, plus 3 for the synchroniser to
  75. // realise the cycle has ended. Need to avoid both devices acting as outputs
  76. // on the multiplexed lines at the same time.
  77. Timing.BusTurnAroundDuration = 4;
  78. Timing.CLKDivision = 16; // Ignored for async
  79. Timing.DataLatency = 17; // Ignored for async
  80. Timing.AccessMode = FSMC_ACCESS_MODE_A;
  81. /* ExtTiming */
  82. HAL_SRAM_Init(&hsram1, &Timing, NULL);
  83. }
  84. static int FSMC_Initialized = 0;
  85. static void HAL_FSMC_MspInit(void){
  86. /* USER CODE BEGIN FSMC_MspInit 0 */
  87. /* USER CODE END FSMC_MspInit 0 */
  88. GPIO_InitTypeDef GPIO_InitStruct;
  89. if (FSMC_Initialized) {
  90. return;
  91. }
  92. FSMC_Initialized = 1;
  93. /* Peripheral clock enable */
  94. __FSMC_CLK_ENABLE();
  95. /** FSMC GPIO Configuration
  96. PE7 ------> FSMC_DA4
  97. PE8 ------> FSMC_DA5
  98. PE9 ------> FSMC_DA6
  99. PE10 ------> FSMC_DA7
  100. PE11 ------> FSMC_DA8
  101. PE12 ------> FSMC_DA9
  102. PE13 ------> FSMC_DA10
  103. PE14 ------> FSMC_DA11
  104. PE15 ------> FSMC_DA12
  105. PD14 ------> FSMC_DA0
  106. PD15 ------> FSMC_DA1
  107. PD0 ------> FSMC_DA2
  108. PD1 ------> FSMC_DA3
  109. PD4 ------> FSMC_NOE
  110. PD5 ------> FSMC_NWE
  111. PD7 ------> FSMC_NE1
  112. PD8 ------> FSMC_DA13
  113. PD9 ------> FSMC_DA14
  114. PD10 ------> FSMC_DA15
  115. PB7 ------> FSMC_NL
  116. PE0 ------> FSMC_NBL0
  117. PE1 ------> FSMC_NBL1
  118. */
  119. // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
  120. // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
  121. /* GPIO_InitStruct */
  122. GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
  123. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  124. GPIO_InitStruct.Pull = GPIO_NOPULL;
  125. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; //HIGH;
  126. GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
  127. HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
  128. /* GPIO_InitStruct */
  129. GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1
  130. |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10;
  131. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  132. GPIO_InitStruct.Pull = GPIO_NOPULL;
  133. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; //HIGH;
  134. GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
  135. HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
  136. /* GPIO_InitStruct */
  137. GPIO_InitStruct.Pin = GPIO_PIN_7;
  138. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  139. GPIO_InitStruct.Pull = GPIO_NOPULL;
  140. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;//HIGH;
  141. GPIO_InitStruct.Alternate = GPIO_AF12_FSMC;
  142. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  143. /* USER CODE BEGIN FSMC_MspInit 1 */
  144. /* USER CODE END FSMC_MspInit 1 */
  145. }
  146. void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
  147. /* USER CODE BEGIN SRAM_MspInit 0 */
  148. /* USER CODE END SRAM_MspInit 0 */
  149. HAL_FSMC_MspInit();
  150. /* USER CODE BEGIN SRAM_MspInit 1 */
  151. /* USER CODE END SRAM_MspInit 1 */
  152. }
  153. static int FSMC_DeInitialized = 0;
  154. static void HAL_FSMC_MspDeInit(void){
  155. /* USER CODE BEGIN FSMC_MspDeInit 0 */
  156. /* USER CODE END FSMC_MspDeInit 0 */
  157. if (FSMC_DeInitialized) {
  158. return;
  159. }
  160. FSMC_DeInitialized = 1;
  161. /* Peripheral clock enable */
  162. __FSMC_CLK_DISABLE();
  163. /** FSMC GPIO Configuration
  164. PE7 ------> FSMC_DA4
  165. PE8 ------> FSMC_DA5
  166. PE9 ------> FSMC_DA6
  167. PE10 ------> FSMC_DA7
  168. PE11 ------> FSMC_DA8
  169. PE12 ------> FSMC_DA9
  170. PE13 ------> FSMC_DA10
  171. PE14 ------> FSMC_DA11
  172. PE15 ------> FSMC_DA12
  173. PD14 ------> FSMC_DA0
  174. PD15 ------> FSMC_DA1
  175. PD0 ------> FSMC_DA2
  176. PD1 ------> FSMC_DA3
  177. PD4 ------> FSMC_NOE
  178. PD5 ------> FSMC_NWE
  179. PD7 ------> FSMC_NE1
  180. PD8 ------> FSMC_DA13
  181. PD9 ------> FSMC_DA14
  182. PD10 ------> FSMC_DA15
  183. PB7 ------> FSMC_NL
  184. PE0 ------> FSMC_NBL0
  185. PE1 ------> FSMC_NBL1
  186. */
  187. HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
  188. HAL_GPIO_DeInit(GPIOD, GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1
  189. |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10);
  190. HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
  191. /* USER CODE BEGIN FSMC_MspDeInit 1 */
  192. /* USER CODE END FSMC_MspDeInit 1 */
  193. }
  194. void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram){
  195. /* USER CODE BEGIN SRAM_MspDeInit 0 */
  196. /* USER CODE END SRAM_MspDeInit 0 */
  197. HAL_FSMC_MspDeInit();
  198. /* USER CODE BEGIN SRAM_MspDeInit 1 */
  199. /* USER CODE END SRAM_MspDeInit 1 */
  200. }
  201. /**
  202. * @}
  203. */
  204. /**
  205. * @}
  206. */
  207. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/