| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109 | /**  ******************************************************************************  * File Name          : dma.c  * Description        : This file provides code for the configuration  *                      of all the requested memory to memory DMA transfers.  ******************************************************************************  * @attention  *  * <h2><center>© Copyright (c) 2021 STMicroelectronics.  * All rights reserved.</center></h2>  *  * This software component is licensed by ST under Ultimate Liberty license  * SLA0044, the "License"; You may not use this file except in compliance with  * the License. You may obtain a copy of the License at:  *                             www.st.com/SLA0044  *  ******************************************************************************  *//* Includes ------------------------------------------------------------------*/#include "dma.h"/* USER CODE BEGIN 0 *//* USER CODE END 0 *//*----------------------------------------------------------------------------*//* Configure DMA                                                              *//*----------------------------------------------------------------------------*//* USER CODE BEGIN 1 *//* USER CODE END 1 */DMA_HandleTypeDef hdma_memtomem_dma2_stream0;DMA_HandleTypeDef hdma_memtomem_dma2_stream1;/**   * Enable DMA controller clock  * Configure DMA for memory to memory transfers  *   hdma_memtomem_dma2_stream0  *   hdma_memtomem_dma2_stream1  */void MX_DMA_Init(void) {  /* DMA controller clock enable */  __HAL_RCC_DMA2_CLK_ENABLE();  /* Configure DMA request hdma_memtomem_dma2_stream0 on DMA2_Stream0 */  hdma_memtomem_dma2_stream0.Instance = DMA2_Stream0;  hdma_memtomem_dma2_stream0.Init.Channel = DMA_CHANNEL_0;  hdma_memtomem_dma2_stream0.Init.Direction = DMA_MEMORY_TO_MEMORY;  hdma_memtomem_dma2_stream0.Init.PeriphInc = DMA_PINC_ENABLE;  hdma_memtomem_dma2_stream0.Init.MemInc = DMA_MINC_DISABLE;  hdma_memtomem_dma2_stream0.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;  hdma_memtomem_dma2_stream0.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;  hdma_memtomem_dma2_stream0.Init.Mode = DMA_NORMAL;  hdma_memtomem_dma2_stream0.Init.Priority = DMA_PRIORITY_LOW;  hdma_memtomem_dma2_stream0.Init.FIFOMode = DMA_FIFOMODE_ENABLE;  hdma_memtomem_dma2_stream0.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;  hdma_memtomem_dma2_stream0.Init.MemBurst = DMA_MBURST_INC8;  hdma_memtomem_dma2_stream0.Init.PeriphBurst = DMA_PBURST_INC4;  if (HAL_DMA_Init(&hdma_memtomem_dma2_stream0) != HAL_OK)  {    Error_Handler();  }  /* Configure DMA request hdma_memtomem_dma2_stream1 on DMA2_Stream1 */  hdma_memtomem_dma2_stream1.Instance = DMA2_Stream1;  hdma_memtomem_dma2_stream1.Init.Channel = DMA_CHANNEL_0;  hdma_memtomem_dma2_stream1.Init.Direction = DMA_MEMORY_TO_MEMORY;  hdma_memtomem_dma2_stream1.Init.PeriphInc = DMA_PINC_DISABLE;  hdma_memtomem_dma2_stream1.Init.MemInc = DMA_MINC_ENABLE;  hdma_memtomem_dma2_stream1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;  hdma_memtomem_dma2_stream1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;  hdma_memtomem_dma2_stream1.Init.Mode = DMA_NORMAL;  hdma_memtomem_dma2_stream1.Init.Priority = DMA_PRIORITY_LOW;  hdma_memtomem_dma2_stream1.Init.FIFOMode = DMA_FIFOMODE_ENABLE;  hdma_memtomem_dma2_stream1.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;  hdma_memtomem_dma2_stream1.Init.MemBurst = DMA_MBURST_INC4;  hdma_memtomem_dma2_stream1.Init.PeriphBurst = DMA_PBURST_INC8;  if (HAL_DMA_Init(&hdma_memtomem_dma2_stream1) != HAL_OK)  {    Error_Handler();  }  /* DMA interrupt init */  /* DMA2_Stream3_IRQn interrupt configuration */  HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 2, 0);  HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);  /* DMA2_Stream6_IRQn interrupt configuration */  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 2, 0);  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);}/* USER CODE BEGIN 2 *//* USER CODE END 2 *//**  * @}  *//**  * @}  *//************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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