| 1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768 | ; RP2040 PIO program for accelerating SCSI communication; Run "pioasm scsi_accel.pio scsi_accel.pio.h" to regenerate the C header from this.; GPIO mapping:; - 0-7: DB0-DB7; -   8: DBP; Side set is REQ pin.define REQ 17  ; was 9.define ACK 26  ; was 10; Delay from data setup to REQ assertion.; deskew delay + cable skew delay = 55 ns minimum; One clock cycle is 8 ns => delay 7 clocks.define REQ_DLY 7; Write to SCSI bus using asynchronous handshake.; Data is written as 16-bit words that contain the 8 data bits + 1 parity bit.; 7 bits in each word are discarded.; Number of bytes to send must be multiple of 2..program scsi_accel_async_write    .side_set 1    pull ifempty block          side 1  ; Get data from TX FIFO    out pins, 9                 side 1  ; Write data and parity bit    out null, 7 [REQ_DLY-2]     side 1  ; Discard unused bits, wait for data preset time    wait 1 gpio ACK             side 1  ; Wait for ACK to be inactive    wait 0 gpio ACK             side 0  ; Assert REQ, wait for ACK low; Read from SCSI bus using asynchronous handshake.; Also works for synchronous mode down to 50 ns transfer period.; Data is returned as 16-bit words that contain the 8 data bits + 1 parity bit.; Number of bytes to receive minus 1 should be written to TX fifo.; Number of bytes to receive must be divisible by 2..program scsi_accel_async_read    .side_set 1    pull block                  side 1  ; Get number of bytes to receive    mov x, osr                  side 1  ; Store to counter Xstart:    wait 1 gpio ACK             side 1  ; Wait for ACK high    wait 0 gpio ACK             side 0  ; Assert REQ, wait for ACK low    in pins, 9                  side 1  ; Deassert REQ, read GPIO    in null, 7                  side 1  ; Padding bits    jmp x-- start               side 1  ; Decrement byte count and jump to start; Data state machine for synchronous writes.; Takes the lowest 9 bits of each 16 bit word and writes them to bus with REQ pulse.; The delay times will be rewritten by C code to match the negotiated SCSI sync speed.;; Shifts one bit to ISR per every byte transmitted. This is used to control the transfer; pace, the RX fifo acts as a counter to keep track of unacknowledged bytes. The C code; can set the syncOffset by changing autopush threshold, e.g. threshold 3 = 12 bytes offset..program scsi_sync_write    .side_set 1    out pins, 9     [0]         side 1  ; Write data and parity bit, wait for deskew delay    out null, 7     [0]         side 0  ; Assert REQ, wait for assert time    in null, 1      [0]         side 1  ; Deassert REQ, wait for transfer period, wait for space in ACK buffer; Data pacing state machine for synchronous writes.; Takes one bit from ISR on every falling edge of ACK.; The C code should set autopull threshold to match scsi_sync_write autopush threshold.; System DMA will then move words from scsi_sync_write RX fifo to scsi_sync_write_pacer TX fifo..program scsi_sync_write_pacer    wait 1 gpio ACK    wait 0 gpio ACK   ; Wait for falling edge on ACK    out null, 1       ; Let scsi_sync_write send one more byte
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