BlueSCSI_platform.cpp 52 KB

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  1. /**
  2. * ZuluSCSI™ - Copyright (c) 2022-2025 Rabbit Hole Computing™
  3. *
  4. * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.
  5. *
  6. * https://www.gnu.org/licenses/gpl-3.0.html
  7. * ----
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20. **/
  21. #include "BlueSCSI_platform.h"
  22. #if PICO_CYW43_SUPPORTED
  23. extern "C" {
  24. # include "pico/cyw43_arch.h"
  25. }
  26. #endif
  27. #include "BlueSCSI_log.h"
  28. #include <SdFat.h>
  29. #include <sdio.h>
  30. #include <scsi.h>
  31. #include <assert.h>
  32. #include <hardware/gpio.h>
  33. #include <hardware/pio.h>
  34. #include <hardware/uart.h>
  35. #include <hardware/pll.h>
  36. #include <hardware/clocks.h>
  37. #include <hardware/spi.h>
  38. #include <hardware/adc.h>
  39. #include <hardware/flash.h>
  40. #include <hardware/structs/xip_ctrl.h>
  41. #include <hardware/structs/usb.h>
  42. #include <hardware/sync.h>
  43. #include "scsi_accel_target.h"
  44. #include "custom_timings.h"
  45. #include <BlueSCSI_settings.h>
  46. #include <minIni.h>
  47. #ifdef SD_USE_RP2350_SDIO
  48. #include <sdio_rp2350.h>
  49. #else
  50. #include <sdio.h>
  51. #endif
  52. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  53. # include <SerialUSB.h>
  54. # include <class/cdc/cdc_device.h>
  55. #endif
  56. #include <pico/multicore.h>
  57. // Definitions of Global PIN definitions that may change depending on hardware rev
  58. uint32_t SCSI_ACCEL_PINMASK = SCSI_ACCEL_SETPINS;
  59. uint8_t SCSI_OUT_REQ = SCSI_OUT_REQ_CURRENT;
  60. uint8_t SCSI_OUT_SEL = SCSI_OUT_SEL_CURRENT;
  61. #ifdef BLUESCSI_NETWORK
  62. extern "C" {
  63. # include <pico/cyw43_arch.h>
  64. }
  65. # ifdef BLUESCSI_RM2
  66. # include <pico/cyw43_driver.h>
  67. # endif
  68. #endif // BLUESCSI_NETWORK
  69. #ifdef PLATFORM_MASS_STORAGE
  70. #include "BlueSCSI_platform_msc.h"
  71. #endif
  72. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  73. # include "audio_spdif.h"
  74. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  75. # include "audio_i2s.h"
  76. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  77. extern bool g_rawdrive_active;
  78. extern "C" {
  79. #include "timings_RP2MCU.h"
  80. const char *g_platform_name = PLATFORM_NAME;
  81. static bool g_scsi_initiator = false;
  82. static bool g_supports_initiator = false;
  83. static uint32_t g_flash_chip_size = 0;
  84. static bool g_uart_initialized = false;
  85. static bool g_led_blinking = false;
  86. static void usb_log_poll();
  87. typedef void (*led_write_func_t)(bool state);
  88. static led_write_func_t g_led_write_func;
  89. static void platform_write_led_gpio(bool state);
  90. static void platform_write_led_picow(bool state);
  91. #if !defined(PICO_CYW43_SUPPORTED)
  92. extern bool __isPicoW;
  93. #endif
  94. /***************/
  95. /* GPIO init */
  96. /***************/
  97. // Helper function to configure whole GPIO in one line
  98. static void gpio_conf(uint gpio, gpio_function_t fn, bool pullup, bool pulldown, bool output, bool initial_state, bool fast_slew)
  99. {
  100. gpio_put(gpio, initial_state);
  101. gpio_set_dir(gpio, output);
  102. gpio_set_pulls(gpio, pullup, pulldown);
  103. gpio_set_function(gpio, fn);
  104. if (fast_slew)
  105. {
  106. pads_bank0_hw->io[gpio] |= PADS_BANK0_GPIO0_SLEWFAST_BITS;
  107. }
  108. }
  109. static void reclock() {
  110. // ensure UART is fully drained before we mess up its clock
  111. if (uart_is_enabled(uart0))
  112. uart_tx_wait_blocking(uart0);
  113. // switch clk_sys and clk_peri to pll_usb
  114. // see code in 2.15.6.1 of the datasheet for useful comments
  115. clock_configure(clk_sys,
  116. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  117. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  118. 48 * MHZ,
  119. 48 * MHZ);
  120. clock_configure(clk_peri,
  121. 0,
  122. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB,
  123. 48 * MHZ,
  124. 48 * MHZ);
  125. // reset PLL
  126. pll_init(pll_sys,
  127. g_bluescsi_timings->pll.refdiv,
  128. g_bluescsi_timings->pll.vco_freq,
  129. g_bluescsi_timings->pll.post_div1,
  130. g_bluescsi_timings->pll.post_div2);
  131. // switch clocks back to pll_sys
  132. clock_configure(clk_sys,
  133. CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
  134. CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  135. g_bluescsi_timings->clk_hz,
  136. g_bluescsi_timings->clk_hz);
  137. clock_configure(clk_peri,
  138. 0,
  139. CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS,
  140. g_bluescsi_timings->clk_hz,
  141. g_bluescsi_timings->clk_hz);
  142. // reset UART for the new clock speed
  143. if (uart_is_enabled(uart0))
  144. uart_init(uart0, 1000000);
  145. }
  146. uint32_t platform_sys_clock_in_hz()
  147. {
  148. return clock_get_hz(clk_sys);
  149. }
  150. bool platform_reclock(bluescsi_speed_grade_t speed_grade)
  151. {
  152. CustomTimings ct;
  153. bool do_reclock = false;
  154. if (speed_grade != SPEED_GRADE_DEFAULT)
  155. {
  156. if (speed_grade == SPEED_GRADE_CUSTOM)
  157. {
  158. if (ct.use_custom_timings())
  159. {
  160. logmsg("Using custom timings found in \"", CUSTOM_TIMINGS_FILE, "\" for reclocking");
  161. ct.set_timings_from_file();
  162. do_reclock = true;
  163. }
  164. else
  165. {
  166. logmsg("Custom timings file, \"", CUSTOM_TIMINGS_FILE, "\" not found or disabled");
  167. }
  168. }
  169. else if (set_timings(speed_grade))
  170. do_reclock = true;
  171. if (do_reclock)
  172. {
  173. #ifdef ENABLE_AUDIO_OUTPUT
  174. if (g_bluescsi_timings->audio.audio_clocked)
  175. logmsg("Reclocking with these settings are compatible with CD audio playback");
  176. else
  177. logmsg("Reclocking with these settings may cause audio playback to be too fast or slow ");
  178. #endif
  179. logmsg("Initial Clock set to ", (int) platform_sys_clock_in_hz() / MHZ, "MHz");
  180. logmsg("Reclocking the MCU to ",(int) g_bluescsi_timings->clk_hz / MHZ, "MHz");
  181. #ifndef SD_USE_RP2350_SDIO
  182. logmsg("Setting the SDIO clock to ", (int)((g_bluescsi_timings->clk_hz / g_bluescsi_timings->sdio.clk_div_pio + (5 * MHZ / 10)) / MHZ) , "MHz");
  183. #endif
  184. usb_log_poll();
  185. reclock();
  186. logmsg("After reclocking, system reports clock set to ", (int) platform_sys_clock_in_hz() / MHZ, "MHz");
  187. }
  188. }
  189. else
  190. dbgmsg("Speed grade is set to default, reclocking skipped");
  191. return do_reclock;
  192. }
  193. /**
  194. * This is a workaround until arduino framework can be updated to handle all 4 variations of
  195. * Pico1/1w/2/2w. In testing this works on all for BlueSCSI.
  196. * Tracking here https://github.com/earlephilhower/arduino-pico/issues/2671
  197. */
  198. bool platform_check_picow() {
  199. static int8_t isPicoW = -1; // -1 = unchecked, 0 = false, 1 = true
  200. if (isPicoW != -1)
  201. return isPicoW == 1;
  202. #ifndef CYW43_PIN_WL_CLOCK
  203. uint8_t cyw43_pin_wl_clock = 29; // Default to GPIO 29, which is the CYW43_PIN_WL_CLOCK
  204. #else
  205. uint8_t cyw43_pin_wl_clock = CYW43_PIN_WL_CLOCK;
  206. #endif
  207. adc_init();
  208. const auto dir = gpio_get_dir(cyw43_pin_wl_clock);
  209. const auto fnc = gpio_get_function(cyw43_pin_wl_clock);
  210. adc_gpio_init(cyw43_pin_wl_clock);
  211. adc_select_input(3);
  212. const auto adc29 = adc_read();
  213. gpio_set_function(cyw43_pin_wl_clock, fnc);
  214. gpio_set_dir(cyw43_pin_wl_clock, dir);
  215. if (adc29 < 200) {
  216. #ifdef CYW43_PIN_WL_CLOCK
  217. __isPicoW = true; // Set the global if available for PicoW || Pico2W
  218. #endif
  219. isPicoW = 1;
  220. } else {
  221. #ifdef CYW43_PIN_WL_CLOCK
  222. __isPicoW = false;
  223. #endif
  224. isPicoW = 0;
  225. }
  226. return isPicoW == 1;
  227. }
  228. bool platform_rebooted_into_mass_storage()
  229. {
  230. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  231. if (*scratch0 == REBOOT_INTO_MASS_STORAGE_MAGIC_NUM)
  232. {
  233. *scratch0 = 0;
  234. return true;
  235. }
  236. return false;
  237. }
  238. #ifdef HAS_DIP_SWITCHES
  239. enum pin_setup_state_t {SETUP_FALSE, SETUP_TRUE, SETUP_UNDETERMINED};
  240. static pin_setup_state_t read_setup_ack_pin()
  241. {
  242. /* Revision 2022d of the RP2040 hardware has problems reading initiator DIP switch setting.
  243. * The 74LVT245 hold current is keeping the GPIO_ACK state too strongly.
  244. * Detect this condition by toggling the pin up and down and seeing if it sticks.
  245. *
  246. * Revision 2023b and 2023c of the Pico boards have issues reading TERM and DEBUG DIP switch
  247. * settings. GPIO_ACK is externally pulled down to ground for later revisions.
  248. * If the state is detected as undetermined then the board is the 2023b or 2023c revision.
  249. */
  250. // Strong output high, then pulldown
  251. // pin function pup pdown out state fast
  252. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, true, false);
  253. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, true, false, true, false);
  254. delay(1);
  255. bool ack_state1 = gpio_get(SCSI_IN_ACK);
  256. // Strong output low, then pullup
  257. // pin function pup pdown out state fast
  258. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, false, false, true, false, false);
  259. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, false, false);
  260. delay(1);
  261. bool ack_state2 = gpio_get(SCSI_IN_ACK);
  262. if (ack_state1 == ack_state2)
  263. {
  264. // Ok, was able to read the state directly
  265. return !ack_state1 ? SETUP_TRUE : SETUP_FALSE;
  266. }
  267. // Enable OUT_BSY for a short time.
  268. // If in target mode, this will force GPIO_ACK high.
  269. gpio_put(SCSI_OUT_BSY, 0);
  270. delay_100ns();
  271. gpio_put(SCSI_OUT_BSY, 1);
  272. return SETUP_UNDETERMINED;
  273. }
  274. #endif
  275. static bool is2023a = false;
  276. bool checkIs2023a() {
  277. #ifdef BLUESCSI_MCU_RP23XX
  278. // Force out low for RP2350 errata
  279. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_SIO, false, false, true, false, true);
  280. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_SIO, false, false, true, false, true);
  281. delay(10);
  282. #endif
  283. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, false, false, false, false, true);
  284. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, false, false, false, false, true);
  285. is2023a = gpio_get(GPIO_I2C_SCL) && gpio_get(GPIO_I2C_SDA);
  286. if (is2023a) {
  287. logmsg("I2C Supported");
  288. g_supports_initiator = true;
  289. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true, false, false, true, true);
  290. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true, false, false, true, true);
  291. // Use Pico SDK methods
  292. gpio_set_function(GPIO_I2C_SCL, GPIO_FUNC_I2C);
  293. gpio_set_function(GPIO_I2C_SDA, GPIO_FUNC_I2C);
  294. // gpio_pull_up(GPIO_I2C_SCL); // TODO necessary?
  295. // gpio_pull_up(GPIO_I2C_SDA);
  296. } else {
  297. dbgmsg("I2C not supported on this rev of hardware");
  298. /* Check option switch settings */
  299. // Option switches: S1 is iATN, S2 is iACK
  300. // gpio_conf(BUTTON_SW1_PRE202309a, GPIO_FUNC_SIO, true, false, false, false, false);
  301. // gpio_conf(BUTTON_SW1_PRE202309a, GPIO_FUNC_SIO, false, false, false, false, false);
  302. // delay(10); /// Settle time
  303. gpio_conf(BUTTON_SW1_PRE202309a, GPIO_FUNC_SIO, true, false, false, false, false);
  304. gpio_conf(BUTTON_SW2_PRE202309a, GPIO_FUNC_SIO, true, false, false, false, false);
  305. // Reset REQ to the appropriate pin for older hardware
  306. SCSI_OUT_REQ = SCSI_OUT_REQ_PRE09A;
  307. SCSI_ACCEL_PINMASK = SCSI_ACCEL_SETPINS_PRE09A;
  308. SCSI_OUT_SEL = SCSI_OUT_SEL_PRE09A;
  309. // Initialize logging to SWO pin (UART0)
  310. gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  311. uart_init(uart0, 115200);
  312. g_uart_initialized = true;
  313. }
  314. gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true);
  315. return is2023a;
  316. }
  317. void platform_init()
  318. {
  319. g_led_write_func = platform_write_led_gpio;
  320. // Make sure second core is stopped
  321. multicore_reset_core1();
  322. pio_clear_instruction_memory(pio0);
  323. pio_clear_instruction_memory(pio1);
  324. /* First configure the pins that affect external buffer directions.
  325. * RP2040 defaults to pulldowns, while these pins have external pull-ups.
  326. */
  327. // pin function pup pdown out state fast
  328. gpio_conf(SCSI_DATA_DIR, GPIO_FUNC_SIO, false,false, true, true, true);
  329. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  330. gpio_conf(SCSI_OUT_BSY, GPIO_FUNC_SIO, false,false, true, true, true);
  331. /* Check dip switch settings */
  332. #ifdef HAS_DIP_SWITCHES
  333. gpio_conf(DIP_INITIATOR, GPIO_FUNC_SIO, false, false, false, false, false);
  334. gpio_conf(DIP_DBGLOG, GPIO_FUNC_SIO, false, false, false, false, false);
  335. gpio_conf(DIP_TERM, GPIO_FUNC_SIO, false, false, false, false, false);
  336. delay(10); // 10 ms delay to let pull-ups do their work
  337. bool working_dip = true;
  338. bool dbglog = false;
  339. bool termination = false;
  340. # if defined(BLUESCSI_PICO) || defined(BLUESCSI_PICO_2)
  341. // Initiator dip setting works on all rev 2023b, 2023c, and newer rev Pico boards
  342. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  343. working_dip = SETUP_UNDETERMINED != read_setup_ack_pin();
  344. if (working_dip)
  345. {
  346. dbglog = !gpio_get(DIP_DBGLOG);
  347. termination = !gpio_get(DIP_TERM);
  348. }
  349. # elif defined(BLUESCSI_V2_0)
  350. pin_setup_state_t dip_state = read_setup_ack_pin();
  351. if (dip_state == SETUP_UNDETERMINED)
  352. {
  353. // This path is used for the few early RP2040 boards assembled with
  354. // Diodes Incorporated 74LVT245B, which has higher bus hold
  355. // current.
  356. working_dip = false;
  357. g_scsi_initiator = !gpio_get(DIP_INITIATOR); // Read fallback value
  358. }
  359. else
  360. {
  361. g_scsi_initiator = (SETUP_TRUE == dip_state);
  362. termination = !gpio_get(DIP_TERM);
  363. }
  364. // dbglog DIP switch works in any case, as it does not have bus hold.
  365. dbglog = !gpio_get(DIP_DBGLOG);
  366. g_log_debug = dbglog;
  367. # else
  368. g_scsi_initiator = !gpio_get(DIP_INITIATOR);
  369. termination = !gpio_get(DIP_TERM);
  370. dbglog = !gpio_get(DIP_DBGLOG);
  371. g_log_debug = dbglog;
  372. # endif
  373. #else
  374. delay(10);
  375. #endif // HAS_DIP_SWITCHES
  376. #ifndef DISABLE_SWO
  377. /* Initialize logging to SWO pin (UART0) */
  378. // gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true);
  379. // uart_init(uart0, 1000000);
  380. // g_uart_initialized = true;
  381. #endif // DISABLE_SWO
  382. logmsg("Platform: ", g_platform_name, " (", PLATFORM_PID, platform_check_picow() ? "/W" : "", ")");
  383. logmsg("FW Version: ", g_log_firmwareversion);
  384. #if PICO_CYW43_SUPPORTED && !defined(BLUESCSI_NETWORK)
  385. if (cyw43_arch_init()) {
  386. logmsg("CYW43 driver init failed");
  387. }
  388. #endif
  389. #ifdef HAS_DIP_SWITCHES
  390. if (working_dip)
  391. {
  392. logmsg("DIP switch settings: debug log ", (int)dbglog, ", termination ", (int)termination);
  393. g_log_debug = dbglog;
  394. if (termination)
  395. {
  396. logmsg("SCSI termination is enabled");
  397. }
  398. else
  399. {
  400. logmsg("NOTE: SCSI termination is disabled");
  401. }
  402. }
  403. else
  404. {
  405. logmsg("SCSI termination is determined by the DIP switch labeled \"TERM\"");
  406. #if defined(BLUESCSI_PICO) || defined(BLUESCSI_PICO_2)
  407. logmsg("Debug logging can only be enabled via INI file \"DEBUG=1\" under [SCSI] in bluescsi.ini");
  408. logmsg("-- DEBUG DIP switch setting is ignored on BlueSCSI Pico FS Rev. 2023b and 2023c boards");
  409. g_log_debug = false;
  410. #endif
  411. }
  412. #else
  413. g_log_debug = false;
  414. //logmsg ("SCSI termination is handled by a hardware jumper");
  415. #endif // HAS_DIP_SWITCHES
  416. // logmsg("===========================================================");
  417. // logmsg(" Powered by Raspberry Pi");
  418. // logmsg(" Raspberry Pi is a trademark of Raspberry Pi Ltd");
  419. // logmsg("===========================================================");
  420. // Get flash chip size
  421. uint8_t cmd_read_jedec_id[4] = {0x9f, 0, 0, 0};
  422. uint8_t response_jedec[4] = {0};
  423. uint32_t saved_irq = save_and_disable_interrupts();
  424. flash_do_cmd(cmd_read_jedec_id, response_jedec, 4);
  425. restore_interrupts(saved_irq);
  426. g_flash_chip_size = (1 << response_jedec[3]);
  427. logmsg("Flash chip size: ", (int)(g_flash_chip_size / 1024), " kB");
  428. // SD card pins
  429. // Card is used in SDIO mode for main program, and in SPI mode for crash handler & bootloader.
  430. // pin function pup pdown out state fast
  431. gpio_conf(SD_SPI_SCK, GPIO_FUNC_SPI, true, false, true, true, true);
  432. gpio_conf(SD_SPI_MOSI, GPIO_FUNC_SPI, true, false, true, true, true);
  433. gpio_conf(SD_SPI_MISO, GPIO_FUNC_SPI, true, false, false, true, true);
  434. gpio_conf(SD_SPI_CS, GPIO_FUNC_SIO, true, false, true, true, true);
  435. gpio_conf(SDIO_D1, GPIO_FUNC_SIO, true, false, false, true, true);
  436. gpio_conf(SDIO_D2, GPIO_FUNC_SIO, true, false, false, true, true);
  437. // LED pin
  438. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, true, false, false);
  439. #ifndef ENABLE_AUDIO_OUTPUT_SPDIF
  440. #ifdef GPIO_I2C_SDA
  441. // I2C pins
  442. // pin function pup pdown out state fast
  443. // gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_I2C, true,false, false, true, true);
  444. // gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_I2C, true,false, false, true, true);
  445. #endif // GPIO_I2C_SDA
  446. #else
  447. // pin function pup pdown out state fast
  448. gpio_conf(GPIO_EXP_AUDIO, GPIO_FUNC_SPI, true,false, false, true, true);
  449. gpio_conf(GPIO_EXP_SPARE, GPIO_FUNC_SIO, true,false, false, true, false);
  450. // configuration of corresponding SPI unit occurs in audio_setup()
  451. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  452. #ifdef GPIO_USB_POWER
  453. gpio_conf(GPIO_USB_POWER, GPIO_FUNC_SIO, false, false, false, false, false);
  454. #endif
  455. checkIs2023a();
  456. }
  457. void platform_enable_initiator_mode()
  458. {
  459. g_scsi_initiator = true;
  460. }
  461. // late_init() only runs in main application, SCSI not needed in bootloader
  462. void platform_late_init()
  463. {
  464. #if PICO_CYW43_SUPPORTED
  465. if (platform_check_picow()) {
  466. g_led_write_func = platform_write_led_picow;
  467. }
  468. #endif
  469. #if defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  470. if (g_scsi_initiator == true)
  471. {
  472. logmsg("*************************************************************************");
  473. logmsg(" SCSI initiator mode enabled, expecting SCSI disks on the bus ");
  474. logmsg("*************************************************************************");
  475. }
  476. else
  477. {
  478. logmsg("SCSI target/disk mode selected by DIP switch, acting as a SCSI disk");
  479. }
  480. #else
  481. // Initiator mode detected will be detected via ini.
  482. #endif // defined(HAS_DIP_SWITCHES) && defined(PLATFORM_HAS_INITIATOR_MODE)
  483. /* Initialize SCSI pins to required modes.
  484. * SCSI pins should be inactive / input at this point.
  485. */
  486. // SCSI data bus direction is switched by DATA_DIR signal.
  487. // Pullups make sure that no glitches occur when switching direction.
  488. // pin function pup pdown out state fast
  489. gpio_conf(SCSI_IO_DB0, GPIO_FUNC_SIO, true, false, false, true, true);
  490. gpio_conf(SCSI_IO_DB1, GPIO_FUNC_SIO, true, false, false, true, true);
  491. gpio_conf(SCSI_IO_DB2, GPIO_FUNC_SIO, true, false, false, true, true);
  492. gpio_conf(SCSI_IO_DB3, GPIO_FUNC_SIO, true, false, false, true, true);
  493. gpio_conf(SCSI_IO_DB4, GPIO_FUNC_SIO, true, false, false, true, true);
  494. gpio_conf(SCSI_IO_DB5, GPIO_FUNC_SIO, true, false, false, true, true);
  495. gpio_conf(SCSI_IO_DB6, GPIO_FUNC_SIO, true, false, false, true, true);
  496. gpio_conf(SCSI_IO_DB7, GPIO_FUNC_SIO, true, false, false, true, true);
  497. gpio_conf(SCSI_IO_DBP, GPIO_FUNC_SIO, true, false, false, true, true);
  498. if (!g_scsi_initiator)
  499. {
  500. // Act as SCSI device / target
  501. // SCSI control outputs
  502. // pin function pup pdown out state fast
  503. gpio_conf(SCSI_OUT_IO, GPIO_FUNC_SIO, false,false, true, true, true);
  504. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  505. // REQ pin is switched between PIO and SIO, pull-up makes sure no glitches
  506. gpio_conf(SCSI_OUT_REQ, GPIO_FUNC_SIO, true ,false, true, true, true);
  507. // Shared pins are changed to input / output depending on communication phase
  508. gpio_conf(SCSI_IN_SEL, GPIO_FUNC_SIO, true, false, false, true, true);
  509. if (SCSI_OUT_CD != SCSI_IN_SEL)
  510. {
  511. gpio_conf(SCSI_OUT_CD, GPIO_FUNC_SIO, false,false, true, true, true);
  512. }
  513. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, true);
  514. if (SCSI_OUT_MSG != SCSI_IN_BSY)
  515. {
  516. gpio_conf(SCSI_OUT_MSG, GPIO_FUNC_SIO, false,false, true, true, true);
  517. }
  518. // SCSI control inputs
  519. // pin function pup pdown out state fast
  520. gpio_conf(SCSI_IN_ACK, GPIO_FUNC_SIO, true, false, false, true, false);
  521. gpio_conf(SCSI_IN_ATN, GPIO_FUNC_SIO, true, false, false, true, false);
  522. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  523. #ifdef BLUESCSI_RM2
  524. uint rm2_pins[CYW43_PIN_INDEX_WL_COUNT] = {0};
  525. rm2_pins[CYW43_PIN_INDEX_WL_REG_ON] = GPIO_RM2_ON;
  526. rm2_pins[CYW43_PIN_INDEX_WL_DATA_OUT] = GPIO_RM2_DATA;
  527. rm2_pins[CYW43_PIN_INDEX_WL_DATA_IN] = GPIO_RM2_DATA;
  528. rm2_pins[CYW43_PIN_INDEX_WL_HOST_WAKE] = GPIO_RM2_DATA;
  529. rm2_pins[CYW43_PIN_INDEX_WL_CLOCK] = GPIO_RM2_CLK;
  530. rm2_pins[CYW43_PIN_INDEX_WL_CS] = GPIO_RM2_CS;
  531. assert(PICO_OK == cyw43_set_pins_wl(rm2_pins));
  532. if (platform_reclock(SPEED_GRADE_WIFI_RM2))
  533. {
  534. // The iface check turns on the LED on the RM2 early in the init process
  535. // Should tell the user that the RM2 is working
  536. if(platform_network_iface_check())
  537. {
  538. logmsg("RM2 found");
  539. }
  540. else
  541. {
  542. # ifdef BLUESCSI_BLASTER
  543. logmsg("RM2 not found, upclocking");
  544. platform_reclock(SPEED_GRADE_AUDIO_I2S);
  545. # else
  546. logmsg("RM2 not found");
  547. # endif
  548. }
  549. }
  550. else
  551. {
  552. logmsg("WiFi RM2 timings not found");
  553. }
  554. #elif defined(ENABLE_AUDIO_OUTPUT_I2S)
  555. logmsg("I2S audio to expansion header enabled");
  556. if (!platform_reclock(SPEED_GRADE_AUDIO_I2S))
  557. {
  558. logmsg("Audio output timings not found");
  559. }
  560. #elif defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  561. logmsg("S/PDIF audio to expansion header enabled");
  562. if (platform_reclock(SPEED_GRADE_AUDIO_SPDIF))
  563. {
  564. logmsg("Reclocked for Audio Ouput at ", (int) platform_sys_clock_in_hz(), "Hz");
  565. }
  566. else
  567. {
  568. logmsg("Audio Output timings not found");
  569. }
  570. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  571. // This should turn on the LED for Pico 1/2 W devices early in the init process
  572. // It should help indicate to the user that interface is working and the board is ready for DaynaPORT
  573. #if defined(BLUESCSI_NETWORK) && ! defined(BLUESCSI_RM2)
  574. if (platform_network_supported())
  575. platform_network_iface_check();
  576. #endif
  577. #ifdef ENABLE_AUDIO_OUTPUT
  578. // one-time control setup for DMA channels and second core
  579. audio_setup();
  580. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  581. }
  582. else
  583. {
  584. #ifndef PLATFORM_HAS_INITIATOR_MODE
  585. assert(false);
  586. #else
  587. platform_initiator_gpio_setup();
  588. #endif // PLATFORM_HAS_INITIATOR_MODE
  589. }
  590. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  591. Serial.begin();
  592. #endif
  593. scsi_accel_rp2040_init();
  594. }
  595. // Act as SCSI initiator
  596. void platform_initiator_gpio_setup() {
  597. // pin function pup pdown out state fast
  598. gpio_conf(SCSI_IN_IO, GPIO_FUNC_SIO, true ,false, false, true, false);
  599. gpio_conf(SCSI_IN_MSG, GPIO_FUNC_SIO, true ,false, false, true, false);
  600. gpio_conf(SCSI_IN_CD, GPIO_FUNC_SIO, true ,false, false, true, false);
  601. gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false);
  602. gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false);
  603. gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false);
  604. gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false,false, true, true, true);
  605. gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, true,false, true, true, true);
  606. //gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true); // ATN output is unused
  607. }
  608. bool platform_supports_initiator_mode() {
  609. return g_supports_initiator;
  610. }
  611. void platform_post_sd_card_init() {}
  612. bool platform_is_initiator_mode_enabled()
  613. {
  614. // logmsg("Initiator mode enabled: ", g_scsi_initiator);
  615. return g_scsi_initiator;
  616. }
  617. void platform_write_led(bool state)
  618. {
  619. if (g_led_blinking) return;
  620. if (g_scsi_settings.getSystem()->invertStatusLed)
  621. state = !state;
  622. g_led_write_func(state);
  623. }
  624. void platform_set_blink_status(bool status)
  625. {
  626. g_led_blinking = status;
  627. }
  628. void platform_write_led_override(bool state)
  629. {
  630. if (g_scsi_settings.getSystem()->invertStatusLed)
  631. state = !state;
  632. g_led_write_func(state);
  633. }
  634. static void platform_write_led_picow(bool state)
  635. {
  636. #if PICO_CYW43_SUPPORTED
  637. // CYW43_WL_GPIO_LED_PIN: 0 but we dont want to pull in the cyw43 driver/header/etc
  638. cyw43_arch_gpio_put(0, state);
  639. #endif
  640. }
  641. static void platform_write_led_gpio(bool state)
  642. {
  643. gpio_put(LED_PIN, state);
  644. }
  645. void platform_disable_led(void)
  646. {
  647. // pin function pup pdown out state fast
  648. gpio_conf(LED_PIN, GPIO_FUNC_SIO, false,false, false, false, false);
  649. logmsg("Disabling status LED");
  650. }
  651. uint8_t platform_no_sd_card_on_init_error_code()
  652. {
  653. return SDIO_ERR_RESPONSE_TIMEOUT;
  654. }
  655. /*****************************************/
  656. /* Crash handlers */
  657. /*****************************************/
  658. extern SdFs SD;
  659. extern uint32_t __StackTop;
  660. void platform_emergency_log_save()
  661. {
  662. if (g_rawdrive_active)
  663. return;
  664. platform_set_sd_callback(NULL, NULL);
  665. SD.begin(SD_CONFIG_CRASH);
  666. FsFile crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  667. if (!crashfile.isOpen())
  668. {
  669. // Try to reinitialize
  670. int max_retry = 10;
  671. while (max_retry-- > 0 && !SD.begin(SD_CONFIG_CRASH));
  672. crashfile = SD.open(CRASHFILE, O_WRONLY | O_CREAT | O_TRUNC);
  673. }
  674. uint32_t startpos = 0;
  675. crashfile.write(log_get_buffer(&startpos));
  676. crashfile.write(log_get_buffer(&startpos));
  677. crashfile.flush();
  678. crashfile.close();
  679. }
  680. static void usb_log_poll();
  681. static void usb_input_poll();
  682. __attribute__((noinline))
  683. void show_hardfault(uint32_t *sp)
  684. {
  685. uint32_t pc = sp[6];
  686. uint32_t lr = sp[5];
  687. logmsg("--------------");
  688. logmsg("CRASH!");
  689. logmsg("Platform: ", g_platform_name);
  690. logmsg("FW Version: ", g_log_firmwareversion);
  691. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  692. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  693. logmsg("SP: ", (uint32_t)sp);
  694. logmsg("PC: ", pc);
  695. logmsg("LR: ", lr);
  696. logmsg("R0: ", sp[0]);
  697. logmsg("R1: ", sp[1]);
  698. logmsg("R2: ", sp[2]);
  699. logmsg("R3: ", sp[3]);
  700. uint32_t *p = (uint32_t*)((uint32_t)sp & ~3);
  701. for (int i = 0; i < 8; i++)
  702. {
  703. if (p == &__StackTop) break; // End of stack
  704. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  705. p += 4;
  706. }
  707. platform_emergency_log_save();
  708. while (1)
  709. {
  710. usb_log_poll();
  711. // Flash the crash address on the LED
  712. // Short pulse means 0, long pulse means 1
  713. int base_delay = 500;
  714. for (int i = 31; i >= 0; i--)
  715. {
  716. LED_OFF();
  717. for (int j = 0; j < base_delay; j++) busy_wait_ms(1);
  718. int delay = (pc & (1 << i)) ? (3 * base_delay) : base_delay;
  719. LED_ON();
  720. for (int j = 0; j < delay; j++) busy_wait_ms(1);
  721. LED_OFF();
  722. }
  723. for (int j = 0; j < base_delay * 10; j++) busy_wait_ms(1);
  724. }
  725. }
  726. __attribute__((naked, interrupt))
  727. void isr_hardfault(void)
  728. {
  729. // Copies stack pointer into first argument
  730. asm("mrs r0, msp\n"
  731. "bl show_hardfault": : : "r0");
  732. }
  733. /*****************************************/
  734. /* Debug logging and watchdog */
  735. /*****************************************/
  736. static bool usb_serial_connected()
  737. {
  738. #ifdef PIO_FRAMEWORK_ARDUINO_NO_USB
  739. return false;
  740. #endif
  741. static bool connected;
  742. static uint32_t last_check_time;
  743. #ifdef PLATFORM_MASS_STORAGE
  744. if (platform_msc_lock_get()) return connected; // Avoid re-entrant USB events
  745. #endif
  746. if (last_check_time == 0 || (uint32_t)(millis() - last_check_time) > 50)
  747. {
  748. connected = bool(Serial);
  749. last_check_time = millis();
  750. }
  751. return connected;
  752. }
  753. // Send log data to USB UART if USB is connected.
  754. // Data is retrieved from the shared log ring buffer and
  755. // this function sends as much as fits in USB CDC buffer.
  756. //
  757. // This is normally called by platform_reset_watchdog() in
  758. // the normal polling loop. If code hangs, the watchdog_callback()
  759. // also starts calling this after 2 seconds.
  760. // This ensures that log messages get passed even if code hangs,
  761. // but does not unnecessarily delay normal execution.
  762. static void usb_log_poll()
  763. {
  764. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  765. static uint32_t logpos = 0;
  766. if (!usb_serial_connected()) return;
  767. #ifdef PLATFORM_MASS_STORAGE
  768. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  769. #endif
  770. if (Serial.availableForWrite())
  771. {
  772. // Retrieve pointer to log start and determine number of bytes available.
  773. uint32_t available = 0;
  774. const char *data = log_get_buffer(&logpos, &available);
  775. // Limit to CDC packet size
  776. uint32_t len = available;
  777. if (len == 0) return;
  778. if (len > CFG_TUD_CDC_EP_BUFSIZE) len = CFG_TUD_CDC_EP_BUFSIZE;
  779. // Update log position by the actual number of bytes sent
  780. // If USB CDC buffer is full, this may be 0
  781. uint32_t actual = 0;
  782. actual = Serial.write(data, len);
  783. logpos -= available - actual;
  784. }
  785. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  786. }
  787. // Grab input from USB Serial terminal
  788. static void usb_input_poll()
  789. {
  790. #ifndef PIO_FRAMEWORK_ARDUINO_NO_USB
  791. if (!usb_serial_connected()) return;
  792. #ifdef PLATFORM_MASS_STORAGE
  793. if (platform_msc_lock_get()) return; // Avoid re-entrant USB events
  794. #endif
  795. // Capture reboot key sequence
  796. static bool mass_storage_reboot_keyed = false;
  797. static bool basic_reboot_keyed = false;
  798. static bool uf2_reboot_keyed = false;
  799. volatile uint32_t* scratch0 = (uint32_t *)(WATCHDOG_BASE + WATCHDOG_SCRATCH0_OFFSET);
  800. int32_t available = Serial.available();
  801. if(available > 0)
  802. {
  803. int32_t read = Serial.read();
  804. switch((char) read)
  805. {
  806. case 'R':
  807. case 'r':
  808. basic_reboot_keyed = true;
  809. mass_storage_reboot_keyed = uf2_reboot_keyed = false;
  810. logmsg("Basic reboot requested, press 'y' to engage or any key to clear");
  811. break;
  812. case 'M':
  813. case 'm':
  814. mass_storage_reboot_keyed = true;
  815. basic_reboot_keyed = uf2_reboot_keyed = false;
  816. logmsg("Boot into mass storage requested, press 'y' to engage or any key to clear");
  817. *scratch0 = REBOOT_INTO_MASS_STORAGE_MAGIC_NUM;
  818. break;
  819. case 'B':
  820. case 'b':
  821. uf2_reboot_keyed = true;
  822. basic_reboot_keyed = mass_storage_reboot_keyed = false;
  823. logmsg("Boot into uf2 bootloader requested, press 'y' to engage or any key to clear");
  824. break;
  825. case 'd':
  826. case 'D':
  827. g_log_debug = !g_log_debug;
  828. logmsg("Debug logging ", g_log_debug ? "enabled" : "disabled");
  829. break;
  830. case 'H':
  831. case 'h':
  832. logmsg("Available commands:");
  833. logmsg(" r - Reboot");
  834. logmsg(" m - Reboot into mass storage mode");
  835. logmsg(" b - Reboot into uf2 bootloader");
  836. logmsg(" d - Toggle debug logging");
  837. logmsg(" h - Show this help message");
  838. break;
  839. case 'Y':
  840. case 'y':
  841. if (basic_reboot_keyed || mass_storage_reboot_keyed)
  842. {
  843. logmsg("Rebooting", mass_storage_reboot_keyed ? " into mass storage": "");
  844. watchdog_reboot(0, 0, 2000);
  845. } else if (uf2_reboot_keyed) {
  846. rom_reset_usb_boot(0, 0);
  847. }
  848. break;
  849. case '\n':
  850. break;
  851. default:
  852. if (basic_reboot_keyed || mass_storage_reboot_keyed || uf2_reboot_keyed)
  853. logmsg("Cleared reboot setting");
  854. mass_storage_reboot_keyed =basic_reboot_keyed = uf2_reboot_keyed = false;
  855. }
  856. }
  857. #endif // PIO_FRAMEWORK_ARDUINO_NO_USB
  858. }
  859. // Use ADC to implement supply voltage monitoring for the +3.0V rail.
  860. // This works by sampling the temperature sensor channel, which has
  861. // a voltage of 0.7 V, allowing to calculate the VDD voltage.
  862. static void adc_poll()
  863. {
  864. #if PLATFORM_VDD_WARNING_LIMIT_mV > 0
  865. static bool initialized = false;
  866. static bool adc_initial_logged = false;
  867. static int lowest_vdd_seen = PLATFORM_VDD_WARNING_LIMIT_mV;
  868. if (!initialized)
  869. {
  870. adc_init();
  871. adc_set_temp_sensor_enabled(true);
  872. adc_set_clkdiv(65535); // Lowest samplerate, about 2 kHz
  873. #ifdef BLUESCSI_BLASTER
  874. adc_select_input(8);
  875. #else
  876. adc_select_input(4);
  877. #endif
  878. adc_fifo_setup(true, false, 0, false, false);
  879. adc_run(true);
  880. initialized = true;
  881. }
  882. #ifdef ENABLE_AUDIO_OUTPUT_SPDIF
  883. /*
  884. * If ADC sample reads are done, either via direct reading, FIFO, or DMA,
  885. * at the same time a SPI DMA write begins, it appears that the first
  886. * 16-bit word of the DMA data is lost. This causes the bitstream to glitch
  887. * and audio to 'pop' noticably. For now, just disable ADC reads when audio
  888. * is playing.
  889. */
  890. if (audio_is_active()) return;
  891. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  892. int adc_value_max = 0;
  893. while (!adc_fifo_is_empty())
  894. {
  895. int adc_value = adc_fifo_get();
  896. if (adc_value > adc_value_max) adc_value_max = adc_value;
  897. }
  898. // adc_value = 700mV * 4096 / Vdd
  899. // => Vdd = 700mV * 4096 / adc_value
  900. // To avoid wasting time on division, compare against
  901. // limit directly.
  902. const int limit = (700 * 4096) / PLATFORM_VDD_WARNING_LIMIT_mV;
  903. if (adc_value_max > limit)
  904. {
  905. // Warn once, and then again if we detect even a lower drop.
  906. int vdd_mV = (700 * 4096) / adc_value_max;
  907. if (vdd_mV < lowest_vdd_seen)
  908. {
  909. logmsg("WARNING: Detected supply voltage drop to ", vdd_mV, "mV. Verify power supply is adequate.");
  910. lowest_vdd_seen = vdd_mV - 50; // Small hysteresis to avoid excessive warnings
  911. }
  912. }
  913. else if (!adc_initial_logged && adc_value_max != 0)
  914. {
  915. adc_initial_logged = true;
  916. int vdd_mV = (700 * 4096) / adc_value_max;
  917. logmsg("INFO: Pico Voltage: ", (vdd_mV / 1000.0), "V.");
  918. }
  919. #endif // PLATFORM_VDD_WARNING_LIMIT_mV > 0
  920. }
  921. // This function is called for every log message.
  922. void platform_log(const char *s)
  923. {
  924. if (g_uart_initialized)
  925. {
  926. uart_puts(uart0, s);
  927. }
  928. }
  929. static int g_watchdog_timeout;
  930. static bool g_watchdog_initialized;
  931. static void watchdog_callback(unsigned alarm_num)
  932. {
  933. g_watchdog_timeout -= 1000;
  934. if (g_watchdog_timeout < WATCHDOG_CRASH_TIMEOUT - 1000)
  935. {
  936. // Been stuck for at least a second, start dumping USB log
  937. usb_log_poll();
  938. }
  939. if (g_watchdog_timeout <= WATCHDOG_CRASH_TIMEOUT - WATCHDOG_BUS_RESET_TIMEOUT)
  940. {
  941. if (!scsiDev.resetFlag || !g_scsiHostPhyReset)
  942. {
  943. logmsg("--------------");
  944. logmsg("WATCHDOG TIMEOUT, attempting bus reset");
  945. logmsg("Platform: ", g_platform_name);
  946. logmsg("FW Version: ", g_log_firmwareversion);
  947. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  948. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  949. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  950. scsi_accel_log_state();
  951. uint32_t msp;
  952. asm volatile ("MRS %0, msp" : "=r" (msp) );
  953. uint32_t *p = (uint32_t*)msp;
  954. for (int i = 0; i < 8; i++)
  955. {
  956. if (p == &__StackTop) break; // End of stack
  957. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  958. p += 4;
  959. }
  960. scsiDev.resetFlag = 1;
  961. g_scsiHostPhyReset = true;
  962. }
  963. if (g_watchdog_timeout <= 0)
  964. {
  965. logmsg("--------------");
  966. logmsg("WATCHDOG TIMEOUT, already attempted bus reset, rebooting");
  967. logmsg("Platform: ", g_platform_name);
  968. logmsg("FW Version: ", g_log_firmwareversion);
  969. logmsg("GPIO states: out ", sio_hw->gpio_out, " oe ", sio_hw->gpio_oe, " in ", sio_hw->gpio_in);
  970. logmsg("scsiDev.cdb: ", bytearray(scsiDev.cdb, 12));
  971. logmsg("scsiDev.phase: ", (int)scsiDev.phase);
  972. uint32_t msp;
  973. asm volatile ("MRS %0, msp" : "=r" (msp) );
  974. uint32_t *p = (uint32_t*)msp;
  975. for (int i = 0; i < 8; i++)
  976. {
  977. if (p == &__StackTop) break; // End of stack
  978. logmsg("STACK ", (uint32_t)p, ": ", p[0], " ", p[1], " ", p[2], " ", p[3]);
  979. p += 4;
  980. }
  981. usb_log_poll();
  982. platform_emergency_log_save();
  983. platform_boot_to_main_firmware();
  984. }
  985. }
  986. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  987. }
  988. // This function can be used to periodically reset watchdog timer for crash handling.
  989. // It can also be left empty if the platform does not use a watchdog timer.
  990. void platform_reset_watchdog()
  991. {
  992. g_watchdog_timeout = WATCHDOG_CRASH_TIMEOUT;
  993. if (!g_watchdog_initialized)
  994. {
  995. int alarm_num = -1;
  996. for (int i = 0; i < NUM_GENERIC_TIMERS; i++)
  997. {
  998. if (!hardware_alarm_is_claimed(i))
  999. {
  1000. alarm_num = i;
  1001. break;
  1002. }
  1003. }
  1004. if (alarm_num == -1)
  1005. {
  1006. logmsg("No free watchdog hardware alarms to claim");
  1007. return;
  1008. }
  1009. hardware_alarm_claim(alarm_num);
  1010. hardware_alarm_set_callback(alarm_num, &watchdog_callback);
  1011. hardware_alarm_set_target(alarm_num, delayed_by_ms(get_absolute_time(), 1000));
  1012. g_watchdog_initialized = true;
  1013. }
  1014. // USB log is polled here also to make sure any log messages in fault states
  1015. // get passed to USB.
  1016. usb_log_poll();
  1017. }
  1018. // Poll function that is called every few milliseconds.
  1019. // Can be left empty or used for platform-specific processing.
  1020. void platform_poll()
  1021. {
  1022. usb_input_poll();
  1023. usb_log_poll();
  1024. adc_poll();
  1025. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF) || defined(ENABLE_AUDIO_OUTPUT_I2S)
  1026. audio_poll();
  1027. #endif // ENABLE_AUDIO_OUTPUT_SPDIF
  1028. }
  1029. void platform_reset_mcu()
  1030. {
  1031. watchdog_reboot(0, 0, 2000);
  1032. }
  1033. bool platform_has_i2c() {
  1034. return is2023a;
  1035. }
  1036. bool disable_i2c = false;
  1037. void platform_disable_i2c() {
  1038. gpio_conf(GPIO_I2C_SCL, GPIO_FUNC_SIO, true, false, false, false, false);
  1039. gpio_conf(GPIO_I2C_SDA, GPIO_FUNC_SIO, true, false, false, false, false);
  1040. disable_i2c = true;
  1041. }
  1042. uint8_t platform_get_buttons()
  1043. {
  1044. uint8_t buttons = 0;
  1045. #if defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  1046. // pulled to VCC via resistor, sinking when pressed
  1047. if (!gpio_get(GPIO_EXP_SPARE)) buttons |= 1;
  1048. #elif defined(GPIO_I2C_SDA)
  1049. // SDA = button 1, SCL = button 2
  1050. // if (!gpio_get(GPIO_I2C_SDA)) buttons |= 1;
  1051. // if (!gpio_get(GPIO_I2C_SCL)) buttons |= 2;
  1052. #endif // defined(ENABLE_AUDIO_OUTPUT_SPDIF)
  1053. if (!is2023a) { // Pre-2023a boards have buttons on GPIO pins labeled SW1 and SW2
  1054. if (!gpio_get(BUTTON_SW1_PRE202309a)) buttons |= 1;
  1055. if (!gpio_get(BUTTON_SW2_PRE202309a)) buttons |= 2;
  1056. } else if (disable_i2c) // User wants simple buttons instead of an i2c panel
  1057. {
  1058. if (!gpio_get(GPIO_I2C_SCL)) buttons |= 1;
  1059. if (!gpio_get(GPIO_I2C_SDA)) buttons |= 2;
  1060. }
  1061. static uint8_t debounced_state = 0;
  1062. static uint8_t last_state = 0;
  1063. static uint32_t last_debounce_time = 0;
  1064. if (buttons != last_state) {
  1065. last_debounce_time = millis();
  1066. }
  1067. if ((millis() - last_debounce_time) > 50) { // 50ms debounce
  1068. debounced_state = buttons;
  1069. }
  1070. last_state = buttons;
  1071. return debounced_state;
  1072. }
  1073. bool platform_has_phy_eject_button()
  1074. {
  1075. // 2023a and later boards have i2c buttons
  1076. return !is2023a || (is2023a && disable_i2c);
  1077. }
  1078. /************************************/
  1079. /* ROM drive in extra flash space */
  1080. /************************************/
  1081. #ifdef PLATFORM_HAS_ROM_DRIVE
  1082. # ifndef ROMDRIVE_OFFSET
  1083. // Reserve up to 352 kB for firmware by default.
  1084. #define ROMDRIVE_OFFSET (352 * 1024)
  1085. # endif
  1086. uint32_t platform_get_romdrive_maxsize()
  1087. {
  1088. if (g_flash_chip_size >= ROMDRIVE_OFFSET)
  1089. {
  1090. return g_flash_chip_size - ROMDRIVE_OFFSET;
  1091. }
  1092. else
  1093. {
  1094. // Failed to read flash chip size, default to 2 MB
  1095. return 2048 * 1024 - ROMDRIVE_OFFSET;
  1096. }
  1097. }
  1098. bool platform_read_romdrive(uint8_t *dest, uint32_t start, uint32_t count)
  1099. {
  1100. xip_ctrl_hw->stream_ctr = 0;
  1101. while (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  1102. {
  1103. (void) xip_ctrl_hw->stream_fifo;
  1104. }
  1105. xip_ctrl_hw->stream_addr = start + ROMDRIVE_OFFSET;
  1106. xip_ctrl_hw->stream_ctr = count / 4;
  1107. // Transfer happens in multiples of 4 bytes
  1108. assert(start < platform_get_romdrive_maxsize());
  1109. assert((count & 3) == 0);
  1110. assert((((uint32_t)dest) & 3) == 0);
  1111. uint32_t *dest32 = (uint32_t*)dest;
  1112. uint32_t words_remain = count / 4;
  1113. while (words_remain > 0)
  1114. {
  1115. if (!(xip_ctrl_hw->stat & XIP_STAT_FIFO_EMPTY))
  1116. {
  1117. *dest32++ = xip_ctrl_hw->stream_fifo;
  1118. words_remain--;
  1119. }
  1120. }
  1121. return true;
  1122. }
  1123. bool platform_write_romdrive(const uint8_t *data, uint32_t start, uint32_t count)
  1124. {
  1125. assert(start < platform_get_romdrive_maxsize());
  1126. assert((count % PLATFORM_ROMDRIVE_PAGE_SIZE) == 0);
  1127. uint32_t saved_irq = save_and_disable_interrupts();
  1128. flash_range_erase(start + ROMDRIVE_OFFSET, count);
  1129. flash_range_program(start + ROMDRIVE_OFFSET, data, count);
  1130. restore_interrupts(saved_irq);
  1131. return true;
  1132. }
  1133. #endif // PLATFORM_HAS_ROM_DRIVE
  1134. /**********************************************/
  1135. /* Mapping from data bytes to GPIO BOP values */
  1136. /**********************************************/
  1137. /* A lookup table is the fastest way to calculate parity and convert the IO pin mapping for data bus.
  1138. * For RP2040 we expect that the bits are consecutive and in order.
  1139. * The PIO-based parity scheme also requires that the lookup table is aligned to 512-byte increment.
  1140. * The parity table is placed into SRAM4 area to reduce bus contention.
  1141. */
  1142. #define PARITY(n) ((1 ^ (n) ^ ((n)>>1) ^ ((n)>>2) ^ ((n)>>3) ^ ((n)>>4) ^ ((n)>>5) ^ ((n)>>6) ^ ((n)>>7)) & 1)
  1143. #ifdef BLUESCSI_BLASTER
  1144. # define X(n) (\
  1145. ((n & 0x01) ? 0 : (1 << 0)) | \
  1146. ((n & 0x02) ? 0 : (1 << 1)) | \
  1147. ((n & 0x04) ? 0 : (1 << 2)) | \
  1148. ((n & 0x08) ? 0 : (1 << 3)) | \
  1149. ((n & 0x10) ? 0 : (1 << 4)) | \
  1150. ((n & 0x20) ? 0 : (1 << 5)) | \
  1151. ((n & 0x40) ? 0 : (1 << 6)) | \
  1152. ((n & 0x80) ? 0 : (1 << 7)) | \
  1153. (PARITY(n) ? 0 : (1 << 8)) \
  1154. )
  1155. #else
  1156. # define X(n) (\
  1157. ((n & 0x01) ? 0 : (1 << SCSI_IO_DB0)) | \
  1158. ((n & 0x02) ? 0 : (1 << SCSI_IO_DB1)) | \
  1159. ((n & 0x04) ? 0 : (1 << SCSI_IO_DB2)) | \
  1160. ((n & 0x08) ? 0 : (1 << SCSI_IO_DB3)) | \
  1161. ((n & 0x10) ? 0 : (1 << SCSI_IO_DB4)) | \
  1162. ((n & 0x20) ? 0 : (1 << SCSI_IO_DB5)) | \
  1163. ((n & 0x40) ? 0 : (1 << SCSI_IO_DB6)) | \
  1164. ((n & 0x80) ? 0 : (1 << SCSI_IO_DB7)) | \
  1165. (PARITY(n) ? 0 : (1 << SCSI_IO_DBP)) \
  1166. )
  1167. #endif
  1168. const uint16_t g_scsi_parity_lookup[256] __attribute__((aligned(512), section(".scratch_x.parity"))) =
  1169. {
  1170. X(0x00), X(0x01), X(0x02), X(0x03), X(0x04), X(0x05), X(0x06), X(0x07), X(0x08), X(0x09), X(0x0a), X(0x0b), X(0x0c), X(0x0d), X(0x0e), X(0x0f),
  1171. X(0x10), X(0x11), X(0x12), X(0x13), X(0x14), X(0x15), X(0x16), X(0x17), X(0x18), X(0x19), X(0x1a), X(0x1b), X(0x1c), X(0x1d), X(0x1e), X(0x1f),
  1172. X(0x20), X(0x21), X(0x22), X(0x23), X(0x24), X(0x25), X(0x26), X(0x27), X(0x28), X(0x29), X(0x2a), X(0x2b), X(0x2c), X(0x2d), X(0x2e), X(0x2f),
  1173. X(0x30), X(0x31), X(0x32), X(0x33), X(0x34), X(0x35), X(0x36), X(0x37), X(0x38), X(0x39), X(0x3a), X(0x3b), X(0x3c), X(0x3d), X(0x3e), X(0x3f),
  1174. X(0x40), X(0x41), X(0x42), X(0x43), X(0x44), X(0x45), X(0x46), X(0x47), X(0x48), X(0x49), X(0x4a), X(0x4b), X(0x4c), X(0x4d), X(0x4e), X(0x4f),
  1175. X(0x50), X(0x51), X(0x52), X(0x53), X(0x54), X(0x55), X(0x56), X(0x57), X(0x58), X(0x59), X(0x5a), X(0x5b), X(0x5c), X(0x5d), X(0x5e), X(0x5f),
  1176. X(0x60), X(0x61), X(0x62), X(0x63), X(0x64), X(0x65), X(0x66), X(0x67), X(0x68), X(0x69), X(0x6a), X(0x6b), X(0x6c), X(0x6d), X(0x6e), X(0x6f),
  1177. X(0x70), X(0x71), X(0x72), X(0x73), X(0x74), X(0x75), X(0x76), X(0x77), X(0x78), X(0x79), X(0x7a), X(0x7b), X(0x7c), X(0x7d), X(0x7e), X(0x7f),
  1178. X(0x80), X(0x81), X(0x82), X(0x83), X(0x84), X(0x85), X(0x86), X(0x87), X(0x88), X(0x89), X(0x8a), X(0x8b), X(0x8c), X(0x8d), X(0x8e), X(0x8f),
  1179. X(0x90), X(0x91), X(0x92), X(0x93), X(0x94), X(0x95), X(0x96), X(0x97), X(0x98), X(0x99), X(0x9a), X(0x9b), X(0x9c), X(0x9d), X(0x9e), X(0x9f),
  1180. X(0xa0), X(0xa1), X(0xa2), X(0xa3), X(0xa4), X(0xa5), X(0xa6), X(0xa7), X(0xa8), X(0xa9), X(0xaa), X(0xab), X(0xac), X(0xad), X(0xae), X(0xaf),
  1181. X(0xb0), X(0xb1), X(0xb2), X(0xb3), X(0xb4), X(0xb5), X(0xb6), X(0xb7), X(0xb8), X(0xb9), X(0xba), X(0xbb), X(0xbc), X(0xbd), X(0xbe), X(0xbf),
  1182. X(0xc0), X(0xc1), X(0xc2), X(0xc3), X(0xc4), X(0xc5), X(0xc6), X(0xc7), X(0xc8), X(0xc9), X(0xca), X(0xcb), X(0xcc), X(0xcd), X(0xce), X(0xcf),
  1183. X(0xd0), X(0xd1), X(0xd2), X(0xd3), X(0xd4), X(0xd5), X(0xd6), X(0xd7), X(0xd8), X(0xd9), X(0xda), X(0xdb), X(0xdc), X(0xdd), X(0xde), X(0xdf),
  1184. X(0xe0), X(0xe1), X(0xe2), X(0xe3), X(0xe4), X(0xe5), X(0xe6), X(0xe7), X(0xe8), X(0xe9), X(0xea), X(0xeb), X(0xec), X(0xed), X(0xee), X(0xef),
  1185. X(0xf0), X(0xf1), X(0xf2), X(0xf3), X(0xf4), X(0xf5), X(0xf6), X(0xf7), X(0xf8), X(0xf9), X(0xfa), X(0xfb), X(0xfc), X(0xfd), X(0xfe), X(0xff)
  1186. };
  1187. #undef X
  1188. /* Similarly, another lookup table is used to verify parity of received data.
  1189. * This table is indexed by the 8 data bits + 1 parity bit from SCSI bus (active low)
  1190. * Each word contains the data byte (inverted to active-high) and a bit indicating whether parity is valid.
  1191. */
  1192. #define X(n) (\
  1193. ((n & 0xFF) ^ 0xFF) | \
  1194. (((PARITY(n & 0xFF) ^ (n >> 8)) & 1) << 8) \
  1195. )
  1196. const uint16_t g_scsi_parity_check_lookup[512] __attribute__((aligned(1024), section(".scratch_x.parity"))) =
  1197. {
  1198. X(0x000), X(0x001), X(0x002), X(0x003), X(0x004), X(0x005), X(0x006), X(0x007), X(0x008), X(0x009), X(0x00a), X(0x00b), X(0x00c), X(0x00d), X(0x00e), X(0x00f),
  1199. X(0x010), X(0x011), X(0x012), X(0x013), X(0x014), X(0x015), X(0x016), X(0x017), X(0x018), X(0x019), X(0x01a), X(0x01b), X(0x01c), X(0x01d), X(0x01e), X(0x01f),
  1200. X(0x020), X(0x021), X(0x022), X(0x023), X(0x024), X(0x025), X(0x026), X(0x027), X(0x028), X(0x029), X(0x02a), X(0x02b), X(0x02c), X(0x02d), X(0x02e), X(0x02f),
  1201. X(0x030), X(0x031), X(0x032), X(0x033), X(0x034), X(0x035), X(0x036), X(0x037), X(0x038), X(0x039), X(0x03a), X(0x03b), X(0x03c), X(0x03d), X(0x03e), X(0x03f),
  1202. X(0x040), X(0x041), X(0x042), X(0x043), X(0x044), X(0x045), X(0x046), X(0x047), X(0x048), X(0x049), X(0x04a), X(0x04b), X(0x04c), X(0x04d), X(0x04e), X(0x04f),
  1203. X(0x050), X(0x051), X(0x052), X(0x053), X(0x054), X(0x055), X(0x056), X(0x057), X(0x058), X(0x059), X(0x05a), X(0x05b), X(0x05c), X(0x05d), X(0x05e), X(0x05f),
  1204. X(0x060), X(0x061), X(0x062), X(0x063), X(0x064), X(0x065), X(0x066), X(0x067), X(0x068), X(0x069), X(0x06a), X(0x06b), X(0x06c), X(0x06d), X(0x06e), X(0x06f),
  1205. X(0x070), X(0x071), X(0x072), X(0x073), X(0x074), X(0x075), X(0x076), X(0x077), X(0x078), X(0x079), X(0x07a), X(0x07b), X(0x07c), X(0x07d), X(0x07e), X(0x07f),
  1206. X(0x080), X(0x081), X(0x082), X(0x083), X(0x084), X(0x085), X(0x086), X(0x087), X(0x088), X(0x089), X(0x08a), X(0x08b), X(0x08c), X(0x08d), X(0x08e), X(0x08f),
  1207. X(0x090), X(0x091), X(0x092), X(0x093), X(0x094), X(0x095), X(0x096), X(0x097), X(0x098), X(0x099), X(0x09a), X(0x09b), X(0x09c), X(0x09d), X(0x09e), X(0x09f),
  1208. X(0x0a0), X(0x0a1), X(0x0a2), X(0x0a3), X(0x0a4), X(0x0a5), X(0x0a6), X(0x0a7), X(0x0a8), X(0x0a9), X(0x0aa), X(0x0ab), X(0x0ac), X(0x0ad), X(0x0ae), X(0x0af),
  1209. X(0x0b0), X(0x0b1), X(0x0b2), X(0x0b3), X(0x0b4), X(0x0b5), X(0x0b6), X(0x0b7), X(0x0b8), X(0x0b9), X(0x0ba), X(0x0bb), X(0x0bc), X(0x0bd), X(0x0be), X(0x0bf),
  1210. X(0x0c0), X(0x0c1), X(0x0c2), X(0x0c3), X(0x0c4), X(0x0c5), X(0x0c6), X(0x0c7), X(0x0c8), X(0x0c9), X(0x0ca), X(0x0cb), X(0x0cc), X(0x0cd), X(0x0ce), X(0x0cf),
  1211. X(0x0d0), X(0x0d1), X(0x0d2), X(0x0d3), X(0x0d4), X(0x0d5), X(0x0d6), X(0x0d7), X(0x0d8), X(0x0d9), X(0x0da), X(0x0db), X(0x0dc), X(0x0dd), X(0x0de), X(0x0df),
  1212. X(0x0e0), X(0x0e1), X(0x0e2), X(0x0e3), X(0x0e4), X(0x0e5), X(0x0e6), X(0x0e7), X(0x0e8), X(0x0e9), X(0x0ea), X(0x0eb), X(0x0ec), X(0x0ed), X(0x0ee), X(0x0ef),
  1213. X(0x0f0), X(0x0f1), X(0x0f2), X(0x0f3), X(0x0f4), X(0x0f5), X(0x0f6), X(0x0f7), X(0x0f8), X(0x0f9), X(0x0fa), X(0x0fb), X(0x0fc), X(0x0fd), X(0x0fe), X(0x0ff),
  1214. X(0x100), X(0x101), X(0x102), X(0x103), X(0x104), X(0x105), X(0x106), X(0x107), X(0x108), X(0x109), X(0x10a), X(0x10b), X(0x10c), X(0x10d), X(0x10e), X(0x10f),
  1215. X(0x110), X(0x111), X(0x112), X(0x113), X(0x114), X(0x115), X(0x116), X(0x117), X(0x118), X(0x119), X(0x11a), X(0x11b), X(0x11c), X(0x11d), X(0x11e), X(0x11f),
  1216. X(0x120), X(0x121), X(0x122), X(0x123), X(0x124), X(0x125), X(0x126), X(0x127), X(0x128), X(0x129), X(0x12a), X(0x12b), X(0x12c), X(0x12d), X(0x12e), X(0x12f),
  1217. X(0x130), X(0x131), X(0x132), X(0x133), X(0x134), X(0x135), X(0x136), X(0x137), X(0x138), X(0x139), X(0x13a), X(0x13b), X(0x13c), X(0x13d), X(0x13e), X(0x13f),
  1218. X(0x140), X(0x141), X(0x142), X(0x143), X(0x144), X(0x145), X(0x146), X(0x147), X(0x148), X(0x149), X(0x14a), X(0x14b), X(0x14c), X(0x14d), X(0x14e), X(0x14f),
  1219. X(0x150), X(0x151), X(0x152), X(0x153), X(0x154), X(0x155), X(0x156), X(0x157), X(0x158), X(0x159), X(0x15a), X(0x15b), X(0x15c), X(0x15d), X(0x15e), X(0x15f),
  1220. X(0x160), X(0x161), X(0x162), X(0x163), X(0x164), X(0x165), X(0x166), X(0x167), X(0x168), X(0x169), X(0x16a), X(0x16b), X(0x16c), X(0x16d), X(0x16e), X(0x16f),
  1221. X(0x170), X(0x171), X(0x172), X(0x173), X(0x174), X(0x175), X(0x176), X(0x177), X(0x178), X(0x179), X(0x17a), X(0x17b), X(0x17c), X(0x17d), X(0x17e), X(0x17f),
  1222. X(0x180), X(0x181), X(0x182), X(0x183), X(0x184), X(0x185), X(0x186), X(0x187), X(0x188), X(0x189), X(0x18a), X(0x18b), X(0x18c), X(0x18d), X(0x18e), X(0x18f),
  1223. X(0x190), X(0x191), X(0x192), X(0x193), X(0x194), X(0x195), X(0x196), X(0x197), X(0x198), X(0x199), X(0x19a), X(0x19b), X(0x19c), X(0x19d), X(0x19e), X(0x19f),
  1224. X(0x1a0), X(0x1a1), X(0x1a2), X(0x1a3), X(0x1a4), X(0x1a5), X(0x1a6), X(0x1a7), X(0x1a8), X(0x1a9), X(0x1aa), X(0x1ab), X(0x1ac), X(0x1ad), X(0x1ae), X(0x1af),
  1225. X(0x1b0), X(0x1b1), X(0x1b2), X(0x1b3), X(0x1b4), X(0x1b5), X(0x1b6), X(0x1b7), X(0x1b8), X(0x1b9), X(0x1ba), X(0x1bb), X(0x1bc), X(0x1bd), X(0x1be), X(0x1bf),
  1226. X(0x1c0), X(0x1c1), X(0x1c2), X(0x1c3), X(0x1c4), X(0x1c5), X(0x1c6), X(0x1c7), X(0x1c8), X(0x1c9), X(0x1ca), X(0x1cb), X(0x1cc), X(0x1cd), X(0x1ce), X(0x1cf),
  1227. X(0x1d0), X(0x1d1), X(0x1d2), X(0x1d3), X(0x1d4), X(0x1d5), X(0x1d6), X(0x1d7), X(0x1d8), X(0x1d9), X(0x1da), X(0x1db), X(0x1dc), X(0x1dd), X(0x1de), X(0x1df),
  1228. X(0x1e0), X(0x1e1), X(0x1e2), X(0x1e3), X(0x1e4), X(0x1e5), X(0x1e6), X(0x1e7), X(0x1e8), X(0x1e9), X(0x1ea), X(0x1eb), X(0x1ec), X(0x1ed), X(0x1ee), X(0x1ef),
  1229. X(0x1f0), X(0x1f1), X(0x1f2), X(0x1f3), X(0x1f4), X(0x1f5), X(0x1f6), X(0x1f7), X(0x1f8), X(0x1f9), X(0x1fa), X(0x1fb), X(0x1fc), X(0x1fd), X(0x1fe), X(0x1ff),
  1230. };
  1231. #undef X
  1232. } /* extern "C" */
  1233. #ifdef SD_USE_SDIO
  1234. // These functions are not used for SDIO mode but are needed to avoid build error.
  1235. void sdCsInit(SdCsPin_t pin) {}
  1236. void sdCsWrite(SdCsPin_t pin, bool level) {}
  1237. // SDIO configuration for main program
  1238. SdioConfig g_sd_sdio_config(DMA_SDIO);
  1239. #ifdef SD_USE_RP2350_SDIO
  1240. void platform_set_sd_callback(sd_callback_t func, const uint8_t *buffer)
  1241. {
  1242. rp2350_sdio_sdfat_set_callback(func, buffer);
  1243. }
  1244. #endif
  1245. #endif