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- ; RP2040 PIO program for accelerating SCSI communication
- ;
- ; Copyright (c) 2022 Rabbit Hole Computing™
- ;
- ; Run "pioasm scsi_accel.pio scsi_accel.pio.h" to regenerate the C header from this.
- ; GPIO mapping:
- ; - 0-7: DB0-DB7
- ; - 8: DBP
- ; Side set is REQ pin
- .define REQ 19 ; was 17
- .define ACK 26 ; was 10
- ; Delay from data setup to REQ assertion.
- ; deskew delay + cable skew delay = 55 ns minimum
- ; One clock cycle is 8 ns => delay 7 clocks
- .define REQ_DLY 7
- ; Adds parity to data that is to be written to SCSI
- ; This works by generating addresses for DMA to fetch data from.
- ; Register X should be initialized to the base address of the lookup table.
- .program scsi_parity
- pull block
- in NULL, 1
- in OSR, 8
- in X, 23
- ; Write to SCSI bus using asynchronous handshake.
- ; Data is written as 32-bit words that contain the 8 data bits + 1 parity bit.
- ; 23 bits in each word are discarded.
- ; Number of bytes to send must be multiple of 2.
- .program scsi_accel_async_write
- .side_set 1
- pull ifempty block side 1 ; Get data from TX FIFO
- out pins, 9 side 1 ; Write data and parity bit
- out null, 23 [REQ_DLY-2] side 1 ; Discard unused bits, wait for data preset time
- wait 1 gpio ACK side 1 ; Wait for ACK to be inactive
- wait 0 gpio ACK side 0 ; Assert REQ, wait for ACK low
- ; Read from SCSI bus using sync or async handshake.
- ; Data is returned as 32-bit words:
- ; - bit 0: always zero
- ; - bits 1-8: data byte
- ; - bit 9: parity bit
- ; - bits 10-31: lookup table address
- ; Lookup table address should be loaded into register Y.
- ; One dummy word should be written to TX fifo for every byte to receive.
- .program scsi_accel_read
- .side_set 1
- pull block side 1 ; Pull from TX fifo for counting bytes and pacing sync mode
- wait 1 gpio ACK side 1 ; Wait for ACK high
- in null, 1 side 0 ; Zero bit because lookup table entries are 16-bit
- wait 0 gpio ACK side 0 ; Assert REQ, wait for ACK low
- in pins, 9 side 1 ; Deassert REQ, read GPIO
- in y, 22 side 1 ; Copy parity lookup table address
- ; Data state machine for synchronous writes.
- ; Takes the lowest 9 bits of each 32 bit word and writes them to bus with REQ pulse.
- ; The delay times will be rewritten by C code to match the negotiated SCSI sync speed.
- ;
- ; Shifts one bit to ISR per every byte transmitted. This is used to control the transfer
- ; pace, the RX fifo acts as a counter to keep track of unacknowledged bytes. The C code
- ; can set the syncOffset by changing autopush threshold, e.g. threshold 3 = 12 bytes offset.
- .program scsi_sync_write
- .side_set 1
- out pins, 9 [0] side 1 ; Write data and parity bit, wait for deskew delay
- out null, 23 [0] side 0 ; Assert REQ, wait for assert time
- in null, 1 [0] side 1 ; Deassert REQ, wait for transfer period, wait for space in ACK buffer
- ; Data pacing state machine for synchronous writes.
- ; Takes one bit from ISR on every falling edge of ACK.
- ; The C code should set autopull threshold to match scsi_sync_write autopush threshold.
- ; System DMA will then move words from scsi_sync_write RX fifo to scsi_sync_write_pacer TX fifo.
- .program scsi_sync_write_pacer
- wait 1 gpio ACK
- wait 0 gpio ACK ; Wait for falling edge on ACK
- out null, 1 ; Let scsi_sync_write send one more byte
- ; Data pacing state machine for synchronous reads.
- ; The delay times will be rewritten by C code to match the negotiated SCSI sync speed.
- ; Number of bytes to receive minus one should be loaded into register X.
- ; In synchronous mode this generates the REQ pulses and dummy words.
- ; In asynchronous mode it just generates dummy words to feed to scsi_accel_read.
- .program scsi_sync_read_pacer
- .side_set 1
- start:
- push block [0] side 1 ; Send dummy word to scsi_accel_read, wait for transfer period
- jmp x-- start [0] side 0 ; Assert REQ, wait for assert time
- finish:
- jmp finish [0] side 1
- ; Parity checker for reads from SCSI bus.
- ; Receives 16-bit words from g_scsi_parity_check_lookup
- ; Bottom 8 bits are the data byte, which is passed to output FIFO
- ; The 9th bit is parity valid bit, which is 1 for valid and 0 for parity error.
- .program scsi_read_parity
- parity_valid:
- out isr, 8 ; Take the 8 data bits for passing to RX fifo
- push block ; Push the data to RX fifo
- out x, 24 ; Take the parity valid bit, and the rest of 32-bit word
- jmp x-- parity_valid ; If parity valid bit is 1, repeat from start
- irq set 0 ; Parity error, set interrupt flag
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