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+/*
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+ * blinky.c
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+ *
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+ * LED blink test to validate STM32F103C8 chips. This test will find
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+ * remarked and cloned low-density devices with less than 20kB RAM,
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+ * and/or missing timer TIM4.
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+ *
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+ * Tests are applied in the following order:
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+ * 1. If TIM4 is missing, the onboard LED (pin B12 or C13) will not light.
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+ * 2. If there is not at least 20kB SRAM, the onboard LED will remain light.
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+ * 3. If TIM4 and >=20kB SRAM are both present, the LED will blink at 2Hz.
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+ *
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+ * As the LED blinks, a character is written to USART1 at 9600 baud (8n1).
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+ *
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+ * Written & released by Keir Fraser <keir.xen@gmail.com>
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+ *
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+ * This is free and unencumbered software released into the public domain.
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+ * See the file COPYING for more details, or visit <http://unlicense.org>.
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+ */
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+
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+int EXC_reset(void) __attribute__((alias("main")));
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+
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+void IRQ_30(void) __attribute__((alias("IRQ_tim4")));
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+#define IRQ_TIM4 30
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+
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+#ifndef NDEBUG
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+/* Keep the linker happy. */
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+int printk(const char *format, ...) { return 0; }
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+#endif
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+
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+static void IRQ_tim4(void)
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+{
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+ static bool_t x;
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+
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+ /* Quiesce the IRQ source. */
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+ tim4->sr = 0;
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+
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+ /* Blink the LED. */
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+ gpio_write_pin(gpiob, 12, x);
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+ gpio_write_pin(gpioc, 13, x);
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+ x ^= 1;
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+
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+ /* Write to the serial line. */
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+ usart1->dr = '.';
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+}
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+
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+/* Pseudorandom LFSR. */
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+static uint32_t srand = 0x87a2263c;
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+static uint32_t rand(void)
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+{
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+ uint32_t x = srand;
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+ x ^= x << 13;
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+ x ^= x >> 17;
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+ x ^= x << 5;
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+ srand = x;
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+ return x;
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+}
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+
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+int main(void)
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+{
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+ /* Relocate DATA. Initialise BSS. */
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+ if (_sdat != _ldat)
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+ memcpy(_sdat, _ldat, _edat-_sdat);
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+ memset(_sbss, 0, _ebss-_sbss);
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+
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+ stm32_init();
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+
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+ /* Configure USART1: 9600,8n1. */
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+ rcc->apb2enr |= RCC_APB2ENR_USART1EN;
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+ gpio_configure_pin(gpioa, 9, AFO_pushpull(_10MHz));
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+ gpio_configure_pin(gpioa, 10, GPI_pull_up);
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+ usart1->brr = SYSCLK / 9600;
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+ usart1->cr1 = (USART_CR1_UE | USART_CR1_TE | USART_CR1_RE);
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+
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+ /* Configure LED pin(s). LED is connected to VDD. */
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+ gpio_configure_pin(gpiob, 12, GPO_opendrain(_2MHz, HIGH));
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+ gpio_configure_pin(gpioc, 13, GPO_opendrain(_2MHz, HIGH));
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+
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+ /* (Attempt to) Configure TIM4 to overflow at 2Hz. */
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+ tim4->psc = sysclk_us(100)-1;
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+ tim4->arr = 5000-1;
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+ tim4->dier = TIM_DIER_UIE;
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+ tim4->cr2 = 0;
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+ tim4->cr1 = TIM_CR1_URS | TIM_CR1_CEN;
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+
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+ /* Enable TIM4 IRQ, to be triggered at 2Hz. */
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+ IRQx_set_prio(IRQ_TIM4, TIMER_IRQ_PRI);
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+ IRQx_clear_pending(IRQ_TIM4);
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+ IRQx_enable(IRQ_TIM4);
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+
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+ /* Endlessly test SRAM by filling with pseudorandom junk and then
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+ * testing the values read back okay. */
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+ for (;;) {
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+ uint32_t *p = (uint32_t *)_ebss, sr = srand;
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+ while (p < (uint32_t *)(0x20000000 + 20*1024))
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+ *p++ = rand();
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+ srand = sr;
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+ p = (uint32_t *)_ebss;
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+ while (p < (uint32_t *)(0x20000000 + 20*1024))
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+ if (*p++ != rand())
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+ goto ram_fail;
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+ }
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+
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+ram_fail:
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+ /* On SRAM failure we light the LED(s) and hang. */
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+ IRQ_global_disable();
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+ gpio_write_pin(gpiob, 12, LOW);
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+ gpio_write_pin(gpioc, 13, LOW);
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+ for (;;) ;
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+
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+ return 0;
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+}
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+
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+/*
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+ * Local variables:
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+ * mode: C
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+ * c-file-style: "Linux"
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+ * c-basic-offset: 4
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+ * tab-width: 4
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+ * indent-tabs-mode: nil
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+ * End:
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+ */
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Keir Fraser