|  | @@ -3,12 +3,7 @@
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				|  |  |   * 
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				|  |  |   * LED blink test to validate STM32F103C8 chips. This test will find
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				|  |  |   * remarked and cloned low-density devices with less than 20kB RAM,
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				|  |  | - * and/or missing timer TIM4.
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				|  |  | - * 
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				|  |  | - * Tests are applied in the following order:
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				|  |  | - *  1. If TIM4 is missing, the onboard LED (pin B12 or C13) will not light.
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				|  |  | - *  2. If there is not at least 20kB SRAM, the onboard LED will remain light.
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				|  |  | - *  3. If TIM4 and >=20kB SRAM are both present, the LED will blink at 2Hz.
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				|  |  | + * less than 64kB Flash, and/or missing timers TIM1-4.
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				|  |  |   * 
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				|  |  |   * As the LED blinks, a character is written to USART1 at 9600 baud (8n1).
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				|  |  |   * 
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				|  | @@ -58,6 +53,9 @@ static uint32_t rand(void)
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				|  |  |  
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				|  |  |  int main(void)
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				|  |  |  {
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				|  |  | +    uint32_t fp, *p;
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				|  |  | +    int i;
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				|  |  | +
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				|  |  |      /* Relocate DATA. Initialise BSS. */
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				|  |  |      if (_sdat != _ldat)
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				|  |  |          memcpy(_sdat, _ldat, _edat-_sdat);
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				|  | @@ -76,7 +74,12 @@ int main(void)
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				|  |  |      gpio_configure_pin(gpiob, 12, GPO_opendrain(_2MHz, HIGH));
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				|  |  |      gpio_configure_pin(gpioc, 13, GPO_opendrain(_2MHz, HIGH));
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				|  |  |  
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				|  |  | -    /* (Attempt to) Configure TIM4 to overflow at 2Hz. */
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				|  |  | +    /* Touch TIM1 to TIM3, just see if they're there. */
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				|  |  | +    tim1->arr = tim2->arr = tim3->arr = 123;
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				|  |  | +    if ((tim1->arr != 123) || (tim2->arr != 123) | (tim3->arr != 123))
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				|  |  | +        goto fail;
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				|  |  | +
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				|  |  | +    /* Configure TIM4 to overflow at 2Hz. */
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				|  |  |      tim4->psc = sysclk_us(100)-1;
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				|  |  |      tim4->arr = 5000-1;
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				|  |  |      tim4->dier = TIM_DIER_UIE;
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				|  | @@ -88,6 +91,21 @@ int main(void)
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				|  |  |      IRQx_clear_pending(IRQ_TIM4);
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				|  |  |      IRQx_enable(IRQ_TIM4);
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				|  |  |  
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				|  |  | +    /* Erase and write the last page of Flash below 64kB. Check it reads 
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				|  |  | +     * back okay. */
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				|  |  | +    fpec_init();
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				|  |  | +    fp = (uint32_t)(_stext + 64*1024 - FLASH_PAGE_SIZE);
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				|  |  | +    fpec_page_erase(fp);
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				|  |  | +    memset(_ebss, 0xff, FLASH_PAGE_SIZE);
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				|  |  | +    if (memcmp((void *)fp, _ebss, FLASH_PAGE_SIZE))
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				|  |  | +        goto fail; /* didn't erase ok */
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				|  |  | +    p = (uint32_t *)_ebss;
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				|  |  | +    for (i = 0; i < FLASH_PAGE_SIZE/4; i++)
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				|  |  | +        *p++ = rand();
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				|  |  | +    fpec_write(_ebss, FLASH_PAGE_SIZE, fp);
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				|  |  | +    if (memcmp((void *)fp, _ebss, FLASH_PAGE_SIZE))
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				|  |  | +        goto fail; /* didn't write ok */
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				|  |  | +
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				|  |  |      /* Endlessly test SRAM by filling with pseudorandom junk and then 
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				|  |  |       * testing the values read back okay. */
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				|  |  |      for (;;) {
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				|  | @@ -98,10 +116,10 @@ int main(void)
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				|  |  |          p = (uint32_t *)_ebss;
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				|  |  |          while (p < (uint32_t *)(0x20000000 + 20*1024))
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				|  |  |              if (*p++ != rand())
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				|  |  | -                goto ram_fail;
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				|  |  | +                goto fail;
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				|  |  |      }
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				|  |  |  
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				|  |  | -ram_fail:
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				|  |  | +fail:
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				|  |  |      /* On SRAM failure we light the LED(s) and hang. */
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				|  |  |      IRQ_global_disable();
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				|  |  |      gpio_write_pin(gpiob, 12, LOW);
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