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@@ -559,6 +559,43 @@ struct usart {
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#define USB_OTG_FS_BASE 0x50000000
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#define USB_OTG_HS_BASE 0x40040000
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+/* USB High-Speed PHY Controller */
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+struct hsphyc {
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+ uint32_t pll1; /* +00: PLL1 control */
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+ uint32_t _0[2];
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+ uint32_t tune; /* +0C: Tuning control */
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+ uint32_t _1[2];
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+ uint32_t ldo; /* +18: LDO control and status */
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+};
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+
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+#define HSPHYC_PLL1_SEL(x) ((x)<<1)
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+#define HSPHYC_PLL1_EN (1u<< 0)
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+
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+#define HSPHYC_TUNE_SQLBYP (1u<<23)
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+#define HSPHYC_TUNE_SHTCCTCTLPROT (1u<<22)
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+#define HSPHYC_TUNE_HSRXOFF(x) ((x)<<20)
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+#define HSPHYC_TUNE_HSFALLPREEM (1u<<19)
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+#define HSPHYC_TUNE_STAGSEL (1u<<18)
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+#define HSPHYC_TUNE_HFRXGNEQEN (1u<<17)
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+#define HSPHYC_TUNE_SQLCHCTL(x) ((x)<<15)
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+#define HSPHYC_TUNE_HSDRVCHKZTRM(x) ((x)<<13)
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+#define HSPHYC_TUNE_HSDRVCHKITRIM(x) ((x)<< 9)
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+#define HSPHYC_TUNE_HSDRVRFRED (1u<< 8)
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+#define HSPHYC_TUNE_FSDRVRFADJ (1u<< 7)
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+#define HSPHYC_TUNE_HSDRVCURINGR (1u<< 6)
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+#define HSPHYC_TUNE_HSDRVDCLEV (1u<< 5)
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+#define HSPHYC_TUNE_HSDRVDCCUR (1u<< 4)
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+#define HSPHYC_TUNE_HSDRVSLEW (1u<< 3)
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+#define HSPHYC_TUNE_LFSCAPEN (1u<< 2)
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+#define HSPHYC_TUNE_INCURRINT (1u<< 1)
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+#define HSPHYC_TUNE_INCURREN (1u<< 0)
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+
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+#define HSPHYC_LDO_ENABLE (1u<< 2)
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+#define HSPHYC_LDO_STATUS (1u<< 1)
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+#define HSPHYC_LDO_USED (1u<< 0)
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+
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+#define HSPHYC_BASE 0x40017C00
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+
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/*
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* Local variables:
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* mode: C
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