Define AHB, APB1, APB2 bus speeds as numeric constants for all supported chips.

inc/mcu/at32/f4.h

@@ -69,9 +69,9 @@ void early_fatal(int blinks) __attribute__((noreturn));
 #define early_delay_us(us) (delay_ticks((us)*1))
 
 #define SYSCLK_MHZ 144
-#define AHB_MHZ (SYSCLK_MHZ / 1)  /* 144MHz */
-#define APB1_MHZ (SYSCLK_MHZ / 2) /* 72MHz */
-#define APB2_MHZ (SYSCLK_MHZ / 2) /* 72MHz */
+#define AHB_MHZ    144
+#define APB1_MHZ    72
+#define APB2_MHZ    72
 
 extern unsigned int FLASH_PAGE_SIZE;
 

inc/mcu/stm32/f1.h

@@ -54,7 +54,11 @@ static USART usart2 = (struct usart *)USART2_BASE;
 static USART usart3 = (struct usart *)USART3_BASE;
 static SER_ID ser_id = (uint32_t *)0x1ffff7e8;
 
-#define SYSCLK_MHZ 72
+#define SYSCLK_MHZ  72
+#define AHB_MHZ     72
+#define APB1_MHZ    36
+#define APB2_MHZ    72
+
 #define FLASH_PAGE_SIZE 1024
 
 /* No delay required after enabling a peripheral clock, before accessing it. */

inc/mcu/stm32/f7.h

@@ -74,9 +74,9 @@ static HSPHYC hsphyc = (struct hsphyc *)HSPHYC_BASE;
 static SER_ID ser_id = (uint32_t *)0x1ff07a10;
 
 #define SYSCLK_MHZ 216
-#define AHB_MHZ (SYSCLK_MHZ / 1)  /* 216MHz */
-#define APB1_MHZ (SYSCLK_MHZ / 4) /* 54MHz */
-#define APB2_MHZ (SYSCLK_MHZ / 2) /* 108MHz */
+#define AHB_MHZ    216
+#define APB1_MHZ    54
+#define APB2_MHZ   108
 
 #define FLASH_PAGE_SIZE 16384