floppy.c 34 KB

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  1. /*
  2. * floppy.c
  3. *
  4. * Floppy interface control.
  5. *
  6. * Written & released by Keir Fraser <keir.xen@gmail.com>
  7. *
  8. * This is free and unencumbered software released into the public domain.
  9. * See the file COPYING for more details, or visit <http://unlicense.org>.
  10. */
  11. #define m(bitnr) (1u<<(bitnr))
  12. #define get_index() gpio_read_pin(gpio_index, pin_index)
  13. #define get_trk0() gpio_read_pin(gpio_trk0, pin_trk0)
  14. #define get_wrprot() gpio_read_pin(gpio_wrprot, pin_wrprot)
  15. #define configure_pin(pin, type) \
  16. gpio_configure_pin(gpio_##pin, pin_##pin, type)
  17. #define SAMPLE_MHZ 72
  18. #define TIM_PSC (SYSCLK_MHZ / SAMPLE_MHZ)
  19. #define sample_ns(x) (((x) * SAMPLE_MHZ) / 1000)
  20. #define sample_us(x) ((x) * SAMPLE_MHZ)
  21. #define time_from_samples(x) ((x) * TIME_MHZ / SAMPLE_MHZ)
  22. #define write_pin(pin, level) \
  23. gpio_write_pin(gpio_##pin, pin_##pin, level ? O_TRUE : O_FALSE)
  24. static int bus_type = -1;
  25. static int unit_nr = -1;
  26. static struct {
  27. int cyl;
  28. bool_t motor;
  29. } unit[3];
  30. static struct gw_delay delay_params;
  31. static const struct gw_delay factory_delay_params = {
  32. .select_delay = 10,
  33. .step_delay = 5000,
  34. .seek_settle = 15,
  35. .motor_delay = 750,
  36. .auto_off = 10000
  37. };
  38. #if STM32F == 1
  39. #include "f1/floppy.c"
  40. #elif STM32F == 7
  41. #include "f7/floppy.c"
  42. #endif
  43. static struct index {
  44. /* Main code can reset this at will. */
  45. volatile unsigned int count;
  46. /* For synchronising index pulse reporting to the RDATA flux stream. */
  47. volatile unsigned int rdata_cnt;
  48. /* Last time at which ISR fired. */
  49. time_t isr_time;
  50. /* Timer structure for index_timer() calls. */
  51. struct timer timer;
  52. } index;
  53. /* Timer to clean up stale index.isr_time. */
  54. #define INDEX_TIMER_PERIOD time_ms(5000)
  55. static void index_timer(void *unused);
  56. /* A DMA buffer for running a timer associated with a floppy-data I/O pin. */
  57. static struct dma_ring {
  58. /* Indexes into the buf[] ring buffer. */
  59. uint16_t cons; /* dma_rd: our consumer index for flux samples */
  60. union {
  61. uint16_t prod; /* dma_wr: our producer index for flux samples */
  62. timcnt_t prev_sample; /* dma_rd: previous CCRx sample value */
  63. };
  64. /* DMA ring buffer of timer values (ARR or CCRx). */
  65. timcnt_t buf[512];
  66. } dma;
  67. static struct {
  68. time_t deadline;
  69. bool_t armed;
  70. } auto_off;
  71. /* Marshalling and unmarshalling of USB packets. */
  72. static struct {
  73. /* TRUE if a packet is ready: .data and .len are valid. */
  74. bool_t ready;
  75. /* Length and contents of the packet (if ready==TRUE). */
  76. unsigned int len;
  77. uint8_t data[USB_HS_MPS];
  78. } usb_packet;
  79. static enum {
  80. ST_inactive,
  81. ST_command_wait,
  82. ST_zlp,
  83. ST_read_flux,
  84. ST_read_flux_drain,
  85. ST_write_flux_wait_data,
  86. ST_write_flux_wait_index,
  87. ST_write_flux,
  88. ST_write_flux_drain,
  89. ST_erase_flux,
  90. ST_source_bytes,
  91. ST_sink_bytes,
  92. ST_update_bootloader,
  93. } floppy_state = ST_inactive;
  94. static uint32_t u_cons, u_prod;
  95. #define U_MASK(x) ((x)&(U_BUF_SZ-1))
  96. static void step_one_out(void)
  97. {
  98. write_pin(dir, FALSE);
  99. delay_us(10);
  100. write_pin(step, TRUE);
  101. delay_us(10);
  102. write_pin(step, FALSE);
  103. delay_us(delay_params.step_delay);
  104. }
  105. static void step_one_in(void)
  106. {
  107. write_pin(dir, TRUE);
  108. delay_us(10);
  109. write_pin(step, TRUE);
  110. delay_us(10);
  111. write_pin(step, FALSE);
  112. delay_us(delay_params.step_delay);
  113. }
  114. static void _set_bus_type(uint8_t type)
  115. {
  116. int i;
  117. bus_type = type;
  118. unit_nr = -1;
  119. for (i = 0; i < ARRAY_SIZE(unit); i++) {
  120. unit[i].cyl = -1;
  121. unit[i].motor = FALSE;
  122. }
  123. reset_bus();
  124. }
  125. static bool_t set_bus_type(uint8_t type)
  126. {
  127. if (type == bus_type)
  128. return TRUE;
  129. if (type > BUS_SHUGART)
  130. return FALSE;
  131. _set_bus_type(type);
  132. return TRUE;
  133. }
  134. static uint8_t floppy_seek(unsigned int cyl)
  135. {
  136. int cur_cyl;
  137. if (unit_nr < 0)
  138. return ACK_NO_UNIT;
  139. cur_cyl = unit[unit_nr].cyl;
  140. if ((cyl == 0) || (cur_cyl < 0)) {
  141. unsigned int i;
  142. for (i = 0; i < 256; i++) {
  143. if (get_trk0() == LOW)
  144. break;
  145. step_one_out();
  146. }
  147. cur_cyl = 0;
  148. if (get_trk0() == HIGH) {
  149. unit[unit_nr].cyl = -1;
  150. return ACK_NO_TRK0;
  151. }
  152. }
  153. if (cur_cyl < 0) {
  154. } else if (cur_cyl <= cyl) {
  155. unsigned int nr = cyl - cur_cyl;
  156. while (nr--)
  157. step_one_in();
  158. } else {
  159. unsigned int nr = cur_cyl - cyl;
  160. while (nr--)
  161. step_one_out();
  162. }
  163. delay_ms(delay_params.seek_settle);
  164. unit[unit_nr].cyl = cyl;
  165. return ACK_OKAY;
  166. }
  167. static void floppy_flux_end(void)
  168. {
  169. /* Turn off write pins. */
  170. write_pin(wgate, FALSE);
  171. configure_pin(wdata, GPO_bus);
  172. /* Turn off timers. */
  173. tim_rdata->ccer = 0;
  174. tim_rdata->cr1 = 0;
  175. tim_rdata->sr = 0; /* dummy, drains any pending DMA */
  176. tim_wdata->ccer = 0;
  177. tim_wdata->cr1 = 0;
  178. tim_wdata->sr = 0; /* dummy, drains any pending DMA */
  179. /* Turn off DMA. */
  180. dma_rdata.cr &= ~DMA_CR_EN;
  181. dma_wdata.cr &= ~DMA_CR_EN;
  182. while ((dma_rdata.cr & DMA_CR_EN) || (dma_wdata.cr & DMA_CR_EN))
  183. continue;
  184. }
  185. static void floppy_reset(void)
  186. {
  187. floppy_state = ST_inactive;
  188. auto_off.armed = FALSE;
  189. floppy_flux_end();
  190. drive_deselect();
  191. act_led(FALSE);
  192. }
  193. void floppy_init(void)
  194. {
  195. floppy_mcu_init();
  196. /* Output pins, unbuffered. */
  197. configure_pin(dir, GPO_bus);
  198. configure_pin(step, GPO_bus);
  199. configure_pin(wgate, GPO_bus);
  200. configure_pin(side, GPO_bus);
  201. configure_pin(wdata, GPO_bus);
  202. /* Input pins. */
  203. configure_pin(index, GPI_bus);
  204. configure_pin(trk0, GPI_bus);
  205. configure_pin(wrprot, GPI_bus);
  206. /* Configure INDEX-changed IRQs and timer. */
  207. timer_init(&index.timer, index_timer, NULL);
  208. index_timer(NULL);
  209. exti->rtsr = 0;
  210. exti->imr = exti->ftsr = m(pin_index);
  211. IRQx_set_prio(irq_index, INDEX_IRQ_PRI);
  212. IRQx_enable(irq_index);
  213. delay_params = factory_delay_params;
  214. _set_bus_type(BUS_NONE);
  215. }
  216. struct gw_info gw_info = {
  217. .is_main_firmware = 1,
  218. .max_cmd = CMD_MAX,
  219. .sample_freq = 72000000u,
  220. .hw_model = STM32F
  221. };
  222. static void auto_off_nudge(void)
  223. {
  224. auto_off.deadline = time_now() + time_ms(delay_params.auto_off);
  225. }
  226. static void auto_off_arm(void)
  227. {
  228. auto_off.armed = TRUE;
  229. auto_off_nudge();
  230. }
  231. static void floppy_end_command(void *ack, unsigned int ack_len)
  232. {
  233. auto_off_arm();
  234. usb_write(EP_TX, ack, ack_len);
  235. u_cons = u_prod = 0;
  236. if (floppy_state == ST_command_wait)
  237. act_led(FALSE);
  238. if (ack_len == usb_bulk_mps) {
  239. ASSERT(floppy_state == ST_command_wait);
  240. floppy_state = ST_zlp;
  241. }
  242. }
  243. /*
  244. * READ PATH
  245. */
  246. static struct {
  247. union {
  248. time_t start; /* read, write: Time at which read/write started. */
  249. time_t end; /* erase: Time at which to end the erasure. */
  250. };
  251. uint8_t status;
  252. uint8_t idx, nr_idx;
  253. bool_t write_finished;
  254. bool_t terminate_at_index;
  255. uint32_t astable_period;
  256. uint32_t ticks;
  257. enum {
  258. FLUXMODE_idle, /* generating no flux (awaiting next command) */
  259. FLUXMODE_oneshot, /* generating a single flux */
  260. FLUXMODE_astable /* generating a region of oscillating flux */
  261. } flux_mode;
  262. } rw;
  263. static void _write_28bit(uint32_t x)
  264. {
  265. u_buf[U_MASK(u_prod++)] = 1 | (x << 1);
  266. u_buf[U_MASK(u_prod++)] = 1 | (x >> 6);
  267. u_buf[U_MASK(u_prod++)] = 1 | (x >> 13);
  268. u_buf[U_MASK(u_prod++)] = 1 | (x >> 20);
  269. }
  270. static void rdata_encode_flux(void)
  271. {
  272. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  273. uint16_t cons = dma.cons, prod;
  274. timcnt_t prev = dma.prev_sample, curr, next;
  275. uint32_t ticks;
  276. ASSERT(rw.idx < rw.nr_idx);
  277. /* We don't want to race the Index IRQ handler. */
  278. IRQ_global_disable();
  279. /* Find out where the DMA engine's producer index has got to. */
  280. prod = ARRAY_SIZE(dma.buf) - dma_rdata.ndtr;
  281. if (rw.idx != index.count) {
  282. /* We have just passed the index mark: Record information about
  283. * the just-completed revolution. */
  284. rw.idx = index.count;
  285. ticks = (timcnt_t)(index.rdata_cnt - prev);
  286. IRQ_global_enable(); /* we're done reading ISR variables */
  287. u_buf[U_MASK(u_prod++)] = 0xff;
  288. u_buf[U_MASK(u_prod++)] = FLUXOP_INDEX;
  289. _write_28bit(ticks);
  290. /* Defer auto-off while read is progressing (as measured by index
  291. * pulses). */
  292. auto_off_nudge();
  293. }
  294. IRQ_global_enable();
  295. /* Process the flux timings into the raw bitcell buffer. */
  296. for (; cons != prod; cons = (cons+1) & buf_mask) {
  297. next = dma.buf[cons];
  298. curr = next - prev;
  299. prev = next;
  300. ticks = curr;
  301. if (ticks == 0) {
  302. /* 0: Skip. */
  303. } else if (ticks < 250) {
  304. /* 1-249: One byte. */
  305. u_buf[U_MASK(u_prod++)] = ticks;
  306. } else {
  307. unsigned int high = (ticks-250) / 255;
  308. if (high < 5) {
  309. /* 250-1524: Two bytes. */
  310. u_buf[U_MASK(u_prod++)] = 250 + high;
  311. u_buf[U_MASK(u_prod++)] = 1 + ((ticks-250) % 255);
  312. } else {
  313. /* 1525-(2^28-1): Seven bytes. */
  314. u_buf[U_MASK(u_prod++)] = 0xff;
  315. u_buf[U_MASK(u_prod++)] = FLUXOP_SPACE;
  316. _write_28bit(ticks - 249);
  317. u_buf[U_MASK(u_prod++)] = 249;
  318. }
  319. }
  320. }
  321. /* If it has been a long time since the last flux timing, transfer some of
  322. * the accumulated time to the host in a "long gap" sample. This avoids
  323. * timing overflow and, because we take care to keep @prev well behind the
  324. * sample clock, we cannot race the next flux timestamp. */
  325. curr = tim_rdata->cnt - prev;
  326. if (unlikely(curr > sample_us(400))) {
  327. ticks = sample_us(200);
  328. u_buf[U_MASK(u_prod++)] = 0xff;
  329. u_buf[U_MASK(u_prod++)] = FLUXOP_SPACE;
  330. _write_28bit(ticks);
  331. prev += ticks;
  332. }
  333. /* Save our progress for next time. */
  334. dma.cons = cons;
  335. dma.prev_sample = prev;
  336. }
  337. static uint8_t floppy_read_prep(const struct gw_read_flux *rf)
  338. {
  339. if (rf->nr_idx == 0)
  340. return ACK_BAD_COMMAND;
  341. /* Prepare Timer & DMA. */
  342. dma_rdata.mar = (uint32_t)(unsigned long)dma.buf;
  343. dma_rdata.ndtr = ARRAY_SIZE(dma.buf);
  344. rdata_prep();
  345. /* DMA soft state. */
  346. dma.cons = 0;
  347. dma.prev_sample = tim_rdata->cnt;
  348. /* Start Timer. */
  349. tim_rdata->cr1 = TIM_CR1_CEN;
  350. index.count = 0;
  351. floppy_state = ST_read_flux;
  352. memset(&rw, 0, sizeof(rw));
  353. rw.nr_idx = rf->nr_idx;
  354. rw.start = time_now();
  355. rw.status = ACK_OKAY;
  356. return ACK_OKAY;
  357. }
  358. static void make_read_packet(unsigned int n)
  359. {
  360. unsigned int c = U_MASK(u_cons);
  361. unsigned int l = U_BUF_SZ - c;
  362. if (l < n) {
  363. memcpy(usb_packet.data, &u_buf[c], l);
  364. memcpy(&usb_packet.data[l], u_buf, n-l);
  365. } else {
  366. memcpy(usb_packet.data, &u_buf[c], n);
  367. }
  368. u_cons += n;
  369. usb_packet.ready = TRUE;
  370. usb_packet.len = n;
  371. }
  372. static void floppy_read(void)
  373. {
  374. unsigned int avail = (uint32_t)(u_prod - u_cons);
  375. if (floppy_state == ST_read_flux) {
  376. rdata_encode_flux();
  377. avail = (uint32_t)(u_prod - u_cons);
  378. if (avail > U_BUF_SZ) {
  379. /* Overflow */
  380. printk("OVERFLOW %u %u %u %u\n", u_cons, u_prod,
  381. usb_packet.ready, ep_tx_ready(EP_TX));
  382. floppy_flux_end();
  383. rw.status = ACK_FLUX_OVERFLOW;
  384. floppy_state = ST_read_flux_drain;
  385. u_cons = u_prod = avail = 0;
  386. } else if (rw.idx >= rw.nr_idx) {
  387. /* Read all requested revolutions. */
  388. floppy_flux_end();
  389. floppy_state = ST_read_flux_drain;
  390. } else if ((index.count == 0)
  391. && (time_since(rw.start) > time_ms(2000))) {
  392. /* Timeout */
  393. printk("NO INDEX\n");
  394. floppy_flux_end();
  395. rw.status = ACK_NO_INDEX;
  396. floppy_state = ST_read_flux_drain;
  397. u_cons = u_prod = avail = 0;
  398. }
  399. } else if ((avail < usb_bulk_mps)
  400. && !usb_packet.ready
  401. && ep_tx_ready(EP_TX)) {
  402. /* Final packet, including ACK byte (NUL). */
  403. memset(usb_packet.data, 0, usb_bulk_mps);
  404. make_read_packet(avail);
  405. floppy_state = ST_command_wait;
  406. floppy_end_command(usb_packet.data, avail+1);
  407. return; /* FINISHED */
  408. }
  409. if (!usb_packet.ready && (avail >= usb_bulk_mps))
  410. make_read_packet(usb_bulk_mps);
  411. if (usb_packet.ready && ep_tx_ready(EP_TX)) {
  412. usb_write(EP_TX, usb_packet.data, usb_packet.len);
  413. usb_packet.ready = FALSE;
  414. }
  415. }
  416. /*
  417. * WRITE PATH
  418. */
  419. static uint32_t _read_28bit(void)
  420. {
  421. uint32_t x;
  422. x = (u_buf[U_MASK(u_cons++)] ) >> 1;
  423. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 6;
  424. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 13;
  425. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 20;
  426. return x;
  427. }
  428. static unsigned int _wdata_decode_flux(timcnt_t *tbuf, unsigned int nr)
  429. {
  430. #define MIN_PULSE sample_ns(800)
  431. unsigned int todo = nr;
  432. uint32_t x, ticks = rw.ticks;
  433. if (todo == 0)
  434. return 0;
  435. switch (rw.flux_mode) {
  436. case FLUXMODE_astable: {
  437. /* Produce flux transitions at the specified period. */
  438. uint32_t pulse = rw.astable_period;
  439. while (ticks >= pulse) {
  440. *tbuf++ = pulse - 1;
  441. ticks -= pulse;
  442. if (!--todo)
  443. goto out;
  444. }
  445. rw.flux_mode = FLUXMODE_idle;
  446. break;
  447. }
  448. case FLUXMODE_oneshot:
  449. /* If ticks to next flux would overflow the hardware counter, insert
  450. * extra fluxes as necessary to get us to the proper next flux. */
  451. while (ticks != (timcnt_t)ticks) {
  452. uint32_t pulse = (timcnt_t)-1 + 1;
  453. *tbuf++ = pulse - 1;
  454. ticks -= pulse;
  455. if (!--todo)
  456. goto out;
  457. }
  458. /* Process the one-shot unless it's too short, in which case
  459. * it will be merged into the next region. */
  460. if (ticks > MIN_PULSE) {
  461. *tbuf++ = ticks - 1;
  462. ticks = 0;
  463. if (!--todo)
  464. goto out;
  465. }
  466. rw.flux_mode = FLUXMODE_idle;
  467. break;
  468. case FLUXMODE_idle:
  469. /* Nothing to do (waiting for a flux command). */
  470. break;
  471. }
  472. while (u_cons != u_prod) {
  473. ASSERT(rw.flux_mode == FLUXMODE_idle);
  474. x = u_buf[U_MASK(u_cons)];
  475. if (x == 0) {
  476. /* 0: Terminate */
  477. u_cons++;
  478. rw.write_finished = TRUE;
  479. goto out;
  480. } else if (x < 250) {
  481. /* 1-249: One byte. Time to next flux.*/
  482. u_cons++;
  483. } else if (x < 255) {
  484. /* 250-254: Two bytes. Time to next flux. */
  485. if ((uint32_t)(u_prod - u_cons) < 2)
  486. goto out;
  487. u_cons++;
  488. x = 250 + (x - 250) * 255;
  489. x += u_buf[U_MASK(u_cons++)] - 1;
  490. } else {
  491. /* 255: Six bytes */
  492. uint8_t op;
  493. if ((uint32_t)(u_prod - u_cons) < 6)
  494. goto out;
  495. op = u_buf[U_MASK(u_cons+1)];
  496. u_cons += 2;
  497. switch (op) {
  498. case FLUXOP_SPACE:
  499. ticks += _read_28bit();
  500. continue;
  501. case FLUXOP_ASTABLE:
  502. rw.astable_period = _read_28bit();
  503. if ((rw.astable_period < MIN_PULSE)
  504. || (rw.astable_period != (timcnt_t)rw.astable_period)) {
  505. /* Bad period value: underflow or overflow. */
  506. goto error;
  507. }
  508. rw.flux_mode = FLUXMODE_astable;
  509. goto out;
  510. default:
  511. /* Invalid opcode */
  512. u_cons += 4;
  513. goto error;
  514. }
  515. }
  516. /* We're now implicitly in FLUXMODE_oneshot, but we don't register it
  517. * explicitly as we usually switch straight back to FLUXMODE_idle. */
  518. ticks += x;
  519. /* This sample too small? Then ignore this flux transition. */
  520. if (ticks < MIN_PULSE)
  521. continue;
  522. /* This sample overflows the hardware timer's counter width?
  523. * Then bail, and we'll split it into chunks. */
  524. if (ticks != (timcnt_t)ticks) {
  525. rw.flux_mode = FLUXMODE_oneshot;
  526. goto out;
  527. }
  528. *tbuf++ = ticks - 1;
  529. ticks = 0;
  530. if (!--todo)
  531. goto out;
  532. }
  533. out:
  534. rw.ticks = ticks;
  535. return nr - todo;
  536. error:
  537. floppy_flux_end();
  538. rw.status = ACK_BAD_COMMAND;
  539. floppy_state = ST_write_flux_drain;
  540. goto out;
  541. }
  542. static void wdata_decode_flux(void)
  543. {
  544. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  545. uint16_t nr_to_wrap, nr_to_cons, nr, dmacons;
  546. /* Find out where the DMA engine's consumer index has got to. */
  547. dmacons = ARRAY_SIZE(dma.buf) - dma_wdata.ndtr;
  548. /* Find largest contiguous stretch of ring buffer we can fill. */
  549. nr_to_wrap = ARRAY_SIZE(dma.buf) - dma.prod;
  550. nr_to_cons = (dmacons - dma.prod - 1) & buf_mask;
  551. nr = min(nr_to_wrap, nr_to_cons);
  552. /* Now attempt to fill the contiguous stretch with flux data calculated
  553. * from buffered bitcell data. */
  554. dma.prod += _wdata_decode_flux(&dma.buf[dma.prod], nr);
  555. dma.prod &= buf_mask;
  556. }
  557. static void floppy_process_write_packet(void)
  558. {
  559. int len = ep_rx_ready(EP_RX);
  560. if ((len >= 0) && !usb_packet.ready) {
  561. usb_read(EP_RX, usb_packet.data, len);
  562. usb_packet.ready = TRUE;
  563. usb_packet.len = len;
  564. }
  565. if (usb_packet.ready) {
  566. unsigned int avail = U_BUF_SZ - (uint32_t)(u_prod - u_cons);
  567. unsigned int n = usb_packet.len;
  568. if (avail >= n) {
  569. unsigned int p = U_MASK(u_prod);
  570. unsigned int l = U_BUF_SZ - p;
  571. if (l < n) {
  572. memcpy(&u_buf[p], usb_packet.data, l);
  573. memcpy(u_buf, &usb_packet.data[l], n-l);
  574. } else {
  575. memcpy(&u_buf[p], usb_packet.data, n);
  576. }
  577. u_prod += n;
  578. usb_packet.ready = FALSE;
  579. }
  580. }
  581. }
  582. static uint8_t floppy_write_prep(const struct gw_write_flux *wf)
  583. {
  584. if (get_wrprot() == LOW)
  585. return ACK_WRPROT;
  586. wdata_prep();
  587. /* WDATA DMA setup: From a circular buffer into the WDATA Timer's ARR. */
  588. dma_wdata.par = (uint32_t)(unsigned long)&tim_wdata->arr;
  589. dma_wdata.mar = (uint32_t)(unsigned long)dma.buf;
  590. /* Initialise DMA ring indexes (consumer index is implicit). */
  591. dma_wdata.ndtr = ARRAY_SIZE(dma.buf);
  592. dma.prod = 0;
  593. floppy_state = ST_write_flux_wait_data;
  594. memset(&rw, 0, sizeof(rw));
  595. rw.flux_mode = FLUXMODE_idle;
  596. rw.status = ACK_OKAY;
  597. rw.terminate_at_index = wf->terminate_at_index;
  598. return ACK_OKAY;
  599. }
  600. static void floppy_write_wait_data(void)
  601. {
  602. bool_t write_finished;
  603. unsigned int u_buf_threshold;
  604. floppy_process_write_packet();
  605. wdata_decode_flux();
  606. if (rw.status != ACK_OKAY)
  607. return;
  608. /* We don't wait for the massive F7 u_buf[] to fill at Full Speed. */
  609. u_buf_threshold = ((U_BUF_SZ > 16384) && !usb_is_highspeed())
  610. ? 16384 - 512 : U_BUF_SZ - 512;
  611. /* Wait for DMA and input buffers to fill, or write stream to end. We must
  612. * take care because, since we are not yet draining the DMA buffer, the
  613. * write stream may end without us noticing and setting rw.write_finished.
  614. * Hence we peek for a NUL byte in the input buffer if it's non-empty. */
  615. write_finished = ((u_prod == u_cons)
  616. ? rw.write_finished
  617. : (u_buf[U_MASK(u_prod-1)] == 0));
  618. if (((dma.prod != (ARRAY_SIZE(dma.buf)-1))
  619. || ((uint32_t)(u_prod - u_cons) < u_buf_threshold))
  620. && !write_finished)
  621. return;
  622. floppy_state = ST_write_flux_wait_index;
  623. rw.start = time_now();
  624. /* Enable DMA only after flux values are generated. */
  625. dma_wdata_start();
  626. /* Preload timer with first flux value. */
  627. tim_wdata->egr = TIM_EGR_UG;
  628. tim_wdata->sr = 0; /* dummy write, gives h/w time to process EGR.UG=1 */
  629. barrier(); /* Trigger timer update /then/ wait for next index pulse */
  630. index.count = 0;
  631. }
  632. static void floppy_write_wait_index(void)
  633. {
  634. if (index.count == 0) {
  635. if (time_since(rw.start) > time_ms(2000)) {
  636. /* Timeout */
  637. floppy_flux_end();
  638. rw.status = ACK_NO_INDEX;
  639. floppy_state = ST_write_flux_drain;
  640. }
  641. return;
  642. }
  643. /* Start timer. */
  644. tim_wdata->cr1 = TIM_CR1_CEN;
  645. /* Enable output. */
  646. configure_pin(wdata, AFO_bus);
  647. write_pin(wgate, TRUE);
  648. index.count = 0;
  649. floppy_state = ST_write_flux;
  650. }
  651. static void floppy_write_check_underflow(void)
  652. {
  653. uint32_t avail = u_prod - u_cons;
  654. if (/* We've run the input buffer dry. */
  655. (avail == 0)
  656. /* The input buffer is nearly dry, and doesn't contain EOStream. */
  657. || ((avail < 16) && (u_buf[U_MASK(u_prod-1)] != 0))) {
  658. /* Underflow */
  659. printk("UNDERFLOW %u %u %u %u\n", u_cons, u_prod,
  660. usb_packet.ready, ep_rx_ready(EP_RX));
  661. floppy_flux_end();
  662. rw.status = ACK_FLUX_UNDERFLOW;
  663. floppy_state = ST_write_flux_drain;
  664. }
  665. }
  666. static void floppy_write(void)
  667. {
  668. uint16_t dmacons, todo, prev_todo;
  669. floppy_process_write_packet();
  670. wdata_decode_flux();
  671. if (rw.status != ACK_OKAY)
  672. return;
  673. /* Early termination on index pulse? */
  674. if (rw.terminate_at_index && (index.count != 0))
  675. goto terminate;
  676. if (!rw.write_finished) {
  677. floppy_write_check_underflow();
  678. return;
  679. }
  680. /* Wait for DMA ring to drain. */
  681. todo = ~0;
  682. do {
  683. /* Check for early termination on index pulse. */
  684. if (rw.terminate_at_index && (index.count != 0))
  685. goto terminate;
  686. /* Check progress of draining the DMA ring. */
  687. prev_todo = todo;
  688. dmacons = ARRAY_SIZE(dma.buf) - dma_wdata.ndtr;
  689. todo = (dma.prod - dmacons) & (ARRAY_SIZE(dma.buf) - 1);
  690. } while ((todo != 0) && (todo <= prev_todo));
  691. terminate:
  692. floppy_flux_end();
  693. floppy_state = ST_write_flux_drain;
  694. }
  695. static void floppy_write_drain(void)
  696. {
  697. /* Drain the write stream. */
  698. if (!rw.write_finished) {
  699. floppy_process_write_packet();
  700. (void)_wdata_decode_flux(dma.buf, ARRAY_SIZE(dma.buf));
  701. return;
  702. }
  703. /* Wait for space to write ACK usb_packet. */
  704. if (!ep_tx_ready(EP_TX))
  705. return;
  706. /* ACK with Status byte. */
  707. u_buf[0] = rw.status;
  708. floppy_state = ST_command_wait;
  709. floppy_end_command(u_buf, 1);
  710. }
  711. /*
  712. * ERASE PATH
  713. */
  714. static uint8_t floppy_erase_prep(const struct gw_erase_flux *ef)
  715. {
  716. if (get_wrprot() == LOW)
  717. return ACK_WRPROT;
  718. write_pin(wgate, TRUE);
  719. floppy_state = ST_erase_flux;
  720. memset(&rw, 0, sizeof(rw));
  721. rw.status = ACK_OKAY;
  722. rw.end = time_now() + time_from_samples(ef->erase_ticks);
  723. return ACK_OKAY;
  724. }
  725. static void floppy_erase(void)
  726. {
  727. if (time_since(rw.end) < 0)
  728. return;
  729. write_pin(wgate, FALSE);
  730. /* ACK with Status byte. */
  731. u_buf[0] = rw.status;
  732. floppy_state = ST_command_wait;
  733. floppy_end_command(u_buf, 1);
  734. }
  735. /*
  736. * SINK/SOURCE
  737. */
  738. static struct {
  739. unsigned int todo;
  740. unsigned int min_delta;
  741. unsigned int max_delta;
  742. } ss;
  743. static void sink_source_prep(const struct gw_sink_source_bytes *ssb)
  744. {
  745. ss.min_delta = INT_MAX;
  746. ss.max_delta = 0;
  747. ss.todo = ssb->nr_bytes;
  748. }
  749. static void ss_update_deltas(int len)
  750. {
  751. uint32_t *u_times = (uint32_t *)u_buf;
  752. time_t delta, now = time_now();
  753. unsigned int p = u_prod;
  754. /* Every four bytes we store a timestamp in a u_buf[]-sized ring buffer.
  755. * We then record min/max time taken to overwrite a previous timestamp. */
  756. while (len--) {
  757. if (p++ & 3)
  758. continue;
  759. delta = time_diff(u_times[U_MASK(p)>>2], now);
  760. u_times[U_MASK(p)>>2] = now;
  761. if ((delta > ss.max_delta) && (p >= U_BUF_SZ))
  762. ss.max_delta = delta;
  763. if ((delta < ss.min_delta) && (p >= U_BUF_SZ))
  764. ss.min_delta = delta;
  765. }
  766. u_prod = p;
  767. }
  768. static void source_bytes(void)
  769. {
  770. if (!ep_tx_ready(EP_TX))
  771. return;
  772. if (ss.todo < usb_bulk_mps) {
  773. floppy_state = ST_command_wait;
  774. floppy_end_command(usb_packet.data, ss.todo);
  775. return; /* FINISHED */
  776. }
  777. usb_write(EP_TX, usb_packet.data, usb_bulk_mps);
  778. ss.todo -= usb_bulk_mps;
  779. ss_update_deltas(usb_bulk_mps);
  780. }
  781. static void sink_bytes(void)
  782. {
  783. int len;
  784. if (ss.todo == 0) {
  785. /* We're done: Wait for space to write the ACK byte. */
  786. if (!ep_tx_ready(EP_TX))
  787. return;
  788. u_buf[0] = ACK_OKAY;
  789. floppy_state = ST_command_wait;
  790. floppy_end_command(u_buf, 1);
  791. return; /* FINISHED */
  792. }
  793. /* Packet ready? */
  794. len = ep_rx_ready(EP_RX);
  795. if (len < 0)
  796. return;
  797. /* Read it and adjust byte counter. */
  798. usb_read(EP_RX, usb_packet.data, len);
  799. ss.todo = (ss.todo <= len) ? 0 : ss.todo - len;
  800. ss_update_deltas(len);
  801. }
  802. /*
  803. * BOOTLOADER UPDATE
  804. */
  805. #define BL_START 0x08000000
  806. #define BL_END ((uint32_t)_stext)
  807. #define BL_SIZE (BL_END - BL_START)
  808. static struct {
  809. uint32_t len;
  810. uint32_t cur;
  811. } update;
  812. static void erase_old_bootloader(void)
  813. {
  814. uint32_t p;
  815. for (p = BL_START; p < BL_END; p += FLASH_PAGE_SIZE)
  816. fpec_page_erase(p);
  817. }
  818. static void update_prep(uint32_t len)
  819. {
  820. fpec_init();
  821. erase_old_bootloader();
  822. floppy_state = ST_update_bootloader;
  823. update.cur = 0;
  824. update.len = len;
  825. printk("Update Bootloader: %u bytes\n", len);
  826. }
  827. static void update_continue(void)
  828. {
  829. int len;
  830. if ((len = ep_rx_ready(EP_RX)) >= 0) {
  831. usb_read(EP_RX, &u_buf[u_prod], len);
  832. u_prod += len;
  833. }
  834. if ((len = u_prod) >= 2) {
  835. int nr = len & ~1;
  836. fpec_write(u_buf, nr, BL_START + update.cur);
  837. update.cur += nr;
  838. u_prod -= nr;
  839. memcpy(u_buf, &u_buf[nr], u_prod);
  840. }
  841. if ((update.cur >= update.len) && ep_tx_ready(EP_TX)) {
  842. uint16_t crc = crc16_ccitt((void *)BL_START, update.len, 0xffff);
  843. printk("Final CRC: %04x (%s)\n", crc, crc ? "FAIL" : "OK");
  844. u_buf[0] = !!crc;
  845. floppy_state = ST_command_wait;
  846. floppy_end_command(u_buf, 1);
  847. }
  848. }
  849. static void process_command(void)
  850. {
  851. uint8_t cmd = u_buf[0];
  852. uint8_t len = u_buf[1];
  853. uint8_t resp_sz = 2;
  854. auto_off_arm();
  855. act_led(TRUE);
  856. switch (cmd) {
  857. case CMD_GET_INFO: {
  858. uint8_t idx = u_buf[2];
  859. if (len != 3)
  860. goto bad_command;
  861. memset(&u_buf[2], 0, 32);
  862. switch(idx) {
  863. case GETINFO_FIRMWARE: /* gw_info */
  864. gw_info.fw_major = fw_major;
  865. gw_info.fw_minor = fw_minor;
  866. memcpy(&u_buf[2], &gw_info, sizeof(gw_info));
  867. break;
  868. case GETINFO_BW_STATS: /* gw_bw_stats */ {
  869. struct gw_bw_stats bw;
  870. bw.min_bw.bytes = U_BUF_SZ;
  871. bw.min_bw.usecs = ss.max_delta / time_us(1);
  872. bw.max_bw.bytes = U_BUF_SZ;
  873. bw.max_bw.usecs = ss.min_delta / time_us(1);
  874. memcpy(&u_buf[2], &bw, sizeof(bw));
  875. break;
  876. }
  877. default:
  878. goto bad_command;
  879. }
  880. resp_sz += 32;
  881. break;
  882. }
  883. case CMD_UPDATE: {
  884. uint32_t u_len = *(uint32_t *)&u_buf[2];
  885. uint32_t signature = *(uint32_t *)&u_buf[6];
  886. if (len != 10) goto bad_command;
  887. if (u_len & 3) goto bad_command;
  888. if (u_len > BL_SIZE) goto bad_command;
  889. if (signature != 0xdeafbee3) goto bad_command;
  890. update_prep(u_len);
  891. break;
  892. }
  893. case CMD_SEEK: {
  894. uint8_t cyl = u_buf[2];
  895. if ((len != 3) || (cyl > 85))
  896. goto bad_command;
  897. u_buf[1] = floppy_seek(cyl);
  898. goto out;
  899. }
  900. case CMD_SIDE: {
  901. uint8_t side = u_buf[2];
  902. if ((len != 3) || (side > 1))
  903. goto bad_command;
  904. write_pin(side, side);
  905. break;
  906. }
  907. case CMD_SET_PARAMS: {
  908. uint8_t idx = u_buf[2];
  909. if ((len < 3) || (idx != PARAMS_DELAYS)
  910. || (len > (3 + sizeof(delay_params))))
  911. goto bad_command;
  912. memcpy(&delay_params, &u_buf[3], len-3);
  913. break;
  914. }
  915. case CMD_GET_PARAMS: {
  916. uint8_t idx = u_buf[2];
  917. uint8_t nr = u_buf[3];
  918. if ((len != 4) || (idx != PARAMS_DELAYS)
  919. || (nr > sizeof(delay_params)))
  920. goto bad_command;
  921. memcpy(&u_buf[2], &delay_params, nr);
  922. resp_sz += nr;
  923. break;
  924. }
  925. case CMD_MOTOR: {
  926. uint8_t unit = u_buf[2], on_off = u_buf[3];
  927. if ((len != 4) || (on_off & ~1))
  928. goto bad_command;
  929. u_buf[1] = drive_motor(unit, on_off & 1);
  930. goto out;
  931. }
  932. case CMD_READ_FLUX: {
  933. struct gw_read_flux rf = { .nr_idx = 2 };
  934. if ((len < 2) || (len > (2 + sizeof(rf))))
  935. goto bad_command;
  936. memcpy(&rf, &u_buf[2], len-2);
  937. u_buf[1] = floppy_read_prep(&rf);
  938. goto out;
  939. }
  940. case CMD_WRITE_FLUX: {
  941. struct gw_write_flux wf = { 0 };
  942. if ((len < 2) || (len > (2 + sizeof(wf))))
  943. goto bad_command;
  944. memcpy(&wf, &u_buf[2], len-2);
  945. u_buf[1] = floppy_write_prep(&wf);
  946. goto out;
  947. }
  948. case CMD_GET_FLUX_STATUS: {
  949. if (len != 2)
  950. goto bad_command;
  951. u_buf[1] = rw.status;
  952. goto out;
  953. }
  954. case CMD_SELECT: {
  955. uint8_t unit = u_buf[2];
  956. if (len != 3)
  957. goto bad_command;
  958. u_buf[1] = drive_select(unit);
  959. goto out;
  960. }
  961. case CMD_DESELECT: {
  962. if (len != 2)
  963. goto bad_command;
  964. drive_deselect();
  965. break;
  966. }
  967. case CMD_SET_BUS_TYPE: {
  968. uint8_t type = u_buf[2];
  969. if ((len != 3) || !set_bus_type(type))
  970. goto bad_command;
  971. break;
  972. }
  973. case CMD_SET_PIN: {
  974. uint8_t pin = u_buf[2];
  975. uint8_t level = u_buf[3];
  976. if ((len != 4) || (level & ~1))
  977. goto bad_command;
  978. u_buf[1] = set_user_pin(pin, level);
  979. goto out;
  980. }
  981. case CMD_RESET: {
  982. if (len != 2)
  983. goto bad_command;
  984. delay_params = factory_delay_params;
  985. _set_bus_type(BUS_NONE);
  986. reset_user_pins();
  987. break;
  988. }
  989. case CMD_ERASE_FLUX: {
  990. struct gw_erase_flux ef;
  991. if (len != (2 + sizeof(ef)))
  992. goto bad_command;
  993. memcpy(&ef, &u_buf[2], len-2);
  994. u_buf[1] = floppy_erase_prep(&ef);
  995. goto out;
  996. }
  997. case CMD_SOURCE_BYTES:
  998. case CMD_SINK_BYTES: {
  999. struct gw_sink_source_bytes ssb;
  1000. if (len != (2 + sizeof(ssb)))
  1001. goto bad_command;
  1002. memcpy(&ssb, &u_buf[2], len-2);
  1003. floppy_state = (cmd == CMD_SOURCE_BYTES)
  1004. ? ST_source_bytes : ST_sink_bytes;
  1005. sink_source_prep(&ssb);
  1006. break;
  1007. }
  1008. #if STM32F == 7
  1009. case CMD_SWITCH_FW_MODE: {
  1010. uint8_t mode = u_buf[2];
  1011. if ((len != 3) || (mode & ~1))
  1012. goto bad_command;
  1013. if (mode == FW_MODE_BOOTLOADER) {
  1014. usb_deinit();
  1015. delay_ms(500);
  1016. /* Poke a flag in SRAM1, picked up by the bootloader. */
  1017. *(volatile uint32_t *)0x20010000 = 0xdeadbeef;
  1018. dcache_disable();
  1019. system_reset();
  1020. }
  1021. break;
  1022. }
  1023. #endif
  1024. default:
  1025. goto bad_command;
  1026. }
  1027. u_buf[1] = ACK_OKAY;
  1028. out:
  1029. floppy_end_command(u_buf, resp_sz);
  1030. return;
  1031. bad_command:
  1032. u_buf[1] = ACK_BAD_COMMAND;
  1033. goto out;
  1034. }
  1035. static void floppy_configure(void)
  1036. {
  1037. auto_off_arm();
  1038. floppy_flux_end();
  1039. floppy_state = ST_command_wait;
  1040. u_cons = u_prod = 0;
  1041. act_led(FALSE);
  1042. }
  1043. void floppy_process(void)
  1044. {
  1045. int i, len;
  1046. if (auto_off.armed && (time_since(auto_off.deadline) >= 0)) {
  1047. floppy_flux_end();
  1048. for (i = 0; i < ARRAY_SIZE(unit); i++) {
  1049. if (unit[i].motor)
  1050. drive_motor(i, FALSE);
  1051. }
  1052. drive_deselect();
  1053. auto_off.armed = FALSE;
  1054. }
  1055. switch (floppy_state) {
  1056. case ST_command_wait:
  1057. len = ep_rx_ready(EP_RX);
  1058. if ((len >= 0) && (len < (U_BUF_SZ-u_prod))) {
  1059. usb_read(EP_RX, &u_buf[u_prod], len);
  1060. u_prod += len;
  1061. }
  1062. if ((u_prod >= 2) && (u_prod >= u_buf[1]) && ep_tx_ready(EP_TX)) {
  1063. process_command();
  1064. }
  1065. break;
  1066. case ST_zlp:
  1067. if (ep_tx_ready(EP_TX)) {
  1068. usb_write(EP_TX, NULL, 0);
  1069. floppy_state = ST_command_wait;
  1070. }
  1071. break;
  1072. case ST_read_flux:
  1073. case ST_read_flux_drain:
  1074. floppy_read();
  1075. break;
  1076. case ST_write_flux_wait_data:
  1077. floppy_write_wait_data();
  1078. break;
  1079. case ST_write_flux_wait_index:
  1080. floppy_write_wait_index();
  1081. break;
  1082. case ST_write_flux:
  1083. floppy_write();
  1084. break;
  1085. case ST_write_flux_drain:
  1086. floppy_write_drain();
  1087. break;
  1088. case ST_erase_flux:
  1089. floppy_erase();
  1090. break;
  1091. case ST_source_bytes:
  1092. source_bytes();
  1093. break;
  1094. case ST_sink_bytes:
  1095. sink_bytes();
  1096. break;
  1097. case ST_update_bootloader:
  1098. update_continue();
  1099. break;
  1100. default:
  1101. break;
  1102. }
  1103. }
  1104. const struct usb_class_ops usb_cdc_acm_ops = {
  1105. .reset = floppy_reset,
  1106. .configure = floppy_configure
  1107. };
  1108. /*
  1109. * INTERRUPT HANDLERS
  1110. */
  1111. static void IRQ_INDEX_changed(void)
  1112. {
  1113. unsigned int cnt = tim_rdata->cnt;
  1114. time_t now = time_now(), prev = index.isr_time;
  1115. /* Clear INDEX-changed flag. */
  1116. exti->pr = m(pin_index);
  1117. index.isr_time = now;
  1118. if (time_diff(prev, now) < time_us(50))
  1119. return;
  1120. index.count++;
  1121. index.rdata_cnt = cnt;
  1122. }
  1123. static void index_timer(void *unused)
  1124. {
  1125. time_t now = time_now();
  1126. IRQ_global_disable();
  1127. /* index.isr_time mustn't get so old that the time_diff() test in
  1128. * IRQ_INDEX_changed() overflows. To prevent this, we ensure that,
  1129. * at all times,
  1130. * time_diff(index.isr_time, time_now()) < 2*INDEX_TIMER_PERIOD + delta,
  1131. * where delta is small. */
  1132. if (time_diff(index.isr_time, now) > INDEX_TIMER_PERIOD)
  1133. index.isr_time = now - INDEX_TIMER_PERIOD;
  1134. IRQ_global_enable();
  1135. timer_set(&index.timer, now + INDEX_TIMER_PERIOD);
  1136. }
  1137. /*
  1138. * Local variables:
  1139. * mode: C
  1140. * c-file-style: "Linux"
  1141. * c-basic-offset: 4
  1142. * tab-width: 4
  1143. * indent-tabs-mode: nil
  1144. * End:
  1145. */