floppy.c 43 KB

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  1. /*
  2. * floppy.c
  3. *
  4. * Floppy interface control.
  5. *
  6. * Written & released by Keir Fraser <keir.xen@gmail.com>
  7. *
  8. * This is free and unencumbered software released into the public domain.
  9. * See the file COPYING for more details, or visit <http://unlicense.org>.
  10. */
  11. #define m(bitnr) (1u<<(bitnr))
  12. #define get_index() gpio_read_pin(gpio_index, pin_index)
  13. #define get_trk0() gpio_read_pin(gpio_trk0, pin_trk0)
  14. #define get_wrprot() gpio_read_pin(gpio_wrprot, pin_wrprot)
  15. #define configure_pin(pin, type) \
  16. gpio_configure_pin(gpio_##pin, pin_##pin, type)
  17. #define SAMPLE_MHZ 72
  18. #define TIM_PSC (SYSCLK_MHZ / SAMPLE_MHZ)
  19. #define sample_ns(x) (((x) * SAMPLE_MHZ) / 1000)
  20. #define sample_us(x) ((x) * SAMPLE_MHZ)
  21. #define time_from_samples(x) udiv64((uint64_t)(x) * TIME_MHZ, SAMPLE_MHZ)
  22. #define write_pin(pin, level) \
  23. gpio_write_pin(gpio_##pin, pin_##pin, level ? O_TRUE : O_FALSE)
  24. static int bus_type = -1;
  25. static int unit_nr = -1;
  26. static struct unit {
  27. int cyl;
  28. bool_t initialised;
  29. bool_t is_flippy;
  30. bool_t motor;
  31. } unit[3];
  32. static struct gw_delay delay_params;
  33. static const struct gw_delay factory_delay_params = {
  34. .select_delay = 10,
  35. .step_delay = 10000,
  36. .seek_settle = 15,
  37. .motor_delay = 750,
  38. .watchdog = 10000
  39. };
  40. extern uint8_t u_buf[];
  41. #if MCU == STM32F1
  42. #include "mcu/stm32f1/floppy.c"
  43. #elif MCU == STM32F7
  44. #include "mcu/stm32f7/floppy.c"
  45. #elif MCU == AT32F4
  46. #include "mcu/at32f4/floppy.c"
  47. #endif
  48. static struct index {
  49. /* Main code can reset this at will. */
  50. volatile unsigned int count;
  51. /* For synchronising index pulse reporting to the RDATA flux stream. */
  52. volatile unsigned int rdata_cnt;
  53. /* Last time at which ISR fired. */
  54. time_t isr_time;
  55. /* Timer structure for index_timer() calls. */
  56. struct timer timer;
  57. } index;
  58. /* Timer to clean up stale index.isr_time. */
  59. #define INDEX_TIMER_PERIOD time_ms(5000)
  60. static void index_timer(void *unused);
  61. /* A DMA buffer for running a timer associated with a floppy-data I/O pin. */
  62. static struct dma_ring {
  63. /* Indexes into the buf[] ring buffer. */
  64. uint16_t cons; /* dma_rd: our consumer index for flux samples */
  65. union {
  66. uint16_t prod; /* dma_wr: our producer index for flux samples */
  67. timcnt_t prev_sample; /* dma_rd: previous CCRx sample value */
  68. };
  69. /* DMA ring buffer of timer values (ARR or CCRx). */
  70. timcnt_t buf[512];
  71. } dma;
  72. static struct {
  73. time_t deadline;
  74. bool_t armed;
  75. } watchdog;
  76. /* Marshalling and unmarshalling of USB packets. */
  77. static struct {
  78. /* TRUE if a packet is ready: .data and .len are valid. */
  79. bool_t ready;
  80. /* Length and contents of the packet (if ready==TRUE). */
  81. unsigned int len;
  82. uint8_t data[USB_HS_MPS];
  83. } usb_packet;
  84. /* Read, write, erase: Shared command state. */
  85. static struct {
  86. union {
  87. time_t start; /* read, write: Time at which read/write started. */
  88. time_t end; /* erase: Time at which to end the erasure. */
  89. };
  90. uint8_t status;
  91. } flux_op;
  92. static enum {
  93. ST_inactive,
  94. ST_command_wait,
  95. ST_zlp,
  96. ST_read_flux,
  97. ST_read_flux_drain,
  98. ST_write_flux_wait_data,
  99. ST_write_flux_wait_index,
  100. ST_write_flux,
  101. ST_write_flux_drain,
  102. ST_erase_flux,
  103. ST_source_bytes,
  104. ST_sink_bytes,
  105. ST_update_bootloader,
  106. ST_testmode,
  107. } floppy_state = ST_inactive;
  108. static uint32_t u_cons, u_prod;
  109. #define U_MASK(x) ((x)&(U_BUF_SZ-1))
  110. static void drive_deselect(void)
  111. {
  112. int pin = -1;
  113. uint8_t rc;
  114. if (unit_nr == -1)
  115. return;
  116. switch (bus_type) {
  117. case BUS_IBMPC:
  118. switch (unit_nr) {
  119. case 0: pin = 14; break;
  120. case 1: pin = 12; break;
  121. }
  122. break;
  123. case BUS_SHUGART:
  124. switch (unit_nr) {
  125. case 0: pin = 10; break;
  126. case 1: pin = 12; break;
  127. case 2: pin = 14; break;
  128. }
  129. break;
  130. }
  131. rc = write_mapped_pin(board_config->msel_pins, pin, O_FALSE);
  132. ASSERT(rc == ACK_OKAY);
  133. unit_nr = -1;
  134. }
  135. static uint8_t drive_select(uint8_t nr)
  136. {
  137. int pin = -1;
  138. uint8_t rc;
  139. if (nr == unit_nr)
  140. return ACK_OKAY;
  141. drive_deselect();
  142. switch (bus_type) {
  143. case BUS_IBMPC:
  144. switch (nr) {
  145. case 0: pin = 14; break;
  146. case 1: pin = 12; break;
  147. default: return ACK_BAD_UNIT;
  148. }
  149. break;
  150. case BUS_SHUGART:
  151. switch (nr) {
  152. case 0: pin = 10; break;
  153. case 1: pin = 12; break;
  154. case 2: pin = 14; break;
  155. default: return ACK_BAD_UNIT;
  156. }
  157. break;
  158. default:
  159. return ACK_NO_BUS;
  160. }
  161. rc = write_mapped_pin(board_config->msel_pins, pin, O_TRUE);
  162. if (rc != ACK_OKAY)
  163. return ACK_BAD_UNIT;
  164. unit_nr = nr;
  165. delay_us(delay_params.select_delay);
  166. return ACK_OKAY;
  167. }
  168. static uint8_t drive_motor(uint8_t nr, bool_t on)
  169. {
  170. int pin = -1;
  171. uint8_t rc;
  172. switch (bus_type) {
  173. case BUS_IBMPC:
  174. if (nr >= 2)
  175. return ACK_BAD_UNIT;
  176. if (unit[nr].motor == on)
  177. return ACK_OKAY;
  178. switch (nr) {
  179. case 0: pin = 10; break;
  180. case 1: pin = 16; break;
  181. }
  182. break;
  183. case BUS_SHUGART:
  184. if (nr >= 3)
  185. return ACK_BAD_UNIT;
  186. /* All shugart units share one motor line. Alias them all to unit 0. */
  187. nr = 0;
  188. if (unit[nr].motor == on)
  189. return ACK_OKAY;
  190. pin = 16;
  191. break;
  192. default:
  193. return ACK_NO_BUS;
  194. }
  195. rc = write_mapped_pin(board_config->msel_pins, pin, on ? O_TRUE : O_FALSE);
  196. if (rc != ACK_OKAY)
  197. return ACK_BAD_UNIT;
  198. unit[nr].motor = on;
  199. if (on)
  200. delay_ms(delay_params.motor_delay);
  201. return ACK_OKAY;
  202. }
  203. static const struct pin_mapping *find_user_pin(unsigned int pin)
  204. {
  205. const struct pin_mapping *upin;
  206. for (upin = board_config->user_pins; upin->pin_id != 0; upin++) {
  207. if (upin->pin_id == pin)
  208. return upin;
  209. }
  210. return NULL;
  211. }
  212. static uint8_t set_user_pin(unsigned int pin, unsigned int level)
  213. {
  214. const struct pin_mapping *upin;
  215. upin = find_user_pin(pin);
  216. if (upin == NULL)
  217. return ACK_BAD_PIN;
  218. gpio_write_pin(gpio_from_id(upin->gpio_bank), upin->gpio_pin, level);
  219. return ACK_OKAY;
  220. }
  221. static uint8_t get_user_pin(unsigned int pin, uint8_t *p_level)
  222. {
  223. const struct pin_mapping *upin;
  224. upin = find_user_pin(pin);
  225. if (upin == NULL)
  226. return ACK_BAD_PIN;
  227. *p_level = gpio_read_pin(gpio_from_id(upin->gpio_bank), upin->gpio_pin);
  228. return ACK_OKAY;
  229. }
  230. static void reset_user_pins(void)
  231. {
  232. const struct pin_mapping *upin;
  233. for (upin = board_config->user_pins; upin->pin_id != 0; upin++)
  234. gpio_write_pin(gpio_from_id(upin->gpio_bank), upin->gpio_pin, O_FALSE);
  235. }
  236. #define flippy_trk0_sensor_disable() flippy_trk0_sensor(HIGH)
  237. #define flippy_trk0_sensor_enable() flippy_trk0_sensor(LOW)
  238. static bool_t flippy_detect(void)
  239. {
  240. bool_t is_flippy;
  241. flippy_trk0_sensor_disable();
  242. is_flippy = (get_trk0() == HIGH);
  243. flippy_trk0_sensor_enable();
  244. return is_flippy;
  245. }
  246. static void step_dir_set(bool_t assert)
  247. {
  248. write_pin(dir, assert);
  249. delay_us(10);
  250. }
  251. #define step_dir_out() step_dir_set(FALSE)
  252. #define step_dir_in() step_dir_set(TRUE)
  253. static void step_once(void)
  254. {
  255. write_pin(step, TRUE);
  256. delay_us(15);
  257. write_pin(step, FALSE);
  258. delay_us(delay_params.step_delay);
  259. }
  260. static uint8_t floppy_seek_initialise(struct unit *u)
  261. {
  262. int nr;
  263. uint8_t rc;
  264. /* Synchronise to cylinder 0. */
  265. step_dir_out();
  266. for (nr = 0; nr < 256; nr++) {
  267. if (get_trk0() == LOW)
  268. goto found_cyl0;
  269. step_once();
  270. }
  271. rc = ACK_NO_TRK0;
  272. goto out;
  273. found_cyl0:
  274. u->cyl = 0;
  275. u->is_flippy = flippy_detect();
  276. if (u->is_flippy) {
  277. /* Trk0 sensor can be asserted at negative cylinder offsets. Seek
  278. * inwards until the sensor is deasserted. */
  279. delay_ms(delay_params.seek_settle); /* change of direction */
  280. step_dir_in();
  281. for (nr = 0; nr < 10; nr++) {
  282. step_once();
  283. if (get_trk0() == HIGH) {
  284. /* We are now at real cylinder 1. */
  285. u->cyl = 1;
  286. break;
  287. }
  288. }
  289. /* Bail if we didn't find cylinder 1. */
  290. if (u->cyl != 1) {
  291. rc = ACK_NO_TRK0;
  292. goto out;
  293. }
  294. }
  295. u->initialised = TRUE;
  296. rc = ACK_OKAY;
  297. out:
  298. delay_ms(delay_params.seek_settle);
  299. return rc;
  300. }
  301. static uint8_t floppy_seek(int cyl)
  302. {
  303. struct unit *u;
  304. int nr;
  305. if (unit_nr < 0)
  306. return ACK_NO_UNIT;
  307. u = &unit[unit_nr];
  308. if (!u->initialised) {
  309. uint8_t rc = floppy_seek_initialise(u);
  310. if (rc != ACK_OKAY)
  311. return rc;
  312. }
  313. if ((cyl < (u->is_flippy ? -8 : 0)) || (cyl > 100))
  314. return ACK_BAD_CYLINDER;
  315. if (u->cyl < cyl) {
  316. nr = cyl - u->cyl;
  317. step_dir_in();
  318. } else if (u->cyl > cyl) {
  319. if (cyl < 0)
  320. flippy_trk0_sensor_disable();
  321. nr = u->cyl - cyl;
  322. step_dir_out();
  323. } else /* u->cyl == cyl */ {
  324. return ACK_OKAY;
  325. }
  326. while (nr--)
  327. step_once();
  328. flippy_trk0_sensor_enable();
  329. delay_ms(delay_params.seek_settle);
  330. u->cyl = cyl;
  331. return ACK_OKAY;
  332. }
  333. static uint8_t floppy_noclick_step(void)
  334. {
  335. uint8_t rc;
  336. /* Make sure the drive is at cylinder 0. */
  337. rc = floppy_seek(0);
  338. if (rc != ACK_OKAY)
  339. return rc;
  340. /* Step to cylinder -1 should be ignored, but reset Disk Change. */
  341. step_dir_out();
  342. step_once();
  343. /* Does it look like we actually stepped? Get back to cylinder 0 if so. */
  344. if (get_trk0() == HIGH) {
  345. delay_ms(delay_params.seek_settle); /* change of direction */
  346. step_dir_in();
  347. step_once();
  348. delay_ms(delay_params.seek_settle);
  349. /* Discourage further use of this command. */
  350. return ACK_BAD_CYLINDER;
  351. }
  352. return ACK_OKAY;
  353. }
  354. static void floppy_flux_end(void)
  355. {
  356. /* Turn off write pins. */
  357. write_pin(wgate, FALSE);
  358. configure_pin(wdata, GPO_bus);
  359. /* Turn off timers. */
  360. tim_rdata->ccer = 0;
  361. tim_rdata->cr1 = 0;
  362. tim_rdata->sr = 0; /* dummy, drains any pending DMA */
  363. tim_wdata->ccer = 0;
  364. tim_wdata->cr1 = 0;
  365. tim_wdata->sr = 0; /* dummy, drains any pending DMA */
  366. /* Turn off DMA. */
  367. dma_rdata.cr &= ~DMA_CR_EN;
  368. dma_wdata.cr &= ~DMA_CR_EN;
  369. while ((dma_rdata.cr & DMA_CR_EN) || (dma_wdata.cr & DMA_CR_EN))
  370. continue;
  371. }
  372. static void quiesce_drives(void)
  373. {
  374. int i;
  375. floppy_flux_end();
  376. for (i = 0; i < ARRAY_SIZE(unit); i++) {
  377. struct unit *u = &unit[i];
  378. if (u->initialised && (u->cyl < 0)) {
  379. drive_select(i);
  380. floppy_seek(0);
  381. }
  382. if (u->motor)
  383. drive_motor(i, FALSE);
  384. }
  385. drive_deselect();
  386. watchdog.armed = FALSE;
  387. }
  388. static void _set_bus_type(uint8_t type)
  389. {
  390. quiesce_drives();
  391. bus_type = type;
  392. unit_nr = -1;
  393. memset(unit, 0, sizeof(unit));
  394. }
  395. static bool_t set_bus_type(uint8_t type)
  396. {
  397. if (type == bus_type)
  398. return TRUE;
  399. if (type > BUS_SHUGART)
  400. return FALSE;
  401. _set_bus_type(type);
  402. return TRUE;
  403. }
  404. static uint8_t get_floppy_pin(unsigned int pin, uint8_t *p_level)
  405. {
  406. uint8_t rc = ACK_OKAY;
  407. switch (pin) {
  408. case 8:
  409. *p_level = get_index();
  410. break;
  411. case 26:
  412. *p_level = get_trk0();
  413. break;
  414. case 28:
  415. *p_level = get_wrprot();
  416. break;
  417. default:
  418. rc = mcu_get_floppy_pin(pin, p_level);
  419. if (rc == ACK_BAD_PIN)
  420. rc = get_user_pin(pin, p_level);
  421. break;
  422. }
  423. return rc;
  424. }
  425. static void floppy_reset(void)
  426. {
  427. floppy_state = ST_inactive;
  428. quiesce_drives();
  429. act_led(FALSE);
  430. }
  431. void floppy_init(void)
  432. {
  433. floppy_mcu_init();
  434. /* Output pins, unbuffered. */
  435. configure_pin(dir, GPO_bus);
  436. configure_pin(step, GPO_bus);
  437. configure_pin(wgate, GPO_bus);
  438. configure_pin(head, GPO_bus);
  439. configure_pin(wdata, GPO_bus);
  440. /* Input pins. */
  441. configure_pin(index, GPI_bus);
  442. configure_pin(trk0, GPI_bus);
  443. configure_pin(wrprot, GPI_bus);
  444. /* Configure INDEX-changed IRQs and timer. */
  445. timer_init(&index.timer, index_timer, NULL);
  446. index_timer(NULL);
  447. exti->rtsr = 0;
  448. exti->imr = exti->ftsr = m(pin_index);
  449. IRQx_set_prio(irq_index, INDEX_IRQ_PRI);
  450. IRQx_enable(irq_index);
  451. delay_params = factory_delay_params;
  452. _set_bus_type(BUS_NONE);
  453. }
  454. struct gw_info gw_info = {
  455. .is_main_firmware = 1,
  456. .max_cmd = CMD_MAX,
  457. .sample_freq = 72000000u,
  458. .hw_model = MCU
  459. };
  460. static void watchdog_kick(void)
  461. {
  462. watchdog.deadline = time_now() + time_ms(delay_params.watchdog);
  463. }
  464. static void watchdog_arm(void)
  465. {
  466. watchdog.armed = TRUE;
  467. watchdog_kick();
  468. }
  469. static void floppy_end_command(void *ack, unsigned int ack_len)
  470. {
  471. watchdog_arm();
  472. usb_write(EP_TX, ack, ack_len);
  473. u_cons = u_prod = 0;
  474. if (floppy_state == ST_command_wait)
  475. act_led(FALSE);
  476. if (ack_len == usb_bulk_mps) {
  477. ASSERT(floppy_state == ST_command_wait);
  478. floppy_state = ST_zlp;
  479. }
  480. }
  481. /*
  482. * READ PATH
  483. */
  484. static struct {
  485. unsigned int nr_index;
  486. unsigned int max_index;
  487. uint32_t max_index_linger;
  488. time_t deadline;
  489. } read;
  490. static void _write_28bit(uint32_t x)
  491. {
  492. u_buf[U_MASK(u_prod++)] = 1 | (x << 1);
  493. u_buf[U_MASK(u_prod++)] = 1 | (x >> 6);
  494. u_buf[U_MASK(u_prod++)] = 1 | (x >> 13);
  495. u_buf[U_MASK(u_prod++)] = 1 | (x >> 20);
  496. }
  497. static void rdata_encode_flux(void)
  498. {
  499. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  500. uint16_t cons = dma.cons, prod;
  501. timcnt_t prev = dma.prev_sample, curr, next;
  502. uint32_t ticks;
  503. /* We don't want to race the Index IRQ handler. */
  504. IRQ_global_disable();
  505. /* Find out where the DMA engine's producer index has got to. */
  506. prod = (ARRAY_SIZE(dma.buf) - dma_rdata.ndtr) & buf_mask;
  507. if (read.nr_index != index.count) {
  508. /* We have just passed the index mark: Record information about
  509. * the just-completed revolution. */
  510. read.nr_index = index.count;
  511. ticks = (timcnt_t)(index.rdata_cnt - prev);
  512. IRQ_global_enable(); /* we're done reading ISR variables */
  513. u_buf[U_MASK(u_prod++)] = 0xff;
  514. u_buf[U_MASK(u_prod++)] = FLUXOP_INDEX;
  515. _write_28bit(ticks);
  516. /* Defer watchdog while read is progressing (as measured by index
  517. * pulses). */
  518. watchdog_kick();
  519. }
  520. IRQ_global_enable();
  521. /* Process the flux timings into the raw bitcell buffer. */
  522. for (; cons != prod; cons = (cons+1) & buf_mask) {
  523. next = dma.buf[cons];
  524. curr = next - prev;
  525. prev = next;
  526. ticks = curr;
  527. if (ticks == 0) {
  528. /* 0: Skip. */
  529. } else if (ticks < 250) {
  530. /* 1-249: One byte. */
  531. u_buf[U_MASK(u_prod++)] = ticks;
  532. } else {
  533. unsigned int high = (ticks-250) / 255;
  534. if (high < 5) {
  535. /* 250-1524: Two bytes. */
  536. u_buf[U_MASK(u_prod++)] = 250 + high;
  537. u_buf[U_MASK(u_prod++)] = 1 + ((ticks-250) % 255);
  538. } else {
  539. /* 1525-(2^28-1): Seven bytes. */
  540. u_buf[U_MASK(u_prod++)] = 0xff;
  541. u_buf[U_MASK(u_prod++)] = FLUXOP_SPACE;
  542. _write_28bit(ticks - 249);
  543. u_buf[U_MASK(u_prod++)] = 249;
  544. }
  545. }
  546. }
  547. /* If it has been a long time since the last flux timing, transfer some of
  548. * the accumulated time to the host in a "long gap" sample. This avoids
  549. * timing overflow and, because we take care to keep @prev well behind the
  550. * sample clock, we cannot race the next flux timestamp. */
  551. curr = tim_rdata->cnt - prev;
  552. if (unlikely(curr > sample_us(400))) {
  553. ticks = sample_us(200);
  554. u_buf[U_MASK(u_prod++)] = 0xff;
  555. u_buf[U_MASK(u_prod++)] = FLUXOP_SPACE;
  556. _write_28bit(ticks);
  557. prev += ticks;
  558. }
  559. /* Save our progress for next time. */
  560. dma.cons = cons;
  561. dma.prev_sample = prev;
  562. }
  563. static uint8_t floppy_read_prep(const struct gw_read_flux *rf)
  564. {
  565. /* Prepare Timer & DMA. */
  566. dma_rdata.mar = (uint32_t)(unsigned long)dma.buf;
  567. dma_rdata.ndtr = ARRAY_SIZE(dma.buf);
  568. rdata_prep();
  569. /* DMA soft state. */
  570. dma.cons = 0;
  571. dma.prev_sample = tim_rdata->cnt;
  572. /* Start Timer. */
  573. tim_rdata->cr1 = TIM_CR1_CEN;
  574. index.count = 0;
  575. usb_packet.ready = FALSE;
  576. floppy_state = ST_read_flux;
  577. flux_op.start = time_now();
  578. flux_op.status = ACK_OKAY;
  579. memset(&read, 0, sizeof(read));
  580. read.max_index = rf->max_index ?: INT_MAX;
  581. read.deadline = flux_op.start;
  582. read.deadline += rf->ticks ? time_from_samples(rf->ticks) : INT_MAX;
  583. read.max_index_linger = time_from_samples(rf->max_index_linger);
  584. return ACK_OKAY;
  585. }
  586. static void make_read_packet(unsigned int n)
  587. {
  588. unsigned int c = U_MASK(u_cons);
  589. unsigned int l = U_BUF_SZ - c;
  590. if (l < n) {
  591. memcpy(usb_packet.data, &u_buf[c], l);
  592. memcpy(&usb_packet.data[l], u_buf, n-l);
  593. } else {
  594. memcpy(usb_packet.data, &u_buf[c], n);
  595. }
  596. u_cons += n;
  597. usb_packet.ready = TRUE;
  598. usb_packet.len = n;
  599. }
  600. static void floppy_read(void)
  601. {
  602. unsigned int avail = (uint32_t)(u_prod - u_cons);
  603. if (floppy_state == ST_read_flux) {
  604. rdata_encode_flux();
  605. avail = (uint32_t)(u_prod - u_cons);
  606. if (avail > U_BUF_SZ) {
  607. /* Overflow */
  608. printk("OVERFLOW %u %u %u %u\n", u_cons, u_prod,
  609. usb_packet.ready, ep_tx_ready(EP_TX));
  610. floppy_flux_end();
  611. flux_op.status = ACK_FLUX_OVERFLOW;
  612. floppy_state = ST_read_flux_drain;
  613. u_cons = u_prod = avail = 0;
  614. } else if (read.nr_index >= read.max_index) {
  615. /* Index limit is reached: Now linger for the specified time. */
  616. time_t deadline = time_now() + read.max_index_linger;
  617. if (time_diff(deadline, read.deadline) > 0)
  618. read.deadline = deadline;
  619. /* Disable max_index check: It's now become a linger deadline. */
  620. read.max_index = INT_MAX;
  621. }
  622. else if (time_since(read.deadline) >= 0) {
  623. /* Deadline is reached: End the read now. */
  624. floppy_flux_end();
  625. floppy_state = ST_read_flux_drain;
  626. } else if ((index.count == 0)
  627. && (time_since(flux_op.start) > time_ms(2000))) {
  628. /* Timeout */
  629. printk("NO INDEX\n");
  630. floppy_flux_end();
  631. flux_op.status = ACK_NO_INDEX;
  632. floppy_state = ST_read_flux_drain;
  633. u_cons = u_prod = avail = 0;
  634. }
  635. } else if ((avail < usb_bulk_mps)
  636. && !usb_packet.ready
  637. && ep_tx_ready(EP_TX)) {
  638. /* Final packet, including ACK byte (NUL). */
  639. memset(usb_packet.data, 0, usb_bulk_mps);
  640. make_read_packet(avail);
  641. floppy_state = ST_command_wait;
  642. floppy_end_command(usb_packet.data, avail+1);
  643. return; /* FINISHED */
  644. }
  645. if (!usb_packet.ready && (avail >= usb_bulk_mps))
  646. make_read_packet(usb_bulk_mps);
  647. if (usb_packet.ready && ep_tx_ready(EP_TX)) {
  648. usb_write(EP_TX, usb_packet.data, usb_packet.len);
  649. usb_packet.ready = FALSE;
  650. }
  651. }
  652. /*
  653. * WRITE PATH
  654. */
  655. static struct {
  656. bool_t is_finished;
  657. bool_t cue_at_index;
  658. bool_t terminate_at_index;
  659. uint32_t astable_period;
  660. uint32_t ticks;
  661. enum {
  662. FLUXMODE_idle, /* generating no flux (awaiting next command) */
  663. FLUXMODE_oneshot, /* generating a single flux */
  664. FLUXMODE_astable /* generating a region of oscillating flux */
  665. } flux_mode;
  666. } write;
  667. static uint32_t _read_28bit(void)
  668. {
  669. uint32_t x;
  670. x = (u_buf[U_MASK(u_cons++)] ) >> 1;
  671. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 6;
  672. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 13;
  673. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 20;
  674. return x;
  675. }
  676. static unsigned int _wdata_decode_flux(timcnt_t *tbuf, unsigned int nr)
  677. {
  678. #define MIN_PULSE sample_ns(800)
  679. unsigned int todo = nr;
  680. uint32_t x, ticks = write.ticks;
  681. if (todo == 0)
  682. return 0;
  683. switch (write.flux_mode) {
  684. case FLUXMODE_astable: {
  685. /* Produce flux transitions at the specified period. */
  686. uint32_t pulse = write.astable_period;
  687. while (ticks >= pulse) {
  688. *tbuf++ = pulse - 1;
  689. ticks -= pulse;
  690. if (!--todo)
  691. goto out;
  692. }
  693. write.flux_mode = FLUXMODE_idle;
  694. break;
  695. }
  696. case FLUXMODE_oneshot:
  697. /* If ticks to next flux would overflow the hardware counter, insert
  698. * extra fluxes as necessary to get us to the proper next flux. */
  699. while (ticks != (timcnt_t)ticks) {
  700. uint32_t pulse = (timcnt_t)-1 + 1;
  701. *tbuf++ = pulse - 1;
  702. ticks -= pulse;
  703. if (!--todo)
  704. goto out;
  705. }
  706. /* Process the one-shot unless it's too short, in which case
  707. * it will be merged into the next region. */
  708. if (ticks > MIN_PULSE) {
  709. *tbuf++ = ticks - 1;
  710. ticks = 0;
  711. if (!--todo)
  712. goto out;
  713. }
  714. write.flux_mode = FLUXMODE_idle;
  715. break;
  716. case FLUXMODE_idle:
  717. /* Nothing to do (waiting for a flux command). */
  718. break;
  719. }
  720. while (u_cons != u_prod) {
  721. ASSERT(write.flux_mode == FLUXMODE_idle);
  722. x = u_buf[U_MASK(u_cons)];
  723. if (x == 0) {
  724. /* 0: Terminate */
  725. u_cons++;
  726. write.is_finished = TRUE;
  727. goto out;
  728. } else if (x < 250) {
  729. /* 1-249: One byte. Time to next flux.*/
  730. u_cons++;
  731. } else if (x < 255) {
  732. /* 250-254: Two bytes. Time to next flux. */
  733. if ((uint32_t)(u_prod - u_cons) < 2)
  734. goto out;
  735. u_cons++;
  736. x = 250 + (x - 250) * 255;
  737. x += u_buf[U_MASK(u_cons++)] - 1;
  738. } else {
  739. /* 255: Six bytes */
  740. uint8_t op;
  741. if ((uint32_t)(u_prod - u_cons) < 6)
  742. goto out;
  743. op = u_buf[U_MASK(u_cons+1)];
  744. u_cons += 2;
  745. switch (op) {
  746. case FLUXOP_SPACE:
  747. ticks += _read_28bit();
  748. continue;
  749. case FLUXOP_ASTABLE: {
  750. uint32_t period = _read_28bit();
  751. if ((period < MIN_PULSE) || (period != (timcnt_t)period)) {
  752. /* Bad period value: underflow or overflow. */
  753. goto error;
  754. }
  755. write.astable_period = period;
  756. write.flux_mode = FLUXMODE_astable;
  757. goto out;
  758. }
  759. default:
  760. /* Invalid opcode */
  761. u_cons += 4;
  762. goto error;
  763. }
  764. }
  765. /* We're now implicitly in FLUXMODE_oneshot, but we don't register it
  766. * explicitly as we usually switch straight back to FLUXMODE_idle. */
  767. ticks += x;
  768. /* This sample too small? Then ignore this flux transition. */
  769. if (ticks < MIN_PULSE)
  770. continue;
  771. /* This sample overflows the hardware timer's counter width?
  772. * Then bail, and we'll split it into chunks. */
  773. if (ticks != (timcnt_t)ticks) {
  774. write.flux_mode = FLUXMODE_oneshot;
  775. goto out;
  776. }
  777. *tbuf++ = ticks - 1;
  778. ticks = 0;
  779. if (!--todo)
  780. goto out;
  781. }
  782. out:
  783. write.ticks = ticks;
  784. return nr - todo;
  785. error:
  786. floppy_flux_end();
  787. flux_op.status = ACK_BAD_COMMAND;
  788. floppy_state = ST_write_flux_drain;
  789. goto out;
  790. }
  791. static void wdata_decode_flux(void)
  792. {
  793. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  794. uint16_t nr_to_wrap, nr_to_cons, nr, dmacons;
  795. /* Find out where the DMA engine's consumer index has got to. */
  796. dmacons = (ARRAY_SIZE(dma.buf) - dma_wdata.ndtr) & buf_mask;
  797. /* Find largest contiguous stretch of ring buffer we can fill. */
  798. nr_to_wrap = ARRAY_SIZE(dma.buf) - dma.prod;
  799. nr_to_cons = (dmacons - dma.prod - 1) & buf_mask;
  800. nr = min(nr_to_wrap, nr_to_cons);
  801. /* Now attempt to fill the contiguous stretch with flux data calculated
  802. * from buffered bitcell data. */
  803. dma.prod += _wdata_decode_flux(&dma.buf[dma.prod], nr);
  804. dma.prod &= buf_mask;
  805. }
  806. static void floppy_process_write_packet(void)
  807. {
  808. int len = ep_rx_ready(EP_RX);
  809. if ((len >= 0) && !usb_packet.ready) {
  810. usb_read(EP_RX, usb_packet.data, len);
  811. usb_packet.ready = TRUE;
  812. usb_packet.len = len;
  813. }
  814. if (usb_packet.ready) {
  815. unsigned int avail = U_BUF_SZ - (uint32_t)(u_prod - u_cons);
  816. unsigned int n = usb_packet.len;
  817. if (avail >= n) {
  818. unsigned int p = U_MASK(u_prod);
  819. unsigned int l = U_BUF_SZ - p;
  820. if (l < n) {
  821. memcpy(&u_buf[p], usb_packet.data, l);
  822. memcpy(u_buf, &usb_packet.data[l], n-l);
  823. } else {
  824. memcpy(&u_buf[p], usb_packet.data, n);
  825. }
  826. u_prod += n;
  827. usb_packet.ready = FALSE;
  828. }
  829. }
  830. }
  831. static uint8_t floppy_write_prep(const struct gw_write_flux *wf)
  832. {
  833. if (get_wrprot() == LOW)
  834. return ACK_WRPROT;
  835. wdata_prep();
  836. /* WDATA DMA setup: From a circular buffer into the WDATA Timer's ARR. */
  837. dma_wdata.par = (uint32_t)(unsigned long)&tim_wdata->arr;
  838. dma_wdata.mar = (uint32_t)(unsigned long)dma.buf;
  839. /* Initialise DMA ring indexes (consumer index is implicit). */
  840. dma_wdata.ndtr = ARRAY_SIZE(dma.buf);
  841. dma.prod = 0;
  842. usb_packet.ready = FALSE;
  843. floppy_state = ST_write_flux_wait_data;
  844. flux_op.status = ACK_OKAY;
  845. memset(&write, 0, sizeof(write));
  846. write.flux_mode = FLUXMODE_idle;
  847. write.cue_at_index = wf->cue_at_index;
  848. write.terminate_at_index = wf->terminate_at_index;
  849. return ACK_OKAY;
  850. }
  851. static void floppy_write_wait_data(void)
  852. {
  853. bool_t write_finished;
  854. unsigned int u_buf_threshold;
  855. floppy_process_write_packet();
  856. wdata_decode_flux();
  857. if (flux_op.status != ACK_OKAY)
  858. return;
  859. /* We don't wait for the massive F7 u_buf[] to fill at Full Speed. */
  860. u_buf_threshold = ((U_BUF_SZ > 16384) && !usb_is_highspeed())
  861. ? 16384 - 512 : U_BUF_SZ - 512;
  862. /* Wait for DMA and input buffers to fill, or write stream to end. We must
  863. * take care because, since we are not yet draining the DMA buffer, the
  864. * write stream may end without us noticing and setting write.is_finished.
  865. * Hence we peek for a NUL byte in the input buffer if it's non-empty. */
  866. write_finished = ((u_prod == u_cons)
  867. ? write.is_finished
  868. : (u_buf[U_MASK(u_prod-1)] == 0));
  869. if (((dma.prod != (ARRAY_SIZE(dma.buf)-1))
  870. || ((uint32_t)(u_prod - u_cons) < u_buf_threshold))
  871. && !write_finished)
  872. return;
  873. floppy_state = ST_write_flux_wait_index;
  874. flux_op.start = time_now();
  875. /* Enable DMA only after flux values are generated. */
  876. dma_wdata_start();
  877. /* Preload timer with first flux value. */
  878. tim_wdata->egr = TIM_EGR_UG;
  879. tim_wdata->sr = 0; /* dummy write, gives h/w time to process EGR.UG=1 */
  880. barrier(); /* Trigger timer update /then/ wait for next index pulse */
  881. index.count = 0;
  882. }
  883. static void floppy_write_wait_index(void)
  884. {
  885. if (write.cue_at_index && (index.count == 0)) {
  886. if (time_since(flux_op.start) > time_ms(2000)) {
  887. /* Timeout */
  888. floppy_flux_end();
  889. flux_op.status = ACK_NO_INDEX;
  890. floppy_state = ST_write_flux_drain;
  891. }
  892. return;
  893. }
  894. /* Start timer. */
  895. tim_wdata->cr1 = TIM_CR1_CEN;
  896. /* Enable output. */
  897. configure_pin(wdata, AFO_bus);
  898. write_pin(wgate, TRUE);
  899. index.count = 0;
  900. floppy_state = ST_write_flux;
  901. }
  902. static void floppy_write_check_underflow(void)
  903. {
  904. uint32_t avail = u_prod - u_cons;
  905. if (/* We've run the input buffer dry. */
  906. (avail == 0)
  907. /* The input buffer is nearly dry, and doesn't contain EOStream. */
  908. || ((avail < 16) && (u_buf[U_MASK(u_prod-1)] != 0))) {
  909. /* Underflow */
  910. printk("UNDERFLOW %u %u %u %u\n", u_cons, u_prod,
  911. usb_packet.ready, ep_rx_ready(EP_RX));
  912. floppy_flux_end();
  913. flux_op.status = ACK_FLUX_UNDERFLOW;
  914. floppy_state = ST_write_flux_drain;
  915. }
  916. }
  917. static void floppy_write(void)
  918. {
  919. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  920. uint16_t dmacons, todo, prev_todo;
  921. floppy_process_write_packet();
  922. wdata_decode_flux();
  923. if (flux_op.status != ACK_OKAY)
  924. return;
  925. /* Early termination on index pulse? */
  926. if (write.terminate_at_index && (index.count != 0))
  927. goto terminate;
  928. if (!write.is_finished) {
  929. floppy_write_check_underflow();
  930. return;
  931. }
  932. /* Wait for DMA ring to drain. */
  933. todo = ~0;
  934. do {
  935. /* Check for early termination on index pulse. */
  936. if (write.terminate_at_index && (index.count != 0))
  937. goto terminate;
  938. /* Check progress of draining the DMA ring. */
  939. prev_todo = todo;
  940. dmacons = (ARRAY_SIZE(dma.buf) - dma_wdata.ndtr) & buf_mask;
  941. todo = (dma.prod - dmacons) & buf_mask;
  942. } while ((todo != 0) && (todo <= prev_todo));
  943. terminate:
  944. floppy_flux_end();
  945. floppy_state = ST_write_flux_drain;
  946. }
  947. static void floppy_write_drain(void)
  948. {
  949. /* Drain the write stream. */
  950. if (!write.is_finished) {
  951. floppy_process_write_packet();
  952. (void)_wdata_decode_flux(dma.buf, ARRAY_SIZE(dma.buf));
  953. return;
  954. }
  955. /* Wait for space to write ACK usb_packet. */
  956. if (!ep_tx_ready(EP_TX))
  957. return;
  958. /* ACK with Status byte. */
  959. u_buf[0] = flux_op.status;
  960. floppy_state = ST_command_wait;
  961. floppy_end_command(u_buf, 1);
  962. }
  963. /*
  964. * ERASE PATH
  965. */
  966. static uint8_t floppy_erase_prep(const struct gw_erase_flux *ef)
  967. {
  968. if (get_wrprot() == LOW)
  969. return ACK_WRPROT;
  970. write_pin(wgate, TRUE);
  971. floppy_state = ST_erase_flux;
  972. flux_op.status = ACK_OKAY;
  973. flux_op.end = time_now() + time_from_samples(ef->ticks);
  974. return ACK_OKAY;
  975. }
  976. static void floppy_erase(void)
  977. {
  978. if (time_since(flux_op.end) < 0)
  979. return;
  980. write_pin(wgate, FALSE);
  981. /* ACK with Status byte. */
  982. u_buf[0] = flux_op.status;
  983. floppy_state = ST_command_wait;
  984. floppy_end_command(u_buf, 1);
  985. }
  986. /*
  987. * SINK/SOURCE
  988. */
  989. static struct {
  990. unsigned int todo;
  991. unsigned int min_delta;
  992. unsigned int max_delta;
  993. unsigned int status;
  994. uint32_t rand;
  995. } ss;
  996. static uint32_t ss_rand_next(uint32_t x)
  997. {
  998. return (x&1) ? (x>>1) ^ 0x80000062 : x>>1;
  999. }
  1000. static void sink_source_prep(const struct gw_sink_source_bytes *ssb)
  1001. {
  1002. ss.min_delta = INT_MAX;
  1003. ss.max_delta = 0;
  1004. ss.todo = ssb->nr_bytes;
  1005. ss.rand = ssb->seed;
  1006. ss.status = ACK_OKAY;
  1007. usb_packet.ready = FALSE;
  1008. }
  1009. static void ss_update_deltas(int len)
  1010. {
  1011. uint32_t *u_times = (uint32_t *)u_buf;
  1012. time_t delta, now = time_now();
  1013. unsigned int p = u_prod;
  1014. /* Every four bytes we store a timestamp in a u_buf[]-sized ring buffer.
  1015. * We then record min/max time taken to overwrite a previous timestamp. */
  1016. while (len--) {
  1017. if (p++ & 3)
  1018. continue;
  1019. delta = time_diff(u_times[U_MASK(p)>>2], now);
  1020. u_times[U_MASK(p)>>2] = now;
  1021. if ((delta > ss.max_delta) && (p >= U_BUF_SZ))
  1022. ss.max_delta = delta;
  1023. if ((delta < ss.min_delta) && (p >= U_BUF_SZ))
  1024. ss.min_delta = delta;
  1025. }
  1026. u_prod = p;
  1027. }
  1028. static void source_bytes(void)
  1029. {
  1030. int i;
  1031. if (!usb_packet.ready) {
  1032. for (i = 0; i < usb_bulk_mps; i++) {
  1033. usb_packet.data[i] = (uint8_t)ss.rand;
  1034. ss.rand = ss_rand_next(ss.rand);
  1035. }
  1036. usb_packet.ready = TRUE;
  1037. }
  1038. if (!ep_tx_ready(EP_TX))
  1039. return;
  1040. usb_packet.ready = FALSE;
  1041. if (ss.todo < usb_bulk_mps) {
  1042. floppy_state = ST_command_wait;
  1043. floppy_end_command(usb_packet.data, ss.todo);
  1044. return; /* FINISHED */
  1045. }
  1046. usb_write(EP_TX, usb_packet.data, usb_bulk_mps);
  1047. ss.todo -= usb_bulk_mps;
  1048. ss_update_deltas(usb_bulk_mps);
  1049. }
  1050. static void sink_bytes(void)
  1051. {
  1052. int i, len;
  1053. if (ss.todo == 0) {
  1054. /* We're done: Wait for space to write the ACK byte. */
  1055. if (!ep_tx_ready(EP_TX))
  1056. return;
  1057. u_buf[0] = ss.status;
  1058. floppy_state = ST_command_wait;
  1059. floppy_end_command(u_buf, 1);
  1060. return; /* FINISHED */
  1061. }
  1062. /* Packet ready? */
  1063. len = ep_rx_ready(EP_RX);
  1064. if (len < 0)
  1065. return;
  1066. /* Read it and adjust byte counter. */
  1067. usb_read(EP_RX, usb_packet.data, len);
  1068. ss.todo = (ss.todo <= len) ? 0 : ss.todo - len;
  1069. ss_update_deltas(len);
  1070. /* Check data. */
  1071. for (i = 0; i < len; i++) {
  1072. if (usb_packet.data[i] != (uint8_t)ss.rand)
  1073. ss.status = ACK_BAD_COMMAND;
  1074. ss.rand = ss_rand_next(ss.rand);
  1075. }
  1076. }
  1077. /*
  1078. * BOOTLOADER UPDATE
  1079. */
  1080. #define BL_START 0x08000000
  1081. #define BL_END ((uint32_t)_stext)
  1082. #define BL_SIZE (BL_END - BL_START)
  1083. static struct {
  1084. uint32_t len;
  1085. } update;
  1086. static void erase_old_bootloader(void)
  1087. {
  1088. uint32_t p;
  1089. for (p = BL_START; p < BL_END; p += FLASH_PAGE_SIZE)
  1090. fpec_page_erase(p);
  1091. }
  1092. static uint8_t update_prep(uint32_t len)
  1093. {
  1094. /* Just a bad-sized payload. Shouldn't even have got here. Bad command. */
  1095. if ((len & 3) || (len > BL_SIZE))
  1096. return ACK_BAD_COMMAND;
  1097. /* Doesn't fit in our RAM buffer? Return a special error code. */
  1098. if (len > U_BUF_SZ)
  1099. return ACK_OUT_OF_SRAM;
  1100. floppy_state = ST_update_bootloader;
  1101. update.len = len;
  1102. printk("Update Bootloader: %u bytes\n", len);
  1103. return ACK_OKAY;
  1104. }
  1105. static void update_continue(void)
  1106. {
  1107. uint16_t crc;
  1108. int len, retry;
  1109. /* Read entire new bootloader into the u_buf[] ring. */
  1110. if ((len = ep_rx_ready(EP_RX)) >= 0) {
  1111. len = min_t(int, len, update.len - u_prod);
  1112. usb_read(EP_RX, &u_buf[u_prod], len);
  1113. u_prod += len;
  1114. }
  1115. /* Keep going until we have the entire bootloader. */
  1116. if ((u_prod < update.len) || !ep_tx_ready(EP_TX))
  1117. return;
  1118. /* Validate the new bootloader before erasing the existing one! */
  1119. crc = crc16_ccitt(u_buf, update.len, 0xffff);
  1120. if (crc != 0)
  1121. goto done;
  1122. /* We are now committed to overwriting the existing bootloader.
  1123. * Try really hard to write the new bootloader (including retries). */
  1124. fpec_init();
  1125. for (retry = 0; retry < 3; retry++) {
  1126. erase_old_bootloader();
  1127. fpec_write(u_buf, update.len, BL_START);
  1128. crc = crc16_ccitt((void *)BL_START, update.len, 0xffff);
  1129. if (crc == 0)
  1130. goto done;
  1131. }
  1132. done:
  1133. printk("Final CRC: %04x (%s)\n", crc, crc ? "FAIL" : "OK");
  1134. u_buf[0] = !!crc;
  1135. floppy_state = ST_command_wait;
  1136. floppy_end_command(u_buf, 1);
  1137. }
  1138. static void process_command(void)
  1139. {
  1140. uint8_t cmd = u_buf[0];
  1141. uint8_t len = u_buf[1];
  1142. uint8_t resp_sz = 2;
  1143. watchdog_arm();
  1144. act_led(TRUE);
  1145. switch (cmd) {
  1146. case CMD_GET_INFO: {
  1147. uint8_t idx = u_buf[2];
  1148. if (len != 3)
  1149. goto bad_command;
  1150. memset(&u_buf[2], 0, 32);
  1151. switch(idx) {
  1152. case GETINFO_FIRMWARE: /* gw_info */
  1153. gw_info.fw_major = fw_major;
  1154. gw_info.fw_minor = fw_minor;
  1155. memcpy(&u_buf[2], &gw_info, sizeof(gw_info));
  1156. break;
  1157. case GETINFO_BW_STATS: /* gw_bw_stats */ {
  1158. struct gw_bw_stats bw;
  1159. bw.min_bw.bytes = U_BUF_SZ;
  1160. bw.min_bw.usecs = ss.max_delta / time_us(1);
  1161. bw.max_bw.bytes = U_BUF_SZ;
  1162. bw.max_bw.usecs = ss.min_delta / time_us(1);
  1163. memcpy(&u_buf[2], &bw, sizeof(bw));
  1164. break;
  1165. }
  1166. default:
  1167. goto bad_command;
  1168. }
  1169. resp_sz += 32;
  1170. break;
  1171. }
  1172. case CMD_UPDATE: {
  1173. uint32_t u_len = *(uint32_t *)&u_buf[2];
  1174. uint32_t signature = *(uint32_t *)&u_buf[6];
  1175. if (len != 10) goto bad_command;
  1176. if (signature != 0xdeafbee3) goto bad_command;
  1177. u_buf[1] = update_prep(u_len);
  1178. goto out;
  1179. }
  1180. case CMD_SEEK: {
  1181. int8_t cyl = u_buf[2];
  1182. if (len != 3)
  1183. goto bad_command;
  1184. u_buf[1] = floppy_seek(cyl);
  1185. goto out;
  1186. }
  1187. case CMD_HEAD: {
  1188. uint8_t head = u_buf[2];
  1189. if ((len != 3) || (head > 1))
  1190. goto bad_command;
  1191. write_pin(head, head);
  1192. break;
  1193. }
  1194. case CMD_SET_PARAMS: {
  1195. uint8_t idx = u_buf[2];
  1196. if ((len < 3) || (idx != PARAMS_DELAYS)
  1197. || (len > (3 + sizeof(delay_params))))
  1198. goto bad_command;
  1199. memcpy(&delay_params, &u_buf[3], len-3);
  1200. break;
  1201. }
  1202. case CMD_GET_PARAMS: {
  1203. uint8_t idx = u_buf[2];
  1204. uint8_t nr = u_buf[3];
  1205. if ((len != 4) || (idx != PARAMS_DELAYS)
  1206. || (nr > sizeof(delay_params)))
  1207. goto bad_command;
  1208. memcpy(&u_buf[2], &delay_params, nr);
  1209. resp_sz += nr;
  1210. break;
  1211. }
  1212. case CMD_MOTOR: {
  1213. uint8_t unit = u_buf[2], on_off = u_buf[3];
  1214. if ((len != 4) || (on_off & ~1))
  1215. goto bad_command;
  1216. u_buf[1] = drive_motor(unit, on_off & 1);
  1217. goto out;
  1218. }
  1219. case CMD_READ_FLUX: {
  1220. struct gw_read_flux rf = {
  1221. .max_index_linger = sample_us(500)
  1222. };
  1223. if ((len < (2 + offsetof(struct gw_read_flux, max_index_linger)))
  1224. || (len > (2 + sizeof(rf))))
  1225. goto bad_command;
  1226. memcpy(&rf, &u_buf[2], len-2);
  1227. u_buf[1] = floppy_read_prep(&rf);
  1228. goto out;
  1229. }
  1230. case CMD_WRITE_FLUX: {
  1231. struct gw_write_flux wf;
  1232. if (len != (2 + sizeof(wf)))
  1233. goto bad_command;
  1234. memcpy(&wf, &u_buf[2], len-2);
  1235. u_buf[1] = floppy_write_prep(&wf);
  1236. goto out;
  1237. }
  1238. case CMD_GET_FLUX_STATUS: {
  1239. if (len != 2)
  1240. goto bad_command;
  1241. u_buf[1] = flux_op.status;
  1242. goto out;
  1243. }
  1244. case CMD_SELECT: {
  1245. uint8_t unit = u_buf[2];
  1246. if (len != 3)
  1247. goto bad_command;
  1248. u_buf[1] = drive_select(unit);
  1249. goto out;
  1250. }
  1251. case CMD_DESELECT: {
  1252. if (len != 2)
  1253. goto bad_command;
  1254. drive_deselect();
  1255. break;
  1256. }
  1257. case CMD_SET_BUS_TYPE: {
  1258. uint8_t type = u_buf[2];
  1259. if ((len != 3) || !set_bus_type(type))
  1260. goto bad_command;
  1261. break;
  1262. }
  1263. case CMD_SET_PIN: {
  1264. uint8_t pin = u_buf[2];
  1265. uint8_t level = u_buf[3];
  1266. if ((len != 4) || (level & ~1))
  1267. goto bad_command;
  1268. u_buf[1] = set_user_pin(pin, level);
  1269. goto out;
  1270. }
  1271. case CMD_GET_PIN: {
  1272. uint8_t pin = u_buf[2];
  1273. if (len != 3)
  1274. goto bad_command;
  1275. u_buf[1] = get_floppy_pin(pin, &u_buf[2]);
  1276. if (u_buf[1] == ACK_OKAY)
  1277. resp_sz += 1;
  1278. goto out;
  1279. }
  1280. case CMD_RESET: {
  1281. if (len != 2)
  1282. goto bad_command;
  1283. delay_params = factory_delay_params;
  1284. _set_bus_type(BUS_NONE);
  1285. reset_user_pins();
  1286. break;
  1287. }
  1288. case CMD_ERASE_FLUX: {
  1289. struct gw_erase_flux ef;
  1290. if (len != (2 + sizeof(ef)))
  1291. goto bad_command;
  1292. memcpy(&ef, &u_buf[2], len-2);
  1293. u_buf[1] = floppy_erase_prep(&ef);
  1294. goto out;
  1295. }
  1296. case CMD_SOURCE_BYTES:
  1297. case CMD_SINK_BYTES: {
  1298. struct gw_sink_source_bytes ssb;
  1299. if (len != (2 + sizeof(ssb)))
  1300. goto bad_command;
  1301. memcpy(&ssb, &u_buf[2], len-2);
  1302. floppy_state = (cmd == CMD_SOURCE_BYTES)
  1303. ? ST_source_bytes : ST_sink_bytes;
  1304. sink_source_prep(&ssb);
  1305. break;
  1306. }
  1307. case CMD_SWITCH_FW_MODE: {
  1308. uint8_t mode = u_buf[2];
  1309. if ((len != 3) || (mode & ~1))
  1310. goto bad_command;
  1311. if (mode == FW_MODE_BOOTLOADER) {
  1312. usb_deinit();
  1313. delay_ms(500);
  1314. _reset_flag = 0xdeadbeef;
  1315. dcache_disable();
  1316. system_reset();
  1317. }
  1318. break;
  1319. }
  1320. case CMD_TEST_MODE: {
  1321. uint32_t sig1 = *(uint32_t *)&u_buf[2];
  1322. uint32_t sig2 = *(uint32_t *)&u_buf[6];
  1323. if (len != 10) goto bad_command;
  1324. if (sig1 != 0x6e504b4e) goto bad_command;
  1325. if (sig2 != 0x382910d3) goto bad_command;
  1326. u_buf[1] = testmode_init();
  1327. if (u_buf[1] == ACK_OKAY)
  1328. floppy_state = ST_testmode;
  1329. goto out;
  1330. }
  1331. case CMD_NOCLICK_STEP: {
  1332. if (len != 2)
  1333. goto bad_command;
  1334. u_buf[1] = floppy_noclick_step();
  1335. goto out;
  1336. }
  1337. default:
  1338. goto bad_command;
  1339. }
  1340. u_buf[1] = ACK_OKAY;
  1341. out:
  1342. floppy_end_command(u_buf, resp_sz);
  1343. return;
  1344. bad_command:
  1345. u_buf[1] = ACK_BAD_COMMAND;
  1346. goto out;
  1347. }
  1348. static void floppy_configure(void)
  1349. {
  1350. watchdog_arm();
  1351. floppy_flux_end();
  1352. floppy_state = ST_command_wait;
  1353. u_cons = u_prod = 0;
  1354. act_led(FALSE);
  1355. }
  1356. void floppy_process(void)
  1357. {
  1358. int len;
  1359. if (watchdog.armed && (time_since(watchdog.deadline) >= 0)) {
  1360. floppy_configure();
  1361. quiesce_drives();
  1362. }
  1363. switch (floppy_state) {
  1364. case ST_command_wait:
  1365. len = ep_rx_ready(EP_RX);
  1366. if ((len >= 0) && (len < (U_BUF_SZ-u_prod))) {
  1367. usb_read(EP_RX, &u_buf[u_prod], len);
  1368. u_prod += len;
  1369. }
  1370. if ((u_prod >= 2) && (u_prod >= u_buf[1]) && ep_tx_ready(EP_TX)) {
  1371. process_command();
  1372. }
  1373. break;
  1374. case ST_zlp:
  1375. if (ep_tx_ready(EP_TX)) {
  1376. usb_write(EP_TX, NULL, 0);
  1377. floppy_state = ST_command_wait;
  1378. }
  1379. break;
  1380. case ST_read_flux:
  1381. case ST_read_flux_drain:
  1382. floppy_read();
  1383. break;
  1384. case ST_write_flux_wait_data:
  1385. floppy_write_wait_data();
  1386. break;
  1387. case ST_write_flux_wait_index:
  1388. floppy_write_wait_index();
  1389. break;
  1390. case ST_write_flux:
  1391. floppy_write();
  1392. break;
  1393. case ST_write_flux_drain:
  1394. floppy_write_drain();
  1395. break;
  1396. case ST_erase_flux:
  1397. floppy_erase();
  1398. break;
  1399. case ST_source_bytes:
  1400. source_bytes();
  1401. break;
  1402. case ST_sink_bytes:
  1403. sink_bytes();
  1404. break;
  1405. case ST_update_bootloader:
  1406. update_continue();
  1407. break;
  1408. case ST_testmode:
  1409. watchdog.armed = FALSE;
  1410. testmode_process();
  1411. break;
  1412. default:
  1413. break;
  1414. }
  1415. }
  1416. const struct usb_class_ops usb_cdc_acm_ops = {
  1417. .reset = floppy_reset,
  1418. .configure = floppy_configure
  1419. };
  1420. /*
  1421. * INTERRUPT HANDLERS
  1422. */
  1423. static void IRQ_INDEX_changed(void)
  1424. {
  1425. unsigned int cnt = tim_rdata->cnt;
  1426. time_t now = time_now(), prev = index.isr_time;
  1427. /* Clear INDEX-changed flag. */
  1428. exti->pr = m(pin_index);
  1429. index.isr_time = now;
  1430. if (time_diff(prev, now) < time_us(50))
  1431. return;
  1432. index.count++;
  1433. index.rdata_cnt = cnt;
  1434. }
  1435. static void index_timer(void *unused)
  1436. {
  1437. time_t now = time_now();
  1438. IRQ_global_disable();
  1439. /* index.isr_time mustn't get so old that the time_diff() test in
  1440. * IRQ_INDEX_changed() overflows. To prevent this, we ensure that,
  1441. * at all times,
  1442. * time_diff(index.isr_time, time_now()) < 2*INDEX_TIMER_PERIOD + delta,
  1443. * where delta is small. */
  1444. if (time_diff(index.isr_time, now) > INDEX_TIMER_PERIOD)
  1445. index.isr_time = now - INDEX_TIMER_PERIOD;
  1446. IRQ_global_enable();
  1447. timer_set(&index.timer, now + INDEX_TIMER_PERIOD);
  1448. }
  1449. /*
  1450. * Local variables:
  1451. * mode: C
  1452. * c-file-style: "Linux"
  1453. * c-basic-offset: 4
  1454. * tab-width: 4
  1455. * indent-tabs-mode: nil
  1456. * End:
  1457. */