floppy.c 41 KB

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  1. /*
  2. * floppy.c
  3. *
  4. * Floppy interface control.
  5. *
  6. * Written & released by Keir Fraser <keir.xen@gmail.com>
  7. *
  8. * This is free and unencumbered software released into the public domain.
  9. * See the file COPYING for more details, or visit <http://unlicense.org>.
  10. */
  11. #define m(bitnr) (1u<<(bitnr))
  12. #define get_index() gpio_read_pin(gpio_index, pin_index)
  13. #define get_trk0() gpio_read_pin(gpio_trk0, pin_trk0)
  14. #define get_wrprot() gpio_read_pin(gpio_wrprot, pin_wrprot)
  15. #define configure_pin(pin, type) \
  16. gpio_configure_pin(gpio_##pin, pin_##pin, type)
  17. #define SAMPLE_MHZ 72
  18. #define TIM_PSC (SYSCLK_MHZ / SAMPLE_MHZ)
  19. #define sample_ns(x) (((x) * SAMPLE_MHZ) / 1000)
  20. #define sample_us(x) ((x) * SAMPLE_MHZ)
  21. #define time_from_samples(x) ((x) * TIME_MHZ / SAMPLE_MHZ)
  22. #define write_pin(pin, level) \
  23. gpio_write_pin(gpio_##pin, pin_##pin, level ? O_TRUE : O_FALSE)
  24. static int bus_type = -1;
  25. static int unit_nr = -1;
  26. static struct unit {
  27. int cyl;
  28. bool_t initialised;
  29. bool_t is_flippy;
  30. bool_t motor;
  31. } unit[3];
  32. static struct gw_delay delay_params;
  33. static const struct gw_delay factory_delay_params = {
  34. .select_delay = 10,
  35. .step_delay = 10000,
  36. .seek_settle = 15,
  37. .motor_delay = 750,
  38. .watchdog = 10000
  39. };
  40. #if MCU == STM32F1
  41. #include "mcu/stm32f1/floppy.c"
  42. #elif MCU == STM32F7
  43. #include "mcu/stm32f7/floppy.c"
  44. #elif MCU == AT32F415
  45. #include "mcu/at32f415/floppy.c"
  46. #endif
  47. static struct index {
  48. /* Main code can reset this at will. */
  49. volatile unsigned int count;
  50. /* For synchronising index pulse reporting to the RDATA flux stream. */
  51. volatile unsigned int rdata_cnt;
  52. /* Last time at which ISR fired. */
  53. time_t isr_time;
  54. /* Timer structure for index_timer() calls. */
  55. struct timer timer;
  56. } index;
  57. /* Timer to clean up stale index.isr_time. */
  58. #define INDEX_TIMER_PERIOD time_ms(5000)
  59. static void index_timer(void *unused);
  60. /* A DMA buffer for running a timer associated with a floppy-data I/O pin. */
  61. static struct dma_ring {
  62. /* Indexes into the buf[] ring buffer. */
  63. uint16_t cons; /* dma_rd: our consumer index for flux samples */
  64. union {
  65. uint16_t prod; /* dma_wr: our producer index for flux samples */
  66. timcnt_t prev_sample; /* dma_rd: previous CCRx sample value */
  67. };
  68. /* DMA ring buffer of timer values (ARR or CCRx). */
  69. timcnt_t buf[512];
  70. } dma;
  71. static struct {
  72. time_t deadline;
  73. bool_t armed;
  74. } watchdog;
  75. /* Marshalling and unmarshalling of USB packets. */
  76. static struct {
  77. /* TRUE if a packet is ready: .data and .len are valid. */
  78. bool_t ready;
  79. /* Length and contents of the packet (if ready==TRUE). */
  80. unsigned int len;
  81. uint8_t data[USB_HS_MPS];
  82. } usb_packet;
  83. /* Read, write, erase: Shared command state. */
  84. static struct {
  85. union {
  86. time_t start; /* read, write: Time at which read/write started. */
  87. time_t end; /* erase: Time at which to end the erasure. */
  88. };
  89. uint8_t status;
  90. } flux_op;
  91. static enum {
  92. ST_inactive,
  93. ST_command_wait,
  94. ST_zlp,
  95. ST_read_flux,
  96. ST_read_flux_drain,
  97. ST_write_flux_wait_data,
  98. ST_write_flux_wait_index,
  99. ST_write_flux,
  100. ST_write_flux_drain,
  101. ST_erase_flux,
  102. ST_source_bytes,
  103. ST_sink_bytes,
  104. ST_update_bootloader,
  105. ST_testmode,
  106. } floppy_state = ST_inactive;
  107. static uint32_t u_cons, u_prod;
  108. #define U_MASK(x) ((x)&(U_BUF_SZ-1))
  109. static void drive_deselect(void)
  110. {
  111. int pin = -1;
  112. uint8_t rc;
  113. if (unit_nr == -1)
  114. return;
  115. switch (bus_type) {
  116. case BUS_IBMPC:
  117. switch (unit_nr) {
  118. case 0: pin = 14; break;
  119. case 1: pin = 12; break;
  120. }
  121. break;
  122. case BUS_SHUGART:
  123. switch (unit_nr) {
  124. case 0: pin = 10; break;
  125. case 1: pin = 12; break;
  126. case 2: pin = 14; break;
  127. }
  128. break;
  129. }
  130. rc = write_mapped_pin(board_config->msel_pins, pin, O_FALSE);
  131. ASSERT(rc == ACK_OKAY);
  132. unit_nr = -1;
  133. }
  134. static uint8_t drive_select(uint8_t nr)
  135. {
  136. int pin = -1;
  137. uint8_t rc;
  138. if (nr == unit_nr)
  139. return ACK_OKAY;
  140. drive_deselect();
  141. switch (bus_type) {
  142. case BUS_IBMPC:
  143. switch (nr) {
  144. case 0: pin = 14; break;
  145. case 1: pin = 12; break;
  146. default: return ACK_BAD_UNIT;
  147. }
  148. break;
  149. case BUS_SHUGART:
  150. switch (nr) {
  151. case 0: pin = 10; break;
  152. case 1: pin = 12; break;
  153. case 2: pin = 14; break;
  154. default: return ACK_BAD_UNIT;
  155. }
  156. break;
  157. default:
  158. return ACK_NO_BUS;
  159. }
  160. rc = write_mapped_pin(board_config->msel_pins, pin, O_TRUE);
  161. if (rc != ACK_OKAY)
  162. return ACK_BAD_UNIT;
  163. unit_nr = nr;
  164. delay_us(delay_params.select_delay);
  165. return ACK_OKAY;
  166. }
  167. static uint8_t drive_motor(uint8_t nr, bool_t on)
  168. {
  169. int pin = -1;
  170. uint8_t rc;
  171. switch (bus_type) {
  172. case BUS_IBMPC:
  173. if (nr >= 2)
  174. return ACK_BAD_UNIT;
  175. if (unit[nr].motor == on)
  176. return ACK_OKAY;
  177. switch (nr) {
  178. case 0: pin = 10; break;
  179. case 1: pin = 16; break;
  180. }
  181. break;
  182. case BUS_SHUGART:
  183. if (nr >= 3)
  184. return ACK_BAD_UNIT;
  185. /* All shugart units share one motor line. Alias them all to unit 0. */
  186. nr = 0;
  187. if (unit[nr].motor == on)
  188. return ACK_OKAY;
  189. pin = 16;
  190. break;
  191. default:
  192. return ACK_NO_BUS;
  193. }
  194. rc = write_mapped_pin(board_config->msel_pins, pin, on ? O_TRUE : O_FALSE);
  195. if (rc != ACK_OKAY)
  196. return ACK_BAD_UNIT;
  197. unit[nr].motor = on;
  198. if (on)
  199. delay_ms(delay_params.motor_delay);
  200. return ACK_OKAY;
  201. }
  202. static uint8_t set_user_pin(unsigned int pin, unsigned int level)
  203. {
  204. const struct pin_mapping *upin;
  205. for (upin = board_config->user_pins; upin->pin_id != 0; upin++) {
  206. if (upin->pin_id == pin)
  207. goto found;
  208. }
  209. return ACK_BAD_PIN;
  210. found:
  211. gpio_write_pin(gpio_from_id(upin->gpio_bank), upin->gpio_pin, level);
  212. return ACK_OKAY;
  213. }
  214. static void reset_user_pins(void)
  215. {
  216. const struct pin_mapping *upin;
  217. for (upin = board_config->user_pins; upin->pin_id != 0; upin++)
  218. gpio_write_pin(gpio_from_id(upin->gpio_bank), upin->gpio_pin, O_FALSE);
  219. }
  220. #define flippy_trk0_sensor_disable() flippy_trk0_sensor(HIGH)
  221. #define flippy_trk0_sensor_enable() flippy_trk0_sensor(LOW)
  222. static bool_t flippy_detect(void)
  223. {
  224. bool_t is_flippy;
  225. flippy_trk0_sensor_disable();
  226. is_flippy = (get_trk0() == HIGH);
  227. flippy_trk0_sensor_enable();
  228. return is_flippy;
  229. }
  230. static void step_dir_set(bool_t assert)
  231. {
  232. write_pin(dir, assert);
  233. delay_us(10);
  234. }
  235. #define step_dir_out() step_dir_set(FALSE)
  236. #define step_dir_in() step_dir_set(TRUE)
  237. static void step_once(void)
  238. {
  239. write_pin(step, TRUE);
  240. delay_us(15);
  241. write_pin(step, FALSE);
  242. delay_us(delay_params.step_delay);
  243. }
  244. static uint8_t floppy_seek_initialise(struct unit *u)
  245. {
  246. int nr;
  247. uint8_t rc;
  248. /* Synchronise to cylinder 0. */
  249. step_dir_out();
  250. for (nr = 0; nr < 256; nr++) {
  251. if (get_trk0() == LOW)
  252. goto found_cyl0;
  253. step_once();
  254. }
  255. rc = ACK_NO_TRK0;
  256. goto out;
  257. found_cyl0:
  258. u->cyl = 0;
  259. u->is_flippy = flippy_detect();
  260. if (u->is_flippy) {
  261. /* Trk0 sensor can be asserted at negative cylinder offsets. Seek
  262. * inwards until the sensor is deasserted. */
  263. delay_ms(delay_params.seek_settle); /* change of direction */
  264. step_dir_in();
  265. for (nr = 0; nr < 10; nr++) {
  266. step_once();
  267. if (get_trk0() == HIGH) {
  268. /* We are now at real cylinder 1. */
  269. u->cyl = 1;
  270. break;
  271. }
  272. }
  273. /* Bail if we didn't find cylinder 1. */
  274. if (u->cyl != 1) {
  275. rc = ACK_NO_TRK0;
  276. goto out;
  277. }
  278. }
  279. u->initialised = TRUE;
  280. rc = ACK_OKAY;
  281. out:
  282. delay_ms(delay_params.seek_settle);
  283. return rc;
  284. }
  285. static uint8_t floppy_seek(int cyl)
  286. {
  287. struct unit *u;
  288. int nr;
  289. if (unit_nr < 0)
  290. return ACK_NO_UNIT;
  291. u = &unit[unit_nr];
  292. if (!u->initialised) {
  293. uint8_t rc = floppy_seek_initialise(u);
  294. if (rc != ACK_OKAY)
  295. return rc;
  296. }
  297. if ((cyl < (u->is_flippy ? -8 : 0)) || (cyl > 100))
  298. return ACK_BAD_CYLINDER;
  299. if (u->cyl < cyl) {
  300. nr = cyl - u->cyl;
  301. step_dir_in();
  302. } else if (u->cyl > cyl) {
  303. if (cyl < 0)
  304. flippy_trk0_sensor_disable();
  305. nr = u->cyl - cyl;
  306. step_dir_out();
  307. } else /* u->cyl == cyl */ {
  308. return ACK_OKAY;
  309. }
  310. while (nr--)
  311. step_once();
  312. flippy_trk0_sensor_enable();
  313. delay_ms(delay_params.seek_settle);
  314. u->cyl = cyl;
  315. return ACK_OKAY;
  316. }
  317. static void floppy_flux_end(void)
  318. {
  319. /* Turn off write pins. */
  320. write_pin(wgate, FALSE);
  321. configure_pin(wdata, GPO_bus);
  322. /* Turn off timers. */
  323. tim_rdata->ccer = 0;
  324. tim_rdata->cr1 = 0;
  325. tim_rdata->sr = 0; /* dummy, drains any pending DMA */
  326. tim_wdata->ccer = 0;
  327. tim_wdata->cr1 = 0;
  328. tim_wdata->sr = 0; /* dummy, drains any pending DMA */
  329. /* Turn off DMA. */
  330. dma_rdata.cr &= ~DMA_CR_EN;
  331. dma_wdata.cr &= ~DMA_CR_EN;
  332. while ((dma_rdata.cr & DMA_CR_EN) || (dma_wdata.cr & DMA_CR_EN))
  333. continue;
  334. }
  335. static void quiesce_drives(void)
  336. {
  337. int i;
  338. floppy_flux_end();
  339. for (i = 0; i < ARRAY_SIZE(unit); i++) {
  340. struct unit *u = &unit[i];
  341. if (u->initialised && (u->cyl < 0)) {
  342. drive_select(i);
  343. floppy_seek(0);
  344. }
  345. if (u->motor)
  346. drive_motor(i, FALSE);
  347. }
  348. drive_deselect();
  349. watchdog.armed = FALSE;
  350. }
  351. static void _set_bus_type(uint8_t type)
  352. {
  353. quiesce_drives();
  354. bus_type = type;
  355. unit_nr = -1;
  356. memset(unit, 0, sizeof(unit));
  357. }
  358. static bool_t set_bus_type(uint8_t type)
  359. {
  360. if (type == bus_type)
  361. return TRUE;
  362. if (type > BUS_SHUGART)
  363. return FALSE;
  364. _set_bus_type(type);
  365. return TRUE;
  366. }
  367. static uint8_t get_floppy_pin(unsigned int pin, uint8_t *p_level)
  368. {
  369. uint8_t rc = ACK_OKAY;
  370. switch (pin) {
  371. case 8:
  372. *p_level = get_index();
  373. break;
  374. case 26:
  375. *p_level = get_trk0();
  376. break;
  377. case 28:
  378. *p_level = get_wrprot();
  379. break;
  380. default:
  381. rc = mcu_get_floppy_pin(pin, p_level);
  382. break;
  383. }
  384. return rc;
  385. }
  386. static void floppy_reset(void)
  387. {
  388. floppy_state = ST_inactive;
  389. quiesce_drives();
  390. act_led(FALSE);
  391. }
  392. void floppy_init(void)
  393. {
  394. floppy_mcu_init();
  395. /* Output pins, unbuffered. */
  396. configure_pin(dir, GPO_bus);
  397. configure_pin(step, GPO_bus);
  398. configure_pin(wgate, GPO_bus);
  399. configure_pin(head, GPO_bus);
  400. configure_pin(wdata, GPO_bus);
  401. /* Input pins. */
  402. configure_pin(index, GPI_bus);
  403. configure_pin(trk0, GPI_bus);
  404. configure_pin(wrprot, GPI_bus);
  405. /* Configure INDEX-changed IRQs and timer. */
  406. timer_init(&index.timer, index_timer, NULL);
  407. index_timer(NULL);
  408. exti->rtsr = 0;
  409. exti->imr = exti->ftsr = m(pin_index);
  410. IRQx_set_prio(irq_index, INDEX_IRQ_PRI);
  411. IRQx_enable(irq_index);
  412. delay_params = factory_delay_params;
  413. _set_bus_type(BUS_NONE);
  414. }
  415. struct gw_info gw_info = {
  416. .is_main_firmware = 1,
  417. .max_cmd = CMD_MAX,
  418. .sample_freq = 72000000u,
  419. .hw_model = MCU
  420. };
  421. static void watchdog_kick(void)
  422. {
  423. watchdog.deadline = time_now() + time_ms(delay_params.watchdog);
  424. }
  425. static void watchdog_arm(void)
  426. {
  427. watchdog.armed = TRUE;
  428. watchdog_kick();
  429. }
  430. static void floppy_end_command(void *ack, unsigned int ack_len)
  431. {
  432. watchdog_arm();
  433. usb_write(EP_TX, ack, ack_len);
  434. u_cons = u_prod = 0;
  435. if (floppy_state == ST_command_wait)
  436. act_led(FALSE);
  437. if (ack_len == usb_bulk_mps) {
  438. ASSERT(floppy_state == ST_command_wait);
  439. floppy_state = ST_zlp;
  440. }
  441. }
  442. /*
  443. * READ PATH
  444. */
  445. static struct {
  446. unsigned int nr_index;
  447. unsigned int max_index;
  448. uint32_t max_index_linger;
  449. time_t deadline;
  450. } read;
  451. static void _write_28bit(uint32_t x)
  452. {
  453. u_buf[U_MASK(u_prod++)] = 1 | (x << 1);
  454. u_buf[U_MASK(u_prod++)] = 1 | (x >> 6);
  455. u_buf[U_MASK(u_prod++)] = 1 | (x >> 13);
  456. u_buf[U_MASK(u_prod++)] = 1 | (x >> 20);
  457. }
  458. static void rdata_encode_flux(void)
  459. {
  460. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  461. uint16_t cons = dma.cons, prod;
  462. timcnt_t prev = dma.prev_sample, curr, next;
  463. uint32_t ticks;
  464. /* We don't want to race the Index IRQ handler. */
  465. IRQ_global_disable();
  466. /* Find out where the DMA engine's producer index has got to. */
  467. prod = (ARRAY_SIZE(dma.buf) - dma_rdata.ndtr) & buf_mask;
  468. if (read.nr_index != index.count) {
  469. /* We have just passed the index mark: Record information about
  470. * the just-completed revolution. */
  471. read.nr_index = index.count;
  472. ticks = (timcnt_t)(index.rdata_cnt - prev);
  473. IRQ_global_enable(); /* we're done reading ISR variables */
  474. u_buf[U_MASK(u_prod++)] = 0xff;
  475. u_buf[U_MASK(u_prod++)] = FLUXOP_INDEX;
  476. _write_28bit(ticks);
  477. /* Defer watchdog while read is progressing (as measured by index
  478. * pulses). */
  479. watchdog_kick();
  480. }
  481. IRQ_global_enable();
  482. /* Process the flux timings into the raw bitcell buffer. */
  483. for (; cons != prod; cons = (cons+1) & buf_mask) {
  484. next = dma.buf[cons];
  485. curr = next - prev;
  486. prev = next;
  487. ticks = curr;
  488. if (ticks == 0) {
  489. /* 0: Skip. */
  490. } else if (ticks < 250) {
  491. /* 1-249: One byte. */
  492. u_buf[U_MASK(u_prod++)] = ticks;
  493. } else {
  494. unsigned int high = (ticks-250) / 255;
  495. if (high < 5) {
  496. /* 250-1524: Two bytes. */
  497. u_buf[U_MASK(u_prod++)] = 250 + high;
  498. u_buf[U_MASK(u_prod++)] = 1 + ((ticks-250) % 255);
  499. } else {
  500. /* 1525-(2^28-1): Seven bytes. */
  501. u_buf[U_MASK(u_prod++)] = 0xff;
  502. u_buf[U_MASK(u_prod++)] = FLUXOP_SPACE;
  503. _write_28bit(ticks - 249);
  504. u_buf[U_MASK(u_prod++)] = 249;
  505. }
  506. }
  507. }
  508. /* If it has been a long time since the last flux timing, transfer some of
  509. * the accumulated time to the host in a "long gap" sample. This avoids
  510. * timing overflow and, because we take care to keep @prev well behind the
  511. * sample clock, we cannot race the next flux timestamp. */
  512. curr = tim_rdata->cnt - prev;
  513. if (unlikely(curr > sample_us(400))) {
  514. ticks = sample_us(200);
  515. u_buf[U_MASK(u_prod++)] = 0xff;
  516. u_buf[U_MASK(u_prod++)] = FLUXOP_SPACE;
  517. _write_28bit(ticks);
  518. prev += ticks;
  519. }
  520. /* Save our progress for next time. */
  521. dma.cons = cons;
  522. dma.prev_sample = prev;
  523. }
  524. static uint8_t floppy_read_prep(const struct gw_read_flux *rf)
  525. {
  526. /* Prepare Timer & DMA. */
  527. dma_rdata.mar = (uint32_t)(unsigned long)dma.buf;
  528. dma_rdata.ndtr = ARRAY_SIZE(dma.buf);
  529. rdata_prep();
  530. /* DMA soft state. */
  531. dma.cons = 0;
  532. dma.prev_sample = tim_rdata->cnt;
  533. /* Start Timer. */
  534. tim_rdata->cr1 = TIM_CR1_CEN;
  535. index.count = 0;
  536. usb_packet.ready = FALSE;
  537. floppy_state = ST_read_flux;
  538. flux_op.start = time_now();
  539. flux_op.status = ACK_OKAY;
  540. memset(&read, 0, sizeof(read));
  541. read.max_index = rf->max_index ?: INT_MAX;
  542. read.deadline = flux_op.start;
  543. read.deadline += rf->ticks ? time_from_samples(rf->ticks) : INT_MAX;
  544. read.max_index_linger = time_from_samples(rf->max_index_linger);
  545. return ACK_OKAY;
  546. }
  547. static void make_read_packet(unsigned int n)
  548. {
  549. unsigned int c = U_MASK(u_cons);
  550. unsigned int l = U_BUF_SZ - c;
  551. if (l < n) {
  552. memcpy(usb_packet.data, &u_buf[c], l);
  553. memcpy(&usb_packet.data[l], u_buf, n-l);
  554. } else {
  555. memcpy(usb_packet.data, &u_buf[c], n);
  556. }
  557. u_cons += n;
  558. usb_packet.ready = TRUE;
  559. usb_packet.len = n;
  560. }
  561. static void floppy_read(void)
  562. {
  563. unsigned int avail = (uint32_t)(u_prod - u_cons);
  564. if (floppy_state == ST_read_flux) {
  565. rdata_encode_flux();
  566. avail = (uint32_t)(u_prod - u_cons);
  567. if (avail > U_BUF_SZ) {
  568. /* Overflow */
  569. printk("OVERFLOW %u %u %u %u\n", u_cons, u_prod,
  570. usb_packet.ready, ep_tx_ready(EP_TX));
  571. floppy_flux_end();
  572. flux_op.status = ACK_FLUX_OVERFLOW;
  573. floppy_state = ST_read_flux_drain;
  574. u_cons = u_prod = avail = 0;
  575. } else if (read.nr_index >= read.max_index) {
  576. /* Index limit is reached: Now linger for the specified time. */
  577. time_t deadline = time_now() + read.max_index_linger;
  578. if (time_diff(deadline, read.deadline) > 0)
  579. read.deadline = deadline;
  580. /* Disable max_index check: It's now become a linger deadline. */
  581. read.max_index = INT_MAX;
  582. }
  583. else if (time_since(read.deadline) >= 0) {
  584. /* Deadline is reached: End the read now. */
  585. floppy_flux_end();
  586. floppy_state = ST_read_flux_drain;
  587. } else if ((index.count == 0)
  588. && (time_since(flux_op.start) > time_ms(2000))) {
  589. /* Timeout */
  590. printk("NO INDEX\n");
  591. floppy_flux_end();
  592. flux_op.status = ACK_NO_INDEX;
  593. floppy_state = ST_read_flux_drain;
  594. u_cons = u_prod = avail = 0;
  595. }
  596. } else if ((avail < usb_bulk_mps)
  597. && !usb_packet.ready
  598. && ep_tx_ready(EP_TX)) {
  599. /* Final packet, including ACK byte (NUL). */
  600. memset(usb_packet.data, 0, usb_bulk_mps);
  601. make_read_packet(avail);
  602. floppy_state = ST_command_wait;
  603. floppy_end_command(usb_packet.data, avail+1);
  604. return; /* FINISHED */
  605. }
  606. if (!usb_packet.ready && (avail >= usb_bulk_mps))
  607. make_read_packet(usb_bulk_mps);
  608. if (usb_packet.ready && ep_tx_ready(EP_TX)) {
  609. usb_write(EP_TX, usb_packet.data, usb_packet.len);
  610. usb_packet.ready = FALSE;
  611. }
  612. }
  613. /*
  614. * WRITE PATH
  615. */
  616. static struct {
  617. bool_t is_finished;
  618. bool_t cue_at_index;
  619. bool_t terminate_at_index;
  620. uint32_t astable_period;
  621. uint32_t ticks;
  622. enum {
  623. FLUXMODE_idle, /* generating no flux (awaiting next command) */
  624. FLUXMODE_oneshot, /* generating a single flux */
  625. FLUXMODE_astable /* generating a region of oscillating flux */
  626. } flux_mode;
  627. } write;
  628. static uint32_t _read_28bit(void)
  629. {
  630. uint32_t x;
  631. x = (u_buf[U_MASK(u_cons++)] ) >> 1;
  632. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 6;
  633. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 13;
  634. x |= (u_buf[U_MASK(u_cons++)] & 0xfe) << 20;
  635. return x;
  636. }
  637. static unsigned int _wdata_decode_flux(timcnt_t *tbuf, unsigned int nr)
  638. {
  639. #define MIN_PULSE sample_ns(800)
  640. unsigned int todo = nr;
  641. uint32_t x, ticks = write.ticks;
  642. if (todo == 0)
  643. return 0;
  644. switch (write.flux_mode) {
  645. case FLUXMODE_astable: {
  646. /* Produce flux transitions at the specified period. */
  647. uint32_t pulse = write.astable_period;
  648. while (ticks >= pulse) {
  649. *tbuf++ = pulse - 1;
  650. ticks -= pulse;
  651. if (!--todo)
  652. goto out;
  653. }
  654. write.flux_mode = FLUXMODE_idle;
  655. break;
  656. }
  657. case FLUXMODE_oneshot:
  658. /* If ticks to next flux would overflow the hardware counter, insert
  659. * extra fluxes as necessary to get us to the proper next flux. */
  660. while (ticks != (timcnt_t)ticks) {
  661. uint32_t pulse = (timcnt_t)-1 + 1;
  662. *tbuf++ = pulse - 1;
  663. ticks -= pulse;
  664. if (!--todo)
  665. goto out;
  666. }
  667. /* Process the one-shot unless it's too short, in which case
  668. * it will be merged into the next region. */
  669. if (ticks > MIN_PULSE) {
  670. *tbuf++ = ticks - 1;
  671. ticks = 0;
  672. if (!--todo)
  673. goto out;
  674. }
  675. write.flux_mode = FLUXMODE_idle;
  676. break;
  677. case FLUXMODE_idle:
  678. /* Nothing to do (waiting for a flux command). */
  679. break;
  680. }
  681. while (u_cons != u_prod) {
  682. ASSERT(write.flux_mode == FLUXMODE_idle);
  683. x = u_buf[U_MASK(u_cons)];
  684. if (x == 0) {
  685. /* 0: Terminate */
  686. u_cons++;
  687. write.is_finished = TRUE;
  688. goto out;
  689. } else if (x < 250) {
  690. /* 1-249: One byte. Time to next flux.*/
  691. u_cons++;
  692. } else if (x < 255) {
  693. /* 250-254: Two bytes. Time to next flux. */
  694. if ((uint32_t)(u_prod - u_cons) < 2)
  695. goto out;
  696. u_cons++;
  697. x = 250 + (x - 250) * 255;
  698. x += u_buf[U_MASK(u_cons++)] - 1;
  699. } else {
  700. /* 255: Six bytes */
  701. uint8_t op;
  702. if ((uint32_t)(u_prod - u_cons) < 6)
  703. goto out;
  704. op = u_buf[U_MASK(u_cons+1)];
  705. u_cons += 2;
  706. switch (op) {
  707. case FLUXOP_SPACE:
  708. ticks += _read_28bit();
  709. continue;
  710. case FLUXOP_ASTABLE: {
  711. uint32_t period = _read_28bit();
  712. if ((period < MIN_PULSE) || (period != (timcnt_t)period)) {
  713. /* Bad period value: underflow or overflow. */
  714. goto error;
  715. }
  716. write.astable_period = period;
  717. write.flux_mode = FLUXMODE_astable;
  718. goto out;
  719. }
  720. default:
  721. /* Invalid opcode */
  722. u_cons += 4;
  723. goto error;
  724. }
  725. }
  726. /* We're now implicitly in FLUXMODE_oneshot, but we don't register it
  727. * explicitly as we usually switch straight back to FLUXMODE_idle. */
  728. ticks += x;
  729. /* This sample too small? Then ignore this flux transition. */
  730. if (ticks < MIN_PULSE)
  731. continue;
  732. /* This sample overflows the hardware timer's counter width?
  733. * Then bail, and we'll split it into chunks. */
  734. if (ticks != (timcnt_t)ticks) {
  735. write.flux_mode = FLUXMODE_oneshot;
  736. goto out;
  737. }
  738. *tbuf++ = ticks - 1;
  739. ticks = 0;
  740. if (!--todo)
  741. goto out;
  742. }
  743. out:
  744. write.ticks = ticks;
  745. return nr - todo;
  746. error:
  747. floppy_flux_end();
  748. flux_op.status = ACK_BAD_COMMAND;
  749. floppy_state = ST_write_flux_drain;
  750. goto out;
  751. }
  752. static void wdata_decode_flux(void)
  753. {
  754. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  755. uint16_t nr_to_wrap, nr_to_cons, nr, dmacons;
  756. /* Find out where the DMA engine's consumer index has got to. */
  757. dmacons = (ARRAY_SIZE(dma.buf) - dma_wdata.ndtr) & buf_mask;
  758. /* Find largest contiguous stretch of ring buffer we can fill. */
  759. nr_to_wrap = ARRAY_SIZE(dma.buf) - dma.prod;
  760. nr_to_cons = (dmacons - dma.prod - 1) & buf_mask;
  761. nr = min(nr_to_wrap, nr_to_cons);
  762. /* Now attempt to fill the contiguous stretch with flux data calculated
  763. * from buffered bitcell data. */
  764. dma.prod += _wdata_decode_flux(&dma.buf[dma.prod], nr);
  765. dma.prod &= buf_mask;
  766. }
  767. static void floppy_process_write_packet(void)
  768. {
  769. int len = ep_rx_ready(EP_RX);
  770. if ((len >= 0) && !usb_packet.ready) {
  771. usb_read(EP_RX, usb_packet.data, len);
  772. usb_packet.ready = TRUE;
  773. usb_packet.len = len;
  774. }
  775. if (usb_packet.ready) {
  776. unsigned int avail = U_BUF_SZ - (uint32_t)(u_prod - u_cons);
  777. unsigned int n = usb_packet.len;
  778. if (avail >= n) {
  779. unsigned int p = U_MASK(u_prod);
  780. unsigned int l = U_BUF_SZ - p;
  781. if (l < n) {
  782. memcpy(&u_buf[p], usb_packet.data, l);
  783. memcpy(u_buf, &usb_packet.data[l], n-l);
  784. } else {
  785. memcpy(&u_buf[p], usb_packet.data, n);
  786. }
  787. u_prod += n;
  788. usb_packet.ready = FALSE;
  789. }
  790. }
  791. }
  792. static uint8_t floppy_write_prep(const struct gw_write_flux *wf)
  793. {
  794. if (get_wrprot() == LOW)
  795. return ACK_WRPROT;
  796. wdata_prep();
  797. /* WDATA DMA setup: From a circular buffer into the WDATA Timer's ARR. */
  798. dma_wdata.par = (uint32_t)(unsigned long)&tim_wdata->arr;
  799. dma_wdata.mar = (uint32_t)(unsigned long)dma.buf;
  800. /* Initialise DMA ring indexes (consumer index is implicit). */
  801. dma_wdata.ndtr = ARRAY_SIZE(dma.buf);
  802. dma.prod = 0;
  803. usb_packet.ready = FALSE;
  804. floppy_state = ST_write_flux_wait_data;
  805. flux_op.status = ACK_OKAY;
  806. memset(&write, 0, sizeof(write));
  807. write.flux_mode = FLUXMODE_idle;
  808. write.cue_at_index = wf->cue_at_index;
  809. write.terminate_at_index = wf->terminate_at_index;
  810. return ACK_OKAY;
  811. }
  812. static void floppy_write_wait_data(void)
  813. {
  814. bool_t write_finished;
  815. unsigned int u_buf_threshold;
  816. floppy_process_write_packet();
  817. wdata_decode_flux();
  818. if (flux_op.status != ACK_OKAY)
  819. return;
  820. /* We don't wait for the massive F7 u_buf[] to fill at Full Speed. */
  821. u_buf_threshold = ((U_BUF_SZ > 16384) && !usb_is_highspeed())
  822. ? 16384 - 512 : U_BUF_SZ - 512;
  823. /* Wait for DMA and input buffers to fill, or write stream to end. We must
  824. * take care because, since we are not yet draining the DMA buffer, the
  825. * write stream may end without us noticing and setting write.is_finished.
  826. * Hence we peek for a NUL byte in the input buffer if it's non-empty. */
  827. write_finished = ((u_prod == u_cons)
  828. ? write.is_finished
  829. : (u_buf[U_MASK(u_prod-1)] == 0));
  830. if (((dma.prod != (ARRAY_SIZE(dma.buf)-1))
  831. || ((uint32_t)(u_prod - u_cons) < u_buf_threshold))
  832. && !write_finished)
  833. return;
  834. floppy_state = ST_write_flux_wait_index;
  835. flux_op.start = time_now();
  836. /* Enable DMA only after flux values are generated. */
  837. dma_wdata_start();
  838. /* Preload timer with first flux value. */
  839. tim_wdata->egr = TIM_EGR_UG;
  840. tim_wdata->sr = 0; /* dummy write, gives h/w time to process EGR.UG=1 */
  841. barrier(); /* Trigger timer update /then/ wait for next index pulse */
  842. index.count = 0;
  843. }
  844. static void floppy_write_wait_index(void)
  845. {
  846. if (write.cue_at_index && (index.count == 0)) {
  847. if (time_since(flux_op.start) > time_ms(2000)) {
  848. /* Timeout */
  849. floppy_flux_end();
  850. flux_op.status = ACK_NO_INDEX;
  851. floppy_state = ST_write_flux_drain;
  852. }
  853. return;
  854. }
  855. /* Start timer. */
  856. tim_wdata->cr1 = TIM_CR1_CEN;
  857. /* Enable output. */
  858. configure_pin(wdata, AFO_bus);
  859. write_pin(wgate, TRUE);
  860. index.count = 0;
  861. floppy_state = ST_write_flux;
  862. }
  863. static void floppy_write_check_underflow(void)
  864. {
  865. uint32_t avail = u_prod - u_cons;
  866. if (/* We've run the input buffer dry. */
  867. (avail == 0)
  868. /* The input buffer is nearly dry, and doesn't contain EOStream. */
  869. || ((avail < 16) && (u_buf[U_MASK(u_prod-1)] != 0))) {
  870. /* Underflow */
  871. printk("UNDERFLOW %u %u %u %u\n", u_cons, u_prod,
  872. usb_packet.ready, ep_rx_ready(EP_RX));
  873. floppy_flux_end();
  874. flux_op.status = ACK_FLUX_UNDERFLOW;
  875. floppy_state = ST_write_flux_drain;
  876. }
  877. }
  878. static void floppy_write(void)
  879. {
  880. const uint16_t buf_mask = ARRAY_SIZE(dma.buf) - 1;
  881. uint16_t dmacons, todo, prev_todo;
  882. floppy_process_write_packet();
  883. wdata_decode_flux();
  884. if (flux_op.status != ACK_OKAY)
  885. return;
  886. /* Early termination on index pulse? */
  887. if (write.terminate_at_index && (index.count != 0))
  888. goto terminate;
  889. if (!write.is_finished) {
  890. floppy_write_check_underflow();
  891. return;
  892. }
  893. /* Wait for DMA ring to drain. */
  894. todo = ~0;
  895. do {
  896. /* Check for early termination on index pulse. */
  897. if (write.terminate_at_index && (index.count != 0))
  898. goto terminate;
  899. /* Check progress of draining the DMA ring. */
  900. prev_todo = todo;
  901. dmacons = (ARRAY_SIZE(dma.buf) - dma_wdata.ndtr) & buf_mask;
  902. todo = (dma.prod - dmacons) & buf_mask;
  903. } while ((todo != 0) && (todo <= prev_todo));
  904. terminate:
  905. floppy_flux_end();
  906. floppy_state = ST_write_flux_drain;
  907. }
  908. static void floppy_write_drain(void)
  909. {
  910. /* Drain the write stream. */
  911. if (!write.is_finished) {
  912. floppy_process_write_packet();
  913. (void)_wdata_decode_flux(dma.buf, ARRAY_SIZE(dma.buf));
  914. return;
  915. }
  916. /* Wait for space to write ACK usb_packet. */
  917. if (!ep_tx_ready(EP_TX))
  918. return;
  919. /* ACK with Status byte. */
  920. u_buf[0] = flux_op.status;
  921. floppy_state = ST_command_wait;
  922. floppy_end_command(u_buf, 1);
  923. }
  924. /*
  925. * ERASE PATH
  926. */
  927. static uint8_t floppy_erase_prep(const struct gw_erase_flux *ef)
  928. {
  929. if (get_wrprot() == LOW)
  930. return ACK_WRPROT;
  931. write_pin(wgate, TRUE);
  932. floppy_state = ST_erase_flux;
  933. flux_op.status = ACK_OKAY;
  934. flux_op.end = time_now() + time_from_samples(ef->ticks);
  935. return ACK_OKAY;
  936. }
  937. static void floppy_erase(void)
  938. {
  939. if (time_since(flux_op.end) < 0)
  940. return;
  941. write_pin(wgate, FALSE);
  942. /* ACK with Status byte. */
  943. u_buf[0] = flux_op.status;
  944. floppy_state = ST_command_wait;
  945. floppy_end_command(u_buf, 1);
  946. }
  947. /*
  948. * SINK/SOURCE
  949. */
  950. static struct {
  951. unsigned int todo;
  952. unsigned int min_delta;
  953. unsigned int max_delta;
  954. } ss;
  955. static void sink_source_prep(const struct gw_sink_source_bytes *ssb)
  956. {
  957. ss.min_delta = INT_MAX;
  958. ss.max_delta = 0;
  959. ss.todo = ssb->nr_bytes;
  960. }
  961. static void ss_update_deltas(int len)
  962. {
  963. uint32_t *u_times = (uint32_t *)u_buf;
  964. time_t delta, now = time_now();
  965. unsigned int p = u_prod;
  966. /* Every four bytes we store a timestamp in a u_buf[]-sized ring buffer.
  967. * We then record min/max time taken to overwrite a previous timestamp. */
  968. while (len--) {
  969. if (p++ & 3)
  970. continue;
  971. delta = time_diff(u_times[U_MASK(p)>>2], now);
  972. u_times[U_MASK(p)>>2] = now;
  973. if ((delta > ss.max_delta) && (p >= U_BUF_SZ))
  974. ss.max_delta = delta;
  975. if ((delta < ss.min_delta) && (p >= U_BUF_SZ))
  976. ss.min_delta = delta;
  977. }
  978. u_prod = p;
  979. }
  980. static void source_bytes(void)
  981. {
  982. if (!ep_tx_ready(EP_TX))
  983. return;
  984. if (ss.todo < usb_bulk_mps) {
  985. floppy_state = ST_command_wait;
  986. floppy_end_command(usb_packet.data, ss.todo);
  987. return; /* FINISHED */
  988. }
  989. usb_write(EP_TX, usb_packet.data, usb_bulk_mps);
  990. ss.todo -= usb_bulk_mps;
  991. ss_update_deltas(usb_bulk_mps);
  992. }
  993. static void sink_bytes(void)
  994. {
  995. int len;
  996. if (ss.todo == 0) {
  997. /* We're done: Wait for space to write the ACK byte. */
  998. if (!ep_tx_ready(EP_TX))
  999. return;
  1000. u_buf[0] = ACK_OKAY;
  1001. floppy_state = ST_command_wait;
  1002. floppy_end_command(u_buf, 1);
  1003. return; /* FINISHED */
  1004. }
  1005. /* Packet ready? */
  1006. len = ep_rx_ready(EP_RX);
  1007. if (len < 0)
  1008. return;
  1009. /* Read it and adjust byte counter. */
  1010. usb_read(EP_RX, usb_packet.data, len);
  1011. ss.todo = (ss.todo <= len) ? 0 : ss.todo - len;
  1012. ss_update_deltas(len);
  1013. }
  1014. /*
  1015. * BOOTLOADER UPDATE
  1016. */
  1017. #define BL_START 0x08000000
  1018. #define BL_END ((uint32_t)_stext)
  1019. #define BL_SIZE (BL_END - BL_START)
  1020. static struct {
  1021. uint32_t len;
  1022. } update;
  1023. static void erase_old_bootloader(void)
  1024. {
  1025. uint32_t p;
  1026. for (p = BL_START; p < BL_END; p += FLASH_PAGE_SIZE)
  1027. fpec_page_erase(p);
  1028. }
  1029. static void update_prep(uint32_t len)
  1030. {
  1031. floppy_state = ST_update_bootloader;
  1032. update.len = len;
  1033. printk("Update Bootloader: %u bytes\n", len);
  1034. }
  1035. static void update_continue(void)
  1036. {
  1037. uint16_t crc;
  1038. int len, retry;
  1039. /* Read entire new bootloader into the u_buf[] ring. */
  1040. if ((len = ep_rx_ready(EP_RX)) >= 0) {
  1041. len = min_t(int, len, update.len - u_prod);
  1042. usb_read(EP_RX, &u_buf[u_prod], len);
  1043. u_prod += len;
  1044. }
  1045. /* Keep going until we have the entire bootloader. */
  1046. if ((u_prod < update.len) || !ep_tx_ready(EP_TX))
  1047. return;
  1048. /* Validate the new bootloader before erasing the existing one! */
  1049. crc = crc16_ccitt(u_buf, update.len, 0xffff);
  1050. if (crc != 0)
  1051. goto done;
  1052. /* We are now committed to overwriting the existing bootloader.
  1053. * Try really hard to write the new bootloader (including retries). */
  1054. fpec_init();
  1055. for (retry = 0; retry < 3; retry++) {
  1056. erase_old_bootloader();
  1057. fpec_write(u_buf, update.len, BL_START);
  1058. crc = crc16_ccitt((void *)BL_START, update.len, 0xffff);
  1059. if (crc == 0)
  1060. goto done;
  1061. }
  1062. done:
  1063. printk("Final CRC: %04x (%s)\n", crc, crc ? "FAIL" : "OK");
  1064. u_buf[0] = !!crc;
  1065. floppy_state = ST_command_wait;
  1066. floppy_end_command(u_buf, 1);
  1067. }
  1068. static void process_command(void)
  1069. {
  1070. uint8_t cmd = u_buf[0];
  1071. uint8_t len = u_buf[1];
  1072. uint8_t resp_sz = 2;
  1073. watchdog_arm();
  1074. act_led(TRUE);
  1075. switch (cmd) {
  1076. case CMD_GET_INFO: {
  1077. uint8_t idx = u_buf[2];
  1078. if (len != 3)
  1079. goto bad_command;
  1080. memset(&u_buf[2], 0, 32);
  1081. switch(idx) {
  1082. case GETINFO_FIRMWARE: /* gw_info */
  1083. gw_info.fw_major = fw_major;
  1084. gw_info.fw_minor = fw_minor;
  1085. memcpy(&u_buf[2], &gw_info, sizeof(gw_info));
  1086. break;
  1087. case GETINFO_BW_STATS: /* gw_bw_stats */ {
  1088. struct gw_bw_stats bw;
  1089. bw.min_bw.bytes = U_BUF_SZ;
  1090. bw.min_bw.usecs = ss.max_delta / time_us(1);
  1091. bw.max_bw.bytes = U_BUF_SZ;
  1092. bw.max_bw.usecs = ss.min_delta / time_us(1);
  1093. memcpy(&u_buf[2], &bw, sizeof(bw));
  1094. break;
  1095. }
  1096. default:
  1097. goto bad_command;
  1098. }
  1099. resp_sz += 32;
  1100. break;
  1101. }
  1102. case CMD_UPDATE: {
  1103. uint32_t u_len = *(uint32_t *)&u_buf[2];
  1104. uint32_t signature = *(uint32_t *)&u_buf[6];
  1105. if (len != 10) goto bad_command;
  1106. if (u_len & 3) goto bad_command;
  1107. if (u_len > BL_SIZE) goto bad_command;
  1108. if (signature != 0xdeafbee3) goto bad_command;
  1109. update_prep(u_len);
  1110. break;
  1111. }
  1112. case CMD_SEEK: {
  1113. int8_t cyl = u_buf[2];
  1114. if (len != 3)
  1115. goto bad_command;
  1116. u_buf[1] = floppy_seek(cyl);
  1117. goto out;
  1118. }
  1119. case CMD_HEAD: {
  1120. uint8_t head = u_buf[2];
  1121. if ((len != 3) || (head > 1))
  1122. goto bad_command;
  1123. write_pin(head, head);
  1124. break;
  1125. }
  1126. case CMD_SET_PARAMS: {
  1127. uint8_t idx = u_buf[2];
  1128. if ((len < 3) || (idx != PARAMS_DELAYS)
  1129. || (len > (3 + sizeof(delay_params))))
  1130. goto bad_command;
  1131. memcpy(&delay_params, &u_buf[3], len-3);
  1132. break;
  1133. }
  1134. case CMD_GET_PARAMS: {
  1135. uint8_t idx = u_buf[2];
  1136. uint8_t nr = u_buf[3];
  1137. if ((len != 4) || (idx != PARAMS_DELAYS)
  1138. || (nr > sizeof(delay_params)))
  1139. goto bad_command;
  1140. memcpy(&u_buf[2], &delay_params, nr);
  1141. resp_sz += nr;
  1142. break;
  1143. }
  1144. case CMD_MOTOR: {
  1145. uint8_t unit = u_buf[2], on_off = u_buf[3];
  1146. if ((len != 4) || (on_off & ~1))
  1147. goto bad_command;
  1148. u_buf[1] = drive_motor(unit, on_off & 1);
  1149. goto out;
  1150. }
  1151. case CMD_READ_FLUX: {
  1152. struct gw_read_flux rf = {
  1153. .max_index_linger = sample_us(500)
  1154. };
  1155. if ((len < (2 + offsetof(struct gw_read_flux, max_index_linger)))
  1156. || (len > (2 + sizeof(rf))))
  1157. goto bad_command;
  1158. memcpy(&rf, &u_buf[2], len-2);
  1159. u_buf[1] = floppy_read_prep(&rf);
  1160. goto out;
  1161. }
  1162. case CMD_WRITE_FLUX: {
  1163. struct gw_write_flux wf;
  1164. if (len != (2 + sizeof(wf)))
  1165. goto bad_command;
  1166. memcpy(&wf, &u_buf[2], len-2);
  1167. u_buf[1] = floppy_write_prep(&wf);
  1168. goto out;
  1169. }
  1170. case CMD_GET_FLUX_STATUS: {
  1171. if (len != 2)
  1172. goto bad_command;
  1173. u_buf[1] = flux_op.status;
  1174. goto out;
  1175. }
  1176. case CMD_SELECT: {
  1177. uint8_t unit = u_buf[2];
  1178. if (len != 3)
  1179. goto bad_command;
  1180. u_buf[1] = drive_select(unit);
  1181. goto out;
  1182. }
  1183. case CMD_DESELECT: {
  1184. if (len != 2)
  1185. goto bad_command;
  1186. drive_deselect();
  1187. break;
  1188. }
  1189. case CMD_SET_BUS_TYPE: {
  1190. uint8_t type = u_buf[2];
  1191. if ((len != 3) || !set_bus_type(type))
  1192. goto bad_command;
  1193. break;
  1194. }
  1195. case CMD_SET_PIN: {
  1196. uint8_t pin = u_buf[2];
  1197. uint8_t level = u_buf[3];
  1198. if ((len != 4) || (level & ~1))
  1199. goto bad_command;
  1200. u_buf[1] = set_user_pin(pin, level);
  1201. goto out;
  1202. }
  1203. case CMD_GET_PIN: {
  1204. uint8_t pin = u_buf[2];
  1205. if (len != 3)
  1206. goto bad_command;
  1207. u_buf[1] = get_floppy_pin(pin, &u_buf[2]);
  1208. if (u_buf[1] == ACK_OKAY)
  1209. resp_sz += 1;
  1210. goto out;
  1211. }
  1212. case CMD_RESET: {
  1213. if (len != 2)
  1214. goto bad_command;
  1215. delay_params = factory_delay_params;
  1216. _set_bus_type(BUS_NONE);
  1217. reset_user_pins();
  1218. break;
  1219. }
  1220. case CMD_ERASE_FLUX: {
  1221. struct gw_erase_flux ef;
  1222. if (len != (2 + sizeof(ef)))
  1223. goto bad_command;
  1224. memcpy(&ef, &u_buf[2], len-2);
  1225. u_buf[1] = floppy_erase_prep(&ef);
  1226. goto out;
  1227. }
  1228. case CMD_SOURCE_BYTES:
  1229. case CMD_SINK_BYTES: {
  1230. struct gw_sink_source_bytes ssb;
  1231. if (len != (2 + sizeof(ssb)))
  1232. goto bad_command;
  1233. memcpy(&ssb, &u_buf[2], len-2);
  1234. floppy_state = (cmd == CMD_SOURCE_BYTES)
  1235. ? ST_source_bytes : ST_sink_bytes;
  1236. sink_source_prep(&ssb);
  1237. break;
  1238. }
  1239. case CMD_SWITCH_FW_MODE: {
  1240. uint8_t mode = u_buf[2];
  1241. if ((len != 3) || (mode & ~1))
  1242. goto bad_command;
  1243. if (mode == FW_MODE_BOOTLOADER) {
  1244. usb_deinit();
  1245. delay_ms(500);
  1246. _reset_flag = 0xdeadbeef;
  1247. dcache_disable();
  1248. system_reset();
  1249. }
  1250. break;
  1251. }
  1252. #if MCU != STM32F1
  1253. case CMD_TEST_MODE: {
  1254. uint32_t sig1 = *(uint32_t *)&u_buf[2];
  1255. uint32_t sig2 = *(uint32_t *)&u_buf[6];
  1256. if (len != 10) goto bad_command;
  1257. if (sig1 != 0x6e504b4e) goto bad_command;
  1258. if (sig2 != 0x382910d3) goto bad_command;
  1259. floppy_state = ST_testmode;
  1260. break;
  1261. }
  1262. #endif
  1263. default:
  1264. goto bad_command;
  1265. }
  1266. u_buf[1] = ACK_OKAY;
  1267. out:
  1268. floppy_end_command(u_buf, resp_sz);
  1269. return;
  1270. bad_command:
  1271. u_buf[1] = ACK_BAD_COMMAND;
  1272. goto out;
  1273. }
  1274. static void floppy_configure(void)
  1275. {
  1276. watchdog_arm();
  1277. floppy_flux_end();
  1278. floppy_state = ST_command_wait;
  1279. u_cons = u_prod = 0;
  1280. act_led(FALSE);
  1281. }
  1282. void floppy_process(void)
  1283. {
  1284. int len;
  1285. if (watchdog.armed && (time_since(watchdog.deadline) >= 0)) {
  1286. floppy_configure();
  1287. quiesce_drives();
  1288. }
  1289. switch (floppy_state) {
  1290. case ST_command_wait:
  1291. len = ep_rx_ready(EP_RX);
  1292. if ((len >= 0) && (len < (U_BUF_SZ-u_prod))) {
  1293. usb_read(EP_RX, &u_buf[u_prod], len);
  1294. u_prod += len;
  1295. }
  1296. if ((u_prod >= 2) && (u_prod >= u_buf[1]) && ep_tx_ready(EP_TX)) {
  1297. process_command();
  1298. }
  1299. break;
  1300. case ST_zlp:
  1301. if (ep_tx_ready(EP_TX)) {
  1302. usb_write(EP_TX, NULL, 0);
  1303. floppy_state = ST_command_wait;
  1304. }
  1305. break;
  1306. case ST_read_flux:
  1307. case ST_read_flux_drain:
  1308. floppy_read();
  1309. break;
  1310. case ST_write_flux_wait_data:
  1311. floppy_write_wait_data();
  1312. break;
  1313. case ST_write_flux_wait_index:
  1314. floppy_write_wait_index();
  1315. break;
  1316. case ST_write_flux:
  1317. floppy_write();
  1318. break;
  1319. case ST_write_flux_drain:
  1320. floppy_write_drain();
  1321. break;
  1322. case ST_erase_flux:
  1323. floppy_erase();
  1324. break;
  1325. case ST_source_bytes:
  1326. source_bytes();
  1327. break;
  1328. case ST_sink_bytes:
  1329. sink_bytes();
  1330. break;
  1331. case ST_update_bootloader:
  1332. update_continue();
  1333. break;
  1334. #if MCU != STM32F1
  1335. case ST_testmode:
  1336. watchdog.armed = FALSE;
  1337. testmode_process();
  1338. break;
  1339. #endif
  1340. default:
  1341. break;
  1342. }
  1343. }
  1344. const struct usb_class_ops usb_cdc_acm_ops = {
  1345. .reset = floppy_reset,
  1346. .configure = floppy_configure
  1347. };
  1348. /*
  1349. * INTERRUPT HANDLERS
  1350. */
  1351. static void IRQ_INDEX_changed(void)
  1352. {
  1353. unsigned int cnt = tim_rdata->cnt;
  1354. time_t now = time_now(), prev = index.isr_time;
  1355. /* Clear INDEX-changed flag. */
  1356. exti->pr = m(pin_index);
  1357. index.isr_time = now;
  1358. if (time_diff(prev, now) < time_us(50))
  1359. return;
  1360. index.count++;
  1361. index.rdata_cnt = cnt;
  1362. }
  1363. static void index_timer(void *unused)
  1364. {
  1365. time_t now = time_now();
  1366. IRQ_global_disable();
  1367. /* index.isr_time mustn't get so old that the time_diff() test in
  1368. * IRQ_INDEX_changed() overflows. To prevent this, we ensure that,
  1369. * at all times,
  1370. * time_diff(index.isr_time, time_now()) < 2*INDEX_TIMER_PERIOD + delta,
  1371. * where delta is small. */
  1372. if (time_diff(index.isr_time, now) > INDEX_TIMER_PERIOD)
  1373. index.isr_time = now - INDEX_TIMER_PERIOD;
  1374. IRQ_global_enable();
  1375. timer_set(&index.timer, now + INDEX_TIMER_PERIOD);
  1376. }
  1377. /*
  1378. * Local variables:
  1379. * mode: C
  1380. * c-file-style: "Linux"
  1381. * c-basic-offset: 4
  1382. * tab-width: 4
  1383. * indent-tabs-mode: nil
  1384. * End:
  1385. */