shader_trans.hex 5.9 KB

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  1. 0x15827d80, 0x10020e27, // mov t0s, unif
  2. 0x009e7000, 0xa00009e7, // ldtmu0
  3. 0x0c9cc9c0, 0xd0020e27, // add t0s, r4, 3*4
  4. 0x009e7000, 0xa00009e7, // ldtmu0
  5. 0x0c827980, 0x100200a7, // add ra_src_base, r4, unif
  6. 0x15827d80, 0x10020e27, // mov t0s, unif
  7. 0x009e7000, 0xa00009e7, // ldtmu0
  8. 0x0c9cc9c0, 0xd0020e27, // add t0s, r4, 3*4
  9. 0x009e7000, 0xa00009e7, // ldtmu0
  10. 0x0c827980, 0x100200e7, // add ra_dst_base, r4, unif
  11. 0x15827d80, 0x100214a7, // mov rb_Y_STRIDE_SRC, unif
  12. 0x15827d80, 0x100214e7, // mov rb_Y_STRIDE_DST, unif
  13. 0x15827d80, 0x10021527, // mov rb_NX, unif
  14. 0x15827d80, 0x10021567, // mov rb_NY, unif
  15. 0x00000008, 0xe0021467, // mov rb_X_STRIDE, 2*4
  16. 0x00000010, 0xe0021427, // mov rb_0x10, 0x10
  17. 0xc0000000, 0xe0020827, // mov r0, vdw_setup_1(0)
  18. 0x0c9d31c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_DST
  19. 0x00000040, 0xe0020867, // mov r1, 16*4
  20. 0x0d9e7040, 0x100201a7, // sub ra_vdw_stride, r0, r1
  21. 0x40991037, 0x100049e0, // nop; mul24 r0, elem_num, rb_X_STRIDE
  22. 0x159e7000, 0x10021027, // mov rb_offsets_re+i, r0
  23. 0x0c9c41c0, 0xd0021227, // add rb_offsets_im+i, r0, 4
  24. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  25. 0x159e7000, 0x10021067, // mov rb_offsets_re+i, r0
  26. 0x0c9c41c0, 0xd0021267, // add rb_offsets_im+i, r0, 4
  27. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  28. 0x159e7000, 0x100210a7, // mov rb_offsets_re+i, r0
  29. 0x0c9c41c0, 0xd00212a7, // add rb_offsets_im+i, r0, 4
  30. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  31. 0x159e7000, 0x100210e7, // mov rb_offsets_re+i, r0
  32. 0x0c9c41c0, 0xd00212e7, // add rb_offsets_im+i, r0, 4
  33. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  34. 0x159e7000, 0x10021127, // mov rb_offsets_re+i, r0
  35. 0x0c9c41c0, 0xd0021327, // add rb_offsets_im+i, r0, 4
  36. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  37. 0x159e7000, 0x10021167, // mov rb_offsets_re+i, r0
  38. 0x0c9c41c0, 0xd0021367, // add rb_offsets_im+i, r0, 4
  39. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  40. 0x159e7000, 0x100211a7, // mov rb_offsets_re+i, r0
  41. 0x0c9c41c0, 0xd00213a7, // add rb_offsets_im+i, r0, 4
  42. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  43. 0x159e7000, 0x100211e7, // mov rb_offsets_re+i, r0
  44. 0x0c9c41c0, 0xd00213e7, // add rb_offsets_im+i, r0, 4
  45. 0x0c9d21c0, 0x10020827, // add r0, r0, rb_Y_STRIDE_SRC
  46. 0x00000000, 0xe0020067, // mov ra_y, 0
  47. 0x00000000, 0xe0020027, // mov ra_x, 0
  48. 0x40052037, 0x100049e1, // nop; mul24 r1, ra_y, rb_Y_STRIDE_SRC
  49. 0x40011037, 0x100049e0, // nop; mul24 r0, ra_x, rb_X_STRIDE
  50. 0x0c9e7040, 0x10020827, // add r0, r0, r1
  51. 0x0c0a7c00, 0x10020127, // add ra_src_cell, ra_src_base, r0
  52. 0x40013037, 0x100049e1, // nop; mul24 r1, ra_x, rb_Y_STRIDE_DST
  53. 0x40051037, 0x100049e0, // nop; mul24 r0, ra_y, rb_X_STRIDE
  54. 0x0c9e7040, 0x10020827, // add r0, r0, r1
  55. 0x0c0e7c00, 0x10020167, // add ra_dst_cell, ra_dst_base, r0
  56. 0x00001200, 0xe0021c67, // mov vw_setup, vpm_setup(16, 1, v32(0,0))
  57. 0x0c100dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re
  58. 0x0c108dc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im
  59. 0x0c101dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  60. 0x0c109dc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  61. 0x009e7000, 0xa00009e7, // ldtmu0
  62. 0x159e7900, 0x10020c27, // mov vpm, r4
  63. 0x009e7000, 0xb00009e7, // ldtmu1
  64. 0x159e7900, 0x10020c27, // mov vpm, r4
  65. 0x0c102dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  66. 0x0c10adc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  67. 0x009e7000, 0xa00009e7, // ldtmu0
  68. 0x159e7900, 0x10020c27, // mov vpm, r4
  69. 0x009e7000, 0xb00009e7, // ldtmu1
  70. 0x159e7900, 0x10020c27, // mov vpm, r4
  71. 0x0c103dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  72. 0x0c10bdc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  73. 0x009e7000, 0xa00009e7, // ldtmu0
  74. 0x159e7900, 0x10020c27, // mov vpm, r4
  75. 0x009e7000, 0xb00009e7, // ldtmu1
  76. 0x159e7900, 0x10020c27, // mov vpm, r4
  77. 0x0c104dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  78. 0x0c10cdc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  79. 0x009e7000, 0xa00009e7, // ldtmu0
  80. 0x159e7900, 0x10020c27, // mov vpm, r4
  81. 0x009e7000, 0xb00009e7, // ldtmu1
  82. 0x159e7900, 0x10020c27, // mov vpm, r4
  83. 0x0c105dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  84. 0x0c10ddc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  85. 0x009e7000, 0xa00009e7, // ldtmu0
  86. 0x159e7900, 0x10020c27, // mov vpm, r4
  87. 0x009e7000, 0xb00009e7, // ldtmu1
  88. 0x159e7900, 0x10020c27, // mov vpm, r4
  89. 0x0c106dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  90. 0x0c10edc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  91. 0x009e7000, 0xa00009e7, // ldtmu0
  92. 0x159e7900, 0x10020c27, // mov vpm, r4
  93. 0x009e7000, 0xb00009e7, // ldtmu1
  94. 0x159e7900, 0x10020c27, // mov vpm, r4
  95. 0x0c107dc0, 0x10020e27, // add t0s, ra_src_cell, rb_offsets_re+1+i
  96. 0x0c10fdc0, 0x10020f27, // add t1s, ra_src_cell, rb_offsets_im+1+i
  97. 0x009e7000, 0xa00009e7, // ldtmu0
  98. 0x159e7900, 0x10020c27, // mov vpm, r4
  99. 0x009e7000, 0xb00009e7, // ldtmu1
  100. 0x159e7900, 0x10020c27, // mov vpm, r4
  101. 0x009e7000, 0xa00009e7, // ldtmu0
  102. 0x159e7900, 0x10020c27, // mov vpm, r4
  103. 0x009e7000, 0xb00009e7, // ldtmu1
  104. 0x159e7900, 0x10020c27, // mov vpm, r4
  105. 0x88104000, 0xe0021c67, // mov vw_setup, vdw_setup_0(16, 16, dma_h32(0,0))
  106. 0x151a7d80, 0x10021c67, // mov vw_setup, ra_vdw_stride
  107. 0x15167d80, 0x10021ca7, // mov vw_addr, ra_dst_cell
  108. 0x159f2fc0, 0x100009e7, // mov -, vw_wait
  109. 0x0c010dc0, 0x10020027, // add ra_x, ra_x, rb_0x10
  110. 0x009e7000, 0x100009e7, // nop
  111. 0x0d014dc0, 0x100229e7, // sub.setf -, ra_x, rb_NX
  112. 0xfffffde0, 0xf01809e7, // brr.allnz -, r:inner
  113. 0x009e7000, 0x100009e7, // nop
  114. 0x009e7000, 0x100009e7, // nop
  115. 0x009e7000, 0x100009e7, // nop
  116. 0x0c048dc0, 0xd0020067, // add ra_y, ra_y, 8
  117. 0x009e7000, 0x100009e7, // nop
  118. 0x0d055dc0, 0x100229e7, // sub.setf -, ra_y, rb_NY
  119. 0xfffffda0, 0xf01809e7, // brr.allnz -, r:outer
  120. 0x009e7000, 0x100009e7, // nop
  121. 0x009e7000, 0x100009e7, // nop
  122. 0x009e7000, 0x100009e7, // nop
  123. 0x00000001, 0xe00209a7, // mov interrupt, 1
  124. 0x009e7000, 0x300009e7, // nop; nop; thrend
  125. 0x009e7000, 0x100009e7, // nop
  126. 0x009e7000, 0x100009e7, // nop