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@@ -121,7 +121,6 @@ byte m_msb[256]; // Command storage bytes
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/**
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* BSRR register generator
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* Totally configurable for which pin is each data bit, which pin is PTY, and which pin is REQ.
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- * The only requirement is that data and parity pins are in the same GPIO block.
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* REQ can be specified as -1 to ignore, as it doens't have to be in the same GPIO block.
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* This is dramatically slower than the original static array, but is easier to configure
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*/
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@@ -228,7 +227,6 @@ byte SCSI_INFO_BUF[SCSI_INFO_BUF_SIZE] = {
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inline byte readIO(void)
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{
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// Port input data register
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- // FIXED FOR BLACKSASI
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uint32_t ret = GPIOD->regs->IDR;
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byte bret = (byte)(~(ret));
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@@ -248,7 +246,6 @@ inline byte readIO(void)
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*/
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inline byte readHandshake(void)
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{
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- // FIXED FOR BLACKSASI
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SCSI_OUT(vREQ,active)
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//SCSI_DB_INPUT()
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while( ! SCSI_IN(vACK)) { if(m_isBusReset) return 0; }
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@@ -328,34 +325,6 @@ void setup()
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//Check which image to load
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switchImage();
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-/*
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-Should not be used due to buffers
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- // set up OTYPER for open drain on SCSI pins of PA and PB
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- // PA 0-7, 11-14
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- uint32_t oTypeA_And = 0x000078FF;
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- // PA 8, 9, 10, 15
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- uint32_t oTypeA_Or = 0x00008700;
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- GPIOA->regs->OTYPER = (GPIOA->regs->OTYPER & oTypeA_And) | oTypeA_Or;
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-
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- // PB 1, 11 are not used
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- uint32_t oTypeB_And = 0x00000000;
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- // PB 0, 2-10, 12-15 are used for SCSI, set open drain
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- uint32_t oTypeB_Or = 0x0000F7FD;
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- GPIOB->regs->OTYPER = (GPIOB->regs->OTYPER & oTypeB_And) | oTypeB_Or;
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-
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-
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- // PD 8-15 are not used
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- uint32_t oTypeD_And = 0b00000000000000001111111100000000;
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- // PD 0-7 are used for SCSI, set open drain
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- uint32_t oTypeD_Or = 0b00000000000000000000000011111111;
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- GPIOD->regs->OTYPER = (GPIOD->regs->OTYPER & oTypeD_And) | oTypeD_Or;
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-
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- // PE 1, 7-15 are not used
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- uint32_t oTypeE_And = 0b00000000000000001111111110000010;
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- // PE 0,2-6 are used for SCSI, set open drain
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- uint32_t oTypeE_Or = 0b00000000000000000000000001111101;
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- GPIOD->regs->OTYPER = (GPIOE->regs->OTYPER & oTypeE_And) | oTypeE_Or;
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-*/
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// Turn off the output port
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SCSI_TARGET_INACTIVE()
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