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Analysis & Synthesis report for max80
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-Fri Aug 6 18:17:26 2021
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+Fri Aug 6 18:26:14 2021
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Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
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@@ -67,7 +67,7 @@ https://fpgasoftware.intel.com/eula.
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+----------------------------------------------------------------------------------+
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; Analysis & Synthesis Summary ;
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+------------------------------------+---------------------------------------------+
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-; Analysis & Synthesis Status ; Successful - Fri Aug 6 18:17:26 2021 ;
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+; Analysis & Synthesis Status ; Successful - Fri Aug 6 18:26:14 2021 ;
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; Quartus Prime Version ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
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; Revision Name ; max80 ;
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; Top-level Entity Name ; max80 ;
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@@ -76,7 +76,7 @@ https://fpgasoftware.intel.com/eula.
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; Total combinational functions ; 274 ;
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; Dedicated logic registers ; 218 ;
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; Total registers ; 226 ;
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-; Total pins ; 138 ;
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+; Total pins ; 139 ;
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; Total virtual pins ; 0 ;
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; Total memory bits ; 0 ;
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; Embedded Multiplier 9-bit elements ; 0 ;
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@@ -237,7 +237,7 @@ https://fpgasoftware.intel.com/eula.
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; -- Dedicated logic registers ; 218 ;
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; -- I/O registers ; 16 ;
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; ; ;
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-; I/O pins ; 138 ;
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+; I/O pins ; 139 ;
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; ; ;
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; Embedded Multiplier 9-bit elements ; 0 ;
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; ; ;
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@@ -246,8 +246,8 @@ https://fpgasoftware.intel.com/eula.
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; ; ;
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; Maximum fan-out node ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock ;
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; Maximum fan-out ; 114 ;
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-; Total fan-out ; 1580 ;
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-; Average fan-out ; 1.91 ;
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+; Total fan-out ; 1582 ;
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+; Average fan-out ; 1.90 ;
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+---------------------------------------------+----------------------------------------------------------------------------------------+
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@@ -256,7 +256,7 @@ https://fpgasoftware.intel.com/eula.
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+--------------------------------------------------------------+---------------------+---------------------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------+---------------------------+--------------+
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; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ;
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+--------------------------------------------------------------+---------------------+---------------------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------+---------------------------+--------------+
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-; |max80 ; 274 (52) ; 218 (66) ; 0 ; 0 ; 0 ; 0 ; 138 ; 0 ; |max80 ; max80 ; work ;
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+; |max80 ; 274 (52) ; 218 (66) ; 0 ; 0 ; 0 ; 0 ; 139 ; 0 ; |max80 ; max80 ; work ;
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; |hdmitx:hdmitx| ; 78 (0) ; 109 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |max80|hdmitx:hdmitx ; hdmitx ; work ;
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; |altlvds_tx:ALTLVDS_TX_component| ; 78 (0) ; 109 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |max80|hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component ; altlvds_tx ; work ;
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; |hdmitx_lvds_tx:auto_generated| ; 78 (20) ; 109 (60) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |max80|hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated ; hdmitx_lvds_tx ; work ;
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@@ -1051,7 +1051,7 @@ Note: In order to hide this table in the UI and the text report file, please set
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+-----------------------+-----------------------------+
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; Type ; Count ;
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+-----------------------+-----------------------------+
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-; boundary_port ; 138 ;
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+; boundary_port ; 139 ;
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; cycloneiii_ddio_out ; 4 ;
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; cycloneiii_ff ; 218 ;
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; CLR ; 46 ;
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@@ -1060,7 +1060,7 @@ Note: In order to hide this table in the UI and the text report file, please set
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; ENA ; 27 ;
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; ENA CLR ; 12 ;
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; plain ; 106 ;
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-; cycloneiii_io_obuf ; 57 ;
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+; cycloneiii_io_obuf ; 58 ;
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; cycloneiii_lcell_comb ; 278 ;
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; arith ; 56 ;
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; 2 data inputs ; 39 ;
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@@ -1074,7 +1074,7 @@ Note: In order to hide this table in the UI and the text report file, please set
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; cycloneiii_pll ; 2 ;
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; ; ;
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; Max LUT depth ; 7.20 ;
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-; Average LUT depth ; 2.82 ;
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+; Average LUT depth ; 2.81 ;
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+-----------------------+-----------------------------+
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@@ -1093,7 +1093,7 @@ Note: In order to hide this table in the UI and the text report file, please set
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Info: *******************************************************************
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Info: Running Quartus Prime Analysis & Synthesis
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Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
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- Info: Processing started: Fri Aug 6 18:17:21 2021
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+ Info: Processing started: Fri Aug 6 18:26:08 2021
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Info: Command: quartus_map --read_settings_files=on --write_settings_files=off max80 -c max80
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Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
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Info (20030): Parallel compilation is enabled and will use 8 of the 8 processors detected
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@@ -1113,28 +1113,26 @@ Info (12021): Found 1 design units, including 1 entities, in source file tmdsenc
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Info (12023): Found entity 1: tmdsenc File: /home/hpa/abc80/max80/blinktest/tmdsenc.sv Line: 73
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Info (12021): Found 1 design units, including 1 entities, in source file max80.sv
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Info (12023): Found entity 1: max80 File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 11
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-Warning (10236): Verilog HDL Implicit Net warning at max80.sv(184): created implicit net for "hdmi_sck" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 184
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-Warning (10236): Verilog HDL Implicit Net warning at max80.sv(327): created implicit net for "spi_cs_flash_n" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 327
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+Warning (10236): Verilog HDL Implicit Net warning at max80.sv(185): created implicit net for "hdmi_sck" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 185
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Info (12127): Elaborating entity "max80" for the top level hierarchy
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(184): object "hdmi_sck" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 184
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(327): object "spi_cs_flash_n" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 327
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(216): object "abc_xmemrd" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 216
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(217): object "abc_xmemwr" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 217
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(220): object "abc_iord" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 220
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(221): object "abc_iowr" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 221
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-Warning (10858): Verilog HDL warning at max80.sv(224): object abc_wait used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 224
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-Warning (10858): Verilog HDL warning at max80.sv(225): object abc_resin used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 225
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-Warning (10858): Verilog HDL warning at max80.sv(226): object abc_int used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 226
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-Warning (10858): Verilog HDL warning at max80.sv(227): object abc_nmi used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 227
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-Warning (10858): Verilog HDL warning at max80.sv(228): object abc_xm used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 228
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-Warning (10036): Verilog HDL or VHDL warning at max80.sv(267): object "exth_d" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 267
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-Warning (10230): Verilog HDL assignment warning at max80.sv(155): truncated value with size 30 to match size of target (24) File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 155
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-Warning (10040): Verilog HDL or VHDL arithmetic warning at max80.sv(298): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 298
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-Warning (10030): Net "abc_wait" at max80.sv(224) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 224
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-Warning (10030): Net "abc_resin" at max80.sv(225) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 225
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-Warning (10030): Net "abc_int" at max80.sv(226) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 226
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-Warning (10030): Net "abc_nmi" at max80.sv(227) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 227
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-Warning (10030): Net "abc_xm" at max80.sv(228) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 228
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+Warning (10036): Verilog HDL or VHDL warning at max80.sv(185): object "hdmi_sck" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 185
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+Warning (10036): Verilog HDL or VHDL warning at max80.sv(217): object "abc_xmemrd" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 217
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+Warning (10036): Verilog HDL or VHDL warning at max80.sv(218): object "abc_xmemwr" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 218
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+Warning (10036): Verilog HDL or VHDL warning at max80.sv(221): object "abc_iord" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 221
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+Warning (10036): Verilog HDL or VHDL warning at max80.sv(222): object "abc_iowr" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 222
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+Warning (10858): Verilog HDL warning at max80.sv(225): object abc_wait used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 225
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+Warning (10858): Verilog HDL warning at max80.sv(226): object abc_resin used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 226
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+Warning (10858): Verilog HDL warning at max80.sv(227): object abc_int used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 227
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+Warning (10858): Verilog HDL warning at max80.sv(228): object abc_nmi used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 228
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+Warning (10858): Verilog HDL warning at max80.sv(229): object abc_xm used but never assigned File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 229
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+Warning (10036): Verilog HDL or VHDL warning at max80.sv(268): object "exth_d" assigned a value but never read File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 268
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+Warning (10230): Verilog HDL assignment warning at max80.sv(156): truncated value with size 30 to match size of target (24) File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 156
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+Warning (10040): Verilog HDL or VHDL arithmetic warning at max80.sv(299): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 299
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+Warning (10030): Net "abc_wait" at max80.sv(225) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 225
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+Warning (10030): Net "abc_resin" at max80.sv(226) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 226
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+Warning (10030): Net "abc_int" at max80.sv(227) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 227
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+Warning (10030): Net "abc_nmi" at max80.sv(228) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 228
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+Warning (10030): Net "abc_xm" at max80.sv(229) has no driver or initial value, using a default initial value '0' File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 229
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Warning (10034): Output port "abc_d_oe" at max80.sv(19) has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 19
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Warning (10034): Output port "abc_master" at max80.sv(38) has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 38
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Warning (10034): Output port "abc_a_oe" at max80.sv(39) has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 39
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@@ -1149,7 +1147,7 @@ Warning (10862): input port "abc_out_n" at max80.sv(22) has no fan-out File: /ho
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Warning (10862): input port "abc_inp_n" at max80.sv(23) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 23
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Warning (10862): bidir port "sr_dq" at max80.sv(60) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 60
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Warning (10862): bidir port "sd_dat" at max80.sv(70) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 70
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-Warning (10862): bidir port "gpio" at max80.sv(105) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 105
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+Warning (10862): bidir port "gpio" at max80.sv(106) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 106
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Warning (10862): input port "abc_clk" at max80.sv(16) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 16
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Warning (10862): input port "abc_rst_n" at max80.sv(20) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 20
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Warning (10862): input port "abc_cs_n" at max80.sv(21) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 21
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@@ -1172,17 +1170,18 @@ Warning (10862): bidir port "spi_clk" at max80.sv(86) has no fan-out File: /home
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Warning (10862): bidir port "spi_miso" at max80.sv(87) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 87
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Warning (10862): bidir port "spi_mosi" at max80.sv(88) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 88
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Warning (10862): bidir port "spi_cs_esp_n" at max80.sv(89) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 89
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-Warning (10862): bidir port "esp_io0" at max80.sv(92) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 92
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-Warning (10862): bidir port "esp_int" at max80.sv(93) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 93
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-Warning (10862): bidir port "i2c_scl" at max80.sv(96) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 96
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-Warning (10862): bidir port "i2c_sda" at max80.sv(97) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 97
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-Warning (10862): input port "rtc_32khz" at max80.sv(98) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 98
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-Warning (10862): input port "rtc_int_n" at max80.sv(99) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 99
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-Warning (10862): bidir port "hdmi_scl" at max80.sv(110) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 110
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-Warning (10863): bidir port "hdmi_sda" at max80.sv(111) has no fan-in File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 111
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-Warning (10862): bidir port "hdmi_sda" at max80.sv(111) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 111
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-Warning (10862): bidir port "hdmi_hpd" at max80.sv(113) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 113
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-Info (12128): Elaborating entity "pll" for hierarchy "pll:pll" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 139
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+Warning (10862): bidir port "spi_cs_flash_n" at max80.sv(90) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 90
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+Warning (10862): bidir port "esp_io0" at max80.sv(93) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 93
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+Warning (10862): bidir port "esp_int" at max80.sv(94) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 94
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+Warning (10862): bidir port "i2c_scl" at max80.sv(97) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 97
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+Warning (10862): bidir port "i2c_sda" at max80.sv(98) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 98
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+Warning (10862): input port "rtc_32khz" at max80.sv(99) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 99
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+Warning (10862): input port "rtc_int_n" at max80.sv(100) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 100
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+Warning (10862): bidir port "hdmi_scl" at max80.sv(111) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 111
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+Warning (10863): bidir port "hdmi_sda" at max80.sv(112) has no fan-in File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 112
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+Warning (10862): bidir port "hdmi_sda" at max80.sv(112) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 112
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+Warning (10862): bidir port "hdmi_hpd" at max80.sv(114) has no fan-out File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 114
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+Info (12128): Elaborating entity "pll" for hierarchy "pll:pll" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 140
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Info (12128): Elaborating entity "altpll" for hierarchy "pll:pll|altpll:altpll_component" File: /home/hpa/abc80/max80/blinktest/ip/pll.v Line: 127
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Info (12130): Elaborated megafunction instantiation "pll:pll|altpll:altpll_component" File: /home/hpa/abc80/max80/blinktest/ip/pll.v Line: 127
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Info (12133): Instantiated megafunction "pll:pll|altpll:altpll_component" with the following parameter: File: /home/hpa/abc80/max80/blinktest/ip/pll.v Line: 127
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@@ -1270,13 +1269,13 @@ Info (12128): Elaborating entity "pll_cntr" for hierarchy "pll:pll|altpll:altpll
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Info (12128): Elaborating entity "pll_cmpr" for hierarchy "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_cntr:phasestep_counter|pll_cmpr:cmpr12" File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 273
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Info (12128): Elaborating entity "pll_cntr1" for hierarchy "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_cntr1:pll_internal_phasestep" File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 573
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Info (12128): Elaborating entity "pll_cmpr1" for hierarchy "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_cntr1:pll_internal_phasestep|pll_cmpr1:cmpr14" File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 421
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-Info (12128): Elaborating entity "tmdsenc" for hierarchy "tmdsenc:hdmitmds[0].enc" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 179
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+Info (12128): Elaborating entity "tmdsenc" for hierarchy "tmdsenc:hdmitmds[0].enc" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 180
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Warning (10040): Verilog HDL or VHDL arithmetic warning at tmdsenc.sv(92): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/tmdsenc.sv Line: 92
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Warning (10040): Verilog HDL or VHDL arithmetic warning at tmdsenc.sv(134): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/tmdsenc.sv Line: 134
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Warning (10040): Verilog HDL or VHDL arithmetic warning at tmdsenc.sv(135): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/tmdsenc.sv Line: 135
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Warning (10040): Verilog HDL or VHDL arithmetic warning at tmdsenc.sv(140): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/tmdsenc.sv Line: 140
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Warning (10040): Verilog HDL or VHDL arithmetic warning at tmdsenc.sv(145): loss of carry in addition or borrow in subtraction File: /home/hpa/abc80/max80/blinktest/tmdsenc.sv Line: 145
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-Info (12128): Elaborating entity "transpose" for hierarchy "transpose:hdmitranspose" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 196
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+Info (12128): Elaborating entity "transpose" for hierarchy "transpose:hdmitranspose" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 197
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Warning (10269): Verilog HDL conditional expression warning at transpose.sv(64): expression is wider than one bit File: /home/hpa/abc80/max80/blinktest/transpose.sv Line: 64
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Warning (10269): Verilog HDL conditional expression warning at transpose.sv(65): expression is wider than one bit File: /home/hpa/abc80/max80/blinktest/transpose.sv Line: 65
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Warning (10269): Verilog HDL conditional expression warning at transpose.sv(67): expression is wider than one bit File: /home/hpa/abc80/max80/blinktest/transpose.sv Line: 67
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@@ -1284,7 +1283,7 @@ Info (12128): Elaborating entity "condreg" for hierarchy "transpose:hdmitranspos
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Warning (10269): Verilog HDL conditional expression warning at transpose.sv(14): expression is wider than one bit File: /home/hpa/abc80/max80/blinktest/transpose.sv Line: 14
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Warning (10269): Verilog HDL conditional expression warning at transpose.sv(15): expression is wider than one bit File: /home/hpa/abc80/max80/blinktest/transpose.sv Line: 15
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Warning (10862): input port "clk" at transpose.sv(8) has no fan-out File: /home/hpa/abc80/max80/blinktest/transpose.sv Line: 8
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-Info (12128): Elaborating entity "hdmitx" for hierarchy "hdmitx:hdmitx" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 205
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+Info (12128): Elaborating entity "hdmitx" for hierarchy "hdmitx:hdmitx" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 206
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Info (12128): Elaborating entity "altlvds_tx" for hierarchy "hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component" File: /home/hpa/abc80/max80/blinktest/ip/hdmitx.v Line: 74
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Info (12130): Elaborated megafunction instantiation "hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component" File: /home/hpa/abc80/max80/blinktest/ip/hdmitx.v Line: 74
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Info (12133): Instantiated megafunction "hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component" with the following parameter: File: /home/hpa/abc80/max80/blinktest/ip/hdmitx.v Line: 74
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@@ -1408,7 +1407,7 @@ Warning (13039): The following bidirectional pins have no drivers
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Warning (13040): bidirectional pin "abc_d[5]" has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 18
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Warning (13040): bidirectional pin "abc_d[6]" has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 18
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Warning (13040): bidirectional pin "abc_d[7]" has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 18
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- Warning (13040): bidirectional pin "hdmi_sda" has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 111
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+ Warning (13040): bidirectional pin "hdmi_sda" has no driver File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 112
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Warning (13032): The following tri-state nodes are fed by constants
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Warning (13033): The pin "sr_dq[0]" is fed by GND File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 60
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Warning (13033): The pin "sr_dq[1]" is fed by GND File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 60
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@@ -1510,18 +1509,18 @@ Warning (21074): Design contains 39 input pin(s) that do not drive logic
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Warning (15610): No output dependent on input pin "tty_rts" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 75
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Warning (15610): No output dependent on input pin "tty_dtr" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 77
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Warning (15610): No output dependent on input pin "flash_miso" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 83
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- Warning (15610): No output dependent on input pin "rtc_32khz" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 98
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- Warning (15610): No output dependent on input pin "rtc_int_n" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 99
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-Info (21057): Implemented 484 device resources after synthesis - the final resource count might be different
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+ Warning (15610): No output dependent on input pin "rtc_32khz" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 99
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+ Warning (15610): No output dependent on input pin "rtc_int_n" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 100
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+Info (21057): Implemented 485 device resources after synthesis - the final resource count might be different
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Info (21058): Implemented 40 input pins
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Info (21059): Implemented 47 output pins
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- Info (21060): Implemented 51 bidirectional pins
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+ Info (21060): Implemented 52 bidirectional pins
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Info (21061): Implemented 340 logic cells
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Info (21065): Implemented 2 PLLs
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-Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 218 warnings
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- Info: Peak virtual memory: 676 megabytes
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- Info: Processing ended: Fri Aug 6 18:17:26 2021
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- Info: Elapsed time: 00:00:05
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+Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 217 warnings
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+ Info: Peak virtual memory: 678 megabytes
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+ Info: Processing ended: Fri Aug 6 18:26:14 2021
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+ Info: Elapsed time: 00:00:06
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Info: Total CPU time (on all processors): 00:00:15
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