usb: use the same endpoint number for both directions

The same endpoint number can be used for input and output, so do that
to make things a little more compact.

fpga/usb/usb_desc.conf

@@ -81,9 +81,9 @@ usb_device {
 				 word(64),     # Max packet size
 				 byte(0)),     # Interval
 
-			# EP 1, output: downstream data
+			# EP 2, output: downstream data
 			usb_desc('endpoint',
-				 ep_o(1),
+				 ep_o(2),
 				 byte(2),	# Bulk, data
 				 word(64),	# Max packet size
 				 byte(0))       # Interval

fpga/usb/usb_desc.v

@@ -111,7 +111,7 @@ module usb_desc_rom (
 		rom[8'h5b] = 8'h00;
 		rom[8'h5c] = 8'h07;
 		rom[8'h5d] = 8'h05;
-		rom[8'h5e] = 8'h01;
+		rom[8'h5e] = 8'h02;
 		rom[8'h5f] = 8'h02;
 		rom[8'h60] = 8'h40;
 		rom[8'h61] = 8'h00;

fpga/usb/usb_serial/src_v/usb_cdc_core.sv

@@ -891,23 +891,23 @@ module usb_cdc_core
    assign usb_ep[0].d.cfg_int_rx    = 1'b0;
    assign usb_ep[0].d.cfg_int_tx    = 1'b0;
 
-   // EP1: data input
+   // EP1: unused
    assign usb_ep[1].d.ep_iso        = 1'b0;
    assign usb_ep[1].d.cfg_int_rx    = 1'b0;
    assign usb_ep[1].d.cfg_int_tx    = 1'b0;
-   assign usb_ep[1].d.ep_stall      = 1'b0;
+   assign usb_ep[1].d.ep_stall      = 1'b1;
    assign usb_ep[1].d.tx_ready      = 1'b0;
    assign usb_ep[1].d.tx_data_valid = 1'b0;
    assign usb_ep[1].d.tx_data_strb  = 1'b0;
    assign usb_ep[1].d.tx_data       = 8'bx;
    assign usb_ep[1].d.tx_data_last  = 1'b0;
+   assign usb_ep[1].d.rx_space      = 1'b0;
 
-   // EP2: data output
+   // EP2: data channel
    assign usb_ep[2].d.ep_iso        = 1'b0;
    assign usb_ep[2].d.cfg_int_rx    = 1'b0;
    assign usb_ep[2].d.cfg_int_tx    = 1'b0;
    assign usb_ep[2].d.ep_stall      = 1'b0;
-   assign usb_ep[2].d.rx_space      = 1'b0;
 
    // EP3: notification output
    assign usb_ep[3].d.ep_iso        = 1'b0;
@@ -970,9 +970,9 @@ module usb_cdc_core
 
    assign inport_accept_o     = !inport_valid_q | usb_ep[2].u.tx_data_accept;
 
-   assign outport_valid_o      = usb_ep[1].u.rx_valid && usb_ep[1].uc.rx_strb;
-   assign outport_data_o       = usb_ep[1].uc.rx_data;
-   assign usb_ep[1].d.rx_space = outport_accept_i;
+   assign outport_valid_o      = usb_ep[2].u.rx_valid && usb_ep[2].uc.rx_strb;
+   assign outport_data_o       = usb_ep[2].uc.rx_data;
+   assign usb_ep[2].d.rx_space = outport_accept_i;
 
    always @(posedge clk_i or posedge rst_i)
      if (rst_i)