Minor update to max80.qsf

max80.qsf

@@ -81,7 +81,7 @@ set_global_assignment -name ENABLE_OCT_DONE OFF
 set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
 set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
 set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 0
-set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
 set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE COMP IMAGE"
 set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
 set_global_assignment -name GENERATE_JBC_FILE ON
@@ -282,4 +282,6 @@ set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS ON -section_id eda_simula
 set_global_assignment -name EDA_ENABLE_GLITCH_FILTERING ON -section_id eda_simulation
 set_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION ALL_NODES -section_id eda_simulation
 set_global_assignment -name EDA_TEST_BENCH_DESIGN_INSTANCE_NAME max80 -section_id eda_simulation
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to led[1]
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE EPCQ128A

output_files/max80.asm.rpt

@@ -1,5 +1,5 @@
 Assembler report for max80
-Thu Jul 29 09:58:03 2021
+Sun Aug  1 07:28:07 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -39,7 +39,7 @@ https://fpgasoftware.intel.com/eula.
 +---------------------------------------------------------------+
 ; Assembler Summary                                             ;
 +-----------------------+---------------------------------------+
-; Assembler Status      ; Successful - Thu Jul 29 09:58:03 2021 ;
+; Assembler Status      ; Successful - Sun Aug  1 07:28:07 2021 ;
 ; Revision Name         ; max80                                 ;
 ; Top-level Entity Name ; max80                                 ;
 ; Family                ; Cyclone IV E                          ;
@@ -69,8 +69,8 @@ https://fpgasoftware.intel.com/eula.
 +----------------+--------------------+
 ; Option         ; Setting            ;
 +----------------+--------------------+
-; JTAG usercode  ; 0x0010EA22         ;
-; Checksum       ; 0x0010EA22         ;
+; JTAG usercode  ; 0x0010EA95         ;
+; Checksum       ; 0x0010EA95         ;
 +----------------+--------------------+
 
 
@@ -89,7 +89,7 @@ https://fpgasoftware.intel.com/eula.
 Info: *******************************************************************
 Info: Running Quartus Prime Assembler
     Info: Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
-    Info: Processing started: Thu Jul 29 09:58:02 2021
+    Info: Processing started: Sun Aug  1 07:28:06 2021
 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (115031): Writing out detailed assembly data for power analysis
@@ -97,8 +97,8 @@ Info (115030): Assembler is generating device programming files
 Info (210117): Created JAM or JBC file for the specified chain: 
 Device 1 (EP4CE15F17; /home/hpa/abc80/max80/blinktest/output_files/max80.sof)
 Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
-    Info: Peak virtual memory: 903 megabytes
-    Info: Processing ended: Thu Jul 29 09:58:03 2021
+    Info: Peak virtual memory: 905 megabytes
+    Info: Processing ended: Sun Aug  1 07:28:07 2021
     Info: Elapsed time: 00:00:01
     Info: Total CPU time (on all processors): 00:00:02
 

output_files/max80.done

@@ -1 +1 @@
-Thu Jul 29 09:58:10 2021
+Sun Aug  1 07:28:14 2021

output_files/max80.eda.rpt

@@ -1,5 +1,5 @@
 EDA Netlist Writer report for max80
-Thu Jul 29 09:58:10 2021
+Sun Aug  1 07:28:13 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -37,7 +37,7 @@ https://fpgasoftware.intel.com/eula.
 +-------------------------------------------------------------------+
 ; EDA Netlist Writer Summary                                        ;
 +---------------------------+---------------------------------------+
-; EDA Netlist Writer Status ; Successful - Thu Jul 29 09:58:10 2021 ;
+; EDA Netlist Writer Status ; Successful - Sun Aug  1 07:28:13 2021 ;
 ; Revision Name             ; max80                                 ;
 ; Top-level Entity Name     ; max80                                 ;
 ; Family                    ; Cyclone IV E                          ;
@@ -84,15 +84,15 @@ https://fpgasoftware.intel.com/eula.
 Info: *******************************************************************
 Info: Running Quartus Prime EDA Netlist Writer
     Info: Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
-    Info: Processing started: Thu Jul 29 09:58:09 2021
+    Info: Processing started: Sun Aug  1 07:28:13 2021
 Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (204019): Generated file max80.vo in folder "/home/hpa/abc80/max80/blinktest/simulation/modelsim/" for EDA simulation tool
 Info (204020): Writing VCD Dump Commands for all nodes to /home/hpa/abc80/max80/blinktest/simulation/modelsim/max80_dump_all_vcd_nodes.tcl
 Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
-    Info: Peak virtual memory: 1128 megabytes
-    Info: Processing ended: Thu Jul 29 09:58:10 2021
-    Info: Elapsed time: 00:00:01
+    Info: Peak virtual memory: 1125 megabytes
+    Info: Processing ended: Sun Aug  1 07:28:13 2021
+    Info: Elapsed time: 00:00:00
     Info: Total CPU time (on all processors): 00:00:00
 
 

output_files/max80.fit.rpt

@@ -1,5 +1,5 @@
 Fitter report for max80
-Thu Jul 29 09:58:01 2021
+Sun Aug  1 07:28:05 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -73,7 +73,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Fitter Summary                                                                   ;
 +------------------------------------+---------------------------------------------+
-; Fitter Status                      ; Successful - Thu Jul 29 09:58:01 2021       ;
+; Fitter Status                      ; Successful - Sun Aug  1 07:28:05 2021       ;
 ; Quartus Prime Version              ; 18.1.1 Build 646 04/11/2019 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -882,22 +882,22 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
 ; Input frequency 0             ; 48.0 MHz                                                       ; 36.0 MHz                                                                                ;
 ; Input frequency 1             ; --                                                             ; --                                                                                      ;
 ; Nominal PFD frequency         ; 48.0 MHz                                                       ; 36.0 MHz                                                                                ;
-; Nominal VCO frequency         ; 576.0 MHz                                                      ; 540.0 MHz                                                                               ;
-; VCO post scale K counter      ; 2                                                              ; 2                                                                                       ;
+; Nominal VCO frequency         ; 864.0 MHz                                                      ; 540.0 MHz                                                                               ;
+; VCO post scale K counter      ; --                                                             ; 2                                                                                       ;
 ; VCO frequency control         ; Auto                                                           ; Auto                                                                                    ;
-; VCO phase shift step          ; 217 ps                                                         ; 231 ps                                                                                  ;
+; VCO phase shift step          ; 144 ps                                                         ; 231 ps                                                                                  ;
 ; VCO multiply                  ; --                                                             ; --                                                                                      ;
 ; VCO divide                    ; --                                                             ; --                                                                                      ;
-; Freq min lock                 ; 25.0 MHz                                                       ; 20.0 MHz                                                                                ;
-; Freq max lock                 ; 54.18 MHz                                                      ; 43.35 MHz                                                                               ;
+; Freq min lock                 ; 33.35 MHz                                                      ; 20.0 MHz                                                                                ;
+; Freq max lock                 ; 72.24 MHz                                                      ; 43.35 MHz                                                                               ;
 ; M VCO Tap                     ; 0                                                              ; 6                                                                                       ;
 ; M Initial                     ; 1                                                              ; 1                                                                                       ;
-; M value                       ; 12                                                             ; 15                                                                                      ;
+; M value                       ; 18                                                             ; 15                                                                                      ;
 ; N value                       ; 1                                                              ; 1                                                                                       ;
 ; Charge pump current           ; setting 1                                                      ; setting 1                                                                               ;
 ; Loop filter resistance        ; setting 27                                                     ; setting 27                                                                              ;
 ; Loop filter capacitance       ; setting 0                                                      ; setting 0                                                                               ;
-; Bandwidth                     ; 680 kHz to 980 kHz                                             ; 680 kHz to 980 kHz                                                                      ;
+; Bandwidth                     ; 1.03 MHz to 1.97 MHz                                           ; 680 kHz to 980 kHz                                                                      ;
 ; Bandwidth type                ; Medium                                                         ; Medium                                                                                  ;
 ; Real time reconfigurable      ; Off                                                            ; Off                                                                                     ;
 ; Scan chain MIF file           ; --                                                             ; --                                                                                      ;
@@ -915,9 +915,9 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
 +-----------------------------------------------------------------------------------------------------+--------------+------+-----+------------------+----------------+------------------+------------+---------+---------------+------------+---------------+---------+---------+---------------------------------------------------------------+
 ; Name                                                                                                ; Output Clock ; Mult ; Div ; Output Frequency ; Phase Shift    ; Phase Shift Step ; Duty Cycle ; Counter ; Counter Value ; High / Low ; Cascade Input ; Initial ; VCO Tap ; SDC Pin Name                                                  ;
 +-----------------------------------------------------------------------------------------------------+--------------+------+-----+------------------+----------------+------------------+------------+---------+---------------+------------+---------------+---------+---------+---------------------------------------------------------------+
-; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]                          ; clock0       ; 2    ; 1   ; 96.0 MHz         ; 0 (0 ps)       ; 7.50 (217 ps)    ; 50/50      ; C0      ; 6             ; 3/3 Even   ; --            ; 1       ; 0       ; pll|altpll_component|auto_generated|pll1|clk[0]               ;
-; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1]                          ; clock1       ; 2    ; 1   ; 96.0 MHz         ; 0 (0 ps)       ; 7.50 (217 ps)    ; 50/50      ; C2      ; 6             ; 3/3 Even   ; --            ; 1       ; 0       ; pll|altpll_component|auto_generated|pll1|clk[1]               ;
-; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2]                          ; clock2       ; 3    ; 4   ; 36.0 MHz         ; 0 (0 ps)       ; 2.81 (217 ps)    ; 50/50      ; C1      ; 16            ; 8/8 Even   ; --            ; 1       ; 0       ; pll|altpll_component|auto_generated|pll1|clk[2]               ;
+; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]                          ; clock0       ; 2    ; 1   ; 96.0 MHz         ; 0 (0 ps)       ; 5.00 (144 ps)    ; 50/50      ; C0      ; 9             ; 5/4 Odd    ; --            ; 1       ; 0       ; pll|altpll_component|auto_generated|pll1|clk[0]               ;
+; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1]                          ; clock1       ; 2    ; 1   ; 96.0 MHz         ; 0 (0 ps)       ; 5.00 (144 ps)    ; 50/50      ; C2      ; 9             ; 5/4 Odd    ; --            ; 1       ; 0       ; pll|altpll_component|auto_generated|pll1|clk[1]               ;
+; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2]                          ; clock2       ; 3    ; 4   ; 36.0 MHz         ; 0 (0 ps)       ; 1.88 (144 ps)    ; 50/50      ; C1      ; 24            ; 12/12 Even ; --            ; 1       ; 0       ; pll|altpll_component|auto_generated|pll1|clk[2]               ;
 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock              ; clock0       ; 5    ; 1   ; 180.0 MHz        ; -90 (-1389 ps) ; 15.00 (231 ps)   ; 50/50      ; C0      ; 3             ; 2/1 Odd    ; --            ; 1       ; 0       ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ;
 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_clk[1] ; clock1       ; 1    ; 1   ; 36.0 MHz         ; -18 (-1389 ps) ; 3.00 (231 ps)    ; 50/50      ; C1      ; 15            ; 8/7 Odd    ; --            ; 1       ; 0       ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ;
 +-----------------------------------------------------------------------------------------------------+--------------+------+-----+------------------+----------------+------------------+------------+---------+---------------+------------+---------------+---------+---------+---------------------------------------------------------------+
@@ -967,7 +967,6 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
 ; flash_cs_n   ; Missing drive strength ;
 ; flash_clk    ; Missing drive strength ;
 ; flash_mosi   ; Missing drive strength ;
-; led[1]       ; Missing drive strength ;
 ; led[2]       ; Missing drive strength ;
 ; led[3]       ; Missing drive strength ;
 ; abc_d[0]     ; Missing drive strength ;
@@ -1524,9 +1523,9 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +--------------------+--------------+--------------+--------------+-----------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
 ; Pin/Rules          ; IO_000001    ; IO_000002    ; IO_000003    ; IO_000004 ; IO_000005    ; IO_000006 ; IO_000007    ; IO_000008    ; IO_000047    ; IO_000020    ; IO_000011    ; IO_000027    ; IO_000026    ; IO_000024    ; IO_000023    ; IO_000046    ; IO_000021    ; IO_000022    ; IO_000009 ; IO_000010 ; IO_000012    ; IO_000013    ; IO_000014    ; IO_000015    ; IO_000045    ; IO_000019    ; IO_000018    ; IO_000033 ; IO_000034    ; IO_000042    ;
 +--------------------+--------------+--------------+--------------+-----------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
-; Total Pass         ; 131          ; 7            ; 131          ; 134       ; 0            ; 134       ; 131          ; 0            ; 0            ; 82           ; 1            ; 0            ; 0            ; 0            ; 51           ; 0            ; 4            ; 0            ; 134       ; 134       ; 0            ; 0            ; 4            ; 82           ; 0            ; 0            ; 1            ; 134       ; 96           ; 0            ;
+; Total Pass         ; 131          ; 7            ; 131          ; 134       ; 0            ; 134       ; 131          ; 0            ; 0            ; 82           ; 2            ; 0            ; 0            ; 0            ; 51           ; 0            ; 4            ; 0            ; 134       ; 134       ; 0            ; 0            ; 4            ; 82           ; 0            ; 0            ; 2            ; 134       ; 96           ; 0            ;
 ; Total Unchecked    ; 0            ; 0            ; 0            ; 0         ; 0            ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ;
-; Total Inapplicable ; 3            ; 127          ; 3            ; 0         ; 134          ; 0         ; 3            ; 134          ; 134          ; 52           ; 133          ; 134          ; 134          ; 134          ; 83           ; 134          ; 130          ; 134          ; 0         ; 0         ; 134          ; 134          ; 130          ; 52           ; 134          ; 134          ; 133          ; 0         ; 38           ; 134          ;
+; Total Inapplicable ; 3            ; 127          ; 3            ; 0         ; 134          ; 0         ; 3            ; 134          ; 134          ; 52           ; 132          ; 134          ; 134          ; 134          ; 83           ; 134          ; 130          ; 134          ; 0         ; 0         ; 134          ; 134          ; 130          ; 52           ; 134          ; 134          ; 132          ; 0         ; 38           ; 134          ;
 ; Total Fail         ; 0            ; 0            ; 0            ; 0         ; 0            ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ;
 ; abc_clk            ; Pass         ; Inapplicable ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
 ; abc_a[0]           ; Pass         ; Inapplicable ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
@@ -1605,7 +1604,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 ; flash_miso         ; Pass         ; Inapplicable ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
 ; rtc_32khz          ; Pass         ; Inapplicable ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
 ; rtc_int_n          ; Pass         ; Inapplicable ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
-; led[1]             ; Pass         ; Pass         ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ;
+; led[1]             ; Pass         ; Pass         ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Pass      ; Pass         ; Inapplicable ;
 ; led[2]             ; Pass         ; Pass         ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ;
 ; led[3]             ; Pass         ; Pass         ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ;
 ; hdmi_d[0]          ; Pass         ; Pass         ; Pass         ; Pass      ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ;
@@ -1773,8 +1772,9 @@ Info (119018): Selected Migration Device List
 Info (119021): Selected migration device list is legal with 166 total of migratable pins
 Info (21077): Low junction temperature is 0 degrees C
 Info (21077): High junction temperature is 85 degrees C
-Info (15535): Implemented PLL "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll1" as Cyclone IV E PLL type File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
+Warning (15536): Implemented PLL "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll1" as Cyclone IV E PLL type, but with warnings File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15552): PLL constraints from migration devices are also being used File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
+    Warning (15567): Can't achieve requested High bandwidth type; current PLL requires a bandwidth value of greater than 2.000 Mhz -- achieved bandwidth of 1.03 MHz to 1.97 MHz File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15099): Implementing clock multiplication of 2, clock division of 1, and phase shift of 0 degrees (0 ps) for pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] port File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15099): Implementing clock multiplication of 2, clock division of 1, and phase shift of 0 degrees (0 ps) for pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1] port File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15099): Implementing clock multiplication of 3, clock division of 4, and phase shift of 0 degrees (0 ps) for pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2] port File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
@@ -1813,8 +1813,9 @@ Warning (176674): Following 4 pins are differential I/O pins but do not have the
     Warning (176118): Pin "hdmi_d[1]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "hdmi_d[1](n)" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 96
     Warning (176118): Pin "hdmi_d[2]" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "hdmi_d[2](n)" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 96
     Warning (176118): Pin "hdmi_clk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "hdmi_clk(n)" File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 97
-Info (15535): Implemented PLL "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll1" as Cyclone IV E PLL type File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
+Warning (15536): Implemented PLL "pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll1" as Cyclone IV E PLL type, but with warnings File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15552): PLL constraints from migration devices are also being used File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
+    Warning (15567): Can't achieve requested High bandwidth type; current PLL requires a bandwidth value of greater than 2.000 Mhz -- achieved bandwidth of 1.03 MHz to 1.97 MHz File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15099): Implementing clock multiplication of 2, clock division of 1, and phase shift of 0 degrees (0 ps) for pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] port File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15099): Implementing clock multiplication of 2, clock division of 1, and phase shift of 0 degrees (0 ps) for pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1] port File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
     Info (15099): Implementing clock multiplication of 3, clock division of 4, and phase shift of 0 degrees (0 ps) for pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2] port File: /home/hpa/abc80/max80/blinktest/db/pll_altpll.v Line: 491
@@ -1910,7 +1911,7 @@ Warning (15705): Ignored locations or region assignments to the following nodes
     Warning (15706): Node "xabc_op[2]" is assigned to location or region, but does not exist in design
     Warning (15706): Node "xabc_xio_n" is assigned to location or region, but does not exist in design
     Warning (15706): Node "xabc_xm_n" is assigned to location or region, but does not exist in design
-Info (171121): Fitter preparation operations ending: elapsed time is 00:00:02
+Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01
 Info (14896): Fitter has disabled Advanced Physical Optimization because it is not supported for the current family.
 Info (170189): Fitter placement preparation operations beginning
 Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00
@@ -1924,7 +1925,7 @@ Info (170199): The Fitter performed an Auto Fit compilation.  Optimizations were
     Info (170201): Optimizations that may affect the design's routability were skipped
     Info (170200): Optimizations that may affect the design's timing were skipped
 Info (170194): Fitter routing operations ending: elapsed time is 00:00:00
-Info (11888): Total time spent on timing analysis during the Fitter is 0.13 seconds.
+Info (11888): Total time spent on timing analysis during the Fitter is 0.12 seconds.
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (334003): Started post-fitting delay annotation
@@ -2064,9 +2065,9 @@ Warning (169064): Following 45 pins have no output enable or a GND or VCC output
     Info (169065): Pin hdmi_scl has a permanently disabled output enable File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 98
     Info (169065): Pin hdmi_hpd has a permanently disabled output enable File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 101
 Info (144001): Generated suppressed messages file /home/hpa/abc80/max80/blinktest/output_files/max80.fit.smsg
-Info: Quartus Prime Fitter was successful. 0 errors, 39 warnings
-    Info: Peak virtual memory: 1339 megabytes
-    Info: Processing ended: Thu Jul 29 09:58:01 2021
+Info: Quartus Prime Fitter was successful. 0 errors, 43 warnings
+    Info: Peak virtual memory: 1340 megabytes
+    Info: Processing ended: Sun Aug  1 07:28:05 2021
     Info: Elapsed time: 00:00:09
     Info: Total CPU time (on all processors): 00:00:10
 

output_files/max80.fit.summary

@@ -1,4 +1,4 @@
-Fitter Status : Successful - Thu Jul 29 09:58:01 2021
+Fitter Status : Successful - Sun Aug  1 07:28:05 2021
 Quartus Prime Version : 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 Revision Name : max80
 Top-level Entity Name : max80

output_files/max80.flow.rpt

@@ -1,5 +1,5 @@
 Flow report for max80
-Thu Jul 29 09:58:10 2021
+Sun Aug  1 07:28:13 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -41,7 +41,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Flow Summary                                                                     ;
 +------------------------------------+---------------------------------------------+
-; Flow Status                        ; Successful - Thu Jul 29 09:58:10 2021       ;
+; Flow Status                        ; Successful - Sun Aug  1 07:28:13 2021       ;
 ; Quartus Prime Version              ; 18.1.1 Build 646 04/11/2019 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -65,7 +65,7 @@ https://fpgasoftware.intel.com/eula.
 +-------------------+---------------------+
 ; Option            ; Setting             ;
 +-------------------+---------------------+
-; Start date & time ; 07/29/2021 09:57:39 ;
+; Start date & time ; 08/01/2021 07:27:43 ;
 ; Main task         ; Compilation         ;
 ; Revision Name     ; max80               ;
 +-------------------+---------------------+
@@ -76,7 +76,7 @@ https://fpgasoftware.intel.com/eula.
 +--------------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
 ; Assignment Name                            ; Value                                  ; Default Value ; Entity Name ; Section Id                        ;
 +--------------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
-; COMPILER_SIGNATURE_ID                      ; 180546899331588.162757785904250        ; --            ; --          ; --                                ;
+; COMPILER_SIGNATURE_ID                      ; 180546899331588.162782806355872        ; --            ; --          ; --                                ;
 ; EDA_ENABLE_GLITCH_FILTERING                ; On                                     ; --            ; --          ; eda_simulation                    ;
 ; EDA_GENERATE_FUNCTIONAL_NETLIST            ; Off                                    ; --            ; --          ; eda_board_design_timing           ;
 ; EDA_GENERATE_FUNCTIONAL_NETLIST            ; Off                                    ; --            ; --          ; eda_board_design_boundary_scan    ;
@@ -129,13 +129,13 @@ https://fpgasoftware.intel.com/eula.
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
 ; Module Name          ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis ; 00:00:13     ; 1.0                     ; 1029 MB             ; 00:00:28                           ;
-; Fitter               ; 00:00:09     ; 1.0                     ; 1339 MB             ; 00:00:09                           ;
-; Assembler            ; 00:00:01     ; 1.0                     ; 903 MB              ; 00:00:02                           ;
-; Power Analyzer       ; 00:00:02     ; 1.0                     ; 1265 MB             ; 00:00:02                           ;
-; Timing Analyzer      ; 00:00:02     ; 1.0                     ; 895 MB              ; 00:00:02                           ;
-; EDA Netlist Writer   ; 00:00:01     ; 1.0                     ; 1128 MB             ; 00:00:00                           ;
-; Total                ; 00:00:28     ; --                      ; --                  ; 00:00:43                           ;
+; Analysis & Synthesis ; 00:00:13     ; 1.0                     ; 1035 MB             ; 00:00:28                           ;
+; Fitter               ; 00:00:09     ; 1.0                     ; 1340 MB             ; 00:00:09                           ;
+; Assembler            ; 00:00:01     ; 1.0                     ; 905 MB              ; 00:00:02                           ;
+; Power Analyzer       ; 00:00:02     ; 1.0                     ; 1264 MB             ; 00:00:02                           ;
+; Timing Analyzer      ; 00:00:02     ; 1.0                     ; 894 MB              ; 00:00:02                           ;
+; EDA Netlist Writer   ; 00:00:00     ; 1.0                     ; 1125 MB             ; 00:00:00                           ;
+; Total                ; 00:00:27     ; --                      ; --                  ; 00:00:43                           ;
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
 
 

output_files/max80.map.rpt

@@ -1,5 +1,5 @@
 Analysis & Synthesis report for max80
-Thu Jul 29 09:57:52 2021
+Sun Aug  1 07:27:55 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -67,7 +67,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Analysis & Synthesis Summary                                                     ;
 +------------------------------------+---------------------------------------------+
-; Analysis & Synthesis Status        ; Successful - Thu Jul 29 09:57:52 2021       ;
+; Analysis & Synthesis Status        ; Successful - Sun Aug  1 07:27:55 2021       ;
 ; Quartus Prime Version              ; 18.1.1 Build 646 04/11/2019 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -541,7 +541,7 @@ Note: In order to hide this table in the UI and the text report file, please set
 ; SWITCH_OVER_TYPE              ; AUTO                  ; Untyped              ;
 ; FEEDBACK_SOURCE               ; EXTCLK0               ; Untyped              ;
 ; BANDWIDTH                     ; 0                     ; Untyped              ;
-; BANDWIDTH_TYPE                ; AUTO                  ; Untyped              ;
+; BANDWIDTH_TYPE                ; HIGH                  ; Untyped              ;
 ; SPREAD_FREQUENCY              ; 0                     ; Untyped              ;
 ; DOWN_SPREAD                   ; 0                     ; Untyped              ;
 ; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF                   ; Untyped              ;
@@ -1093,7 +1093,7 @@ Note: In order to hide this table in the UI and the text report file, please set
 Info: *******************************************************************
 Info: Running Quartus Prime Analysis & Synthesis
     Info: Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
-    Info: Processing started: Thu Jul 29 09:57:39 2021
+    Info: Processing started: Sun Aug  1 07:27:42 2021
 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
@@ -1172,7 +1172,7 @@ Info (12128): Elaborating entity "pll" for hierarchy "pll:pll" File: /home/hpa/a
 Info (12128): Elaborating entity "altpll" for hierarchy "pll:pll|altpll:altpll_component" File: /home/hpa/abc80/max80/blinktest/ip/pll.v Line: 127
 Info (12130): Elaborated megafunction instantiation "pll:pll|altpll:altpll_component" File: /home/hpa/abc80/max80/blinktest/ip/pll.v Line: 127
 Info (12133): Instantiated megafunction "pll:pll|altpll:altpll_component" with the following parameter: File: /home/hpa/abc80/max80/blinktest/ip/pll.v Line: 127
-    Info (12134): Parameter "bandwidth_type" = "AUTO"
+    Info (12134): Parameter "bandwidth_type" = "HIGH"
     Info (12134): Parameter "clk0_divide_by" = "1"
     Info (12134): Parameter "clk0_duty_cycle" = "50"
     Info (12134): Parameter "clk0_multiply_by" = "2"
@@ -1508,8 +1508,8 @@ Info (21057): Implemented 476 device resources after synthesis - the final resou
     Info (21061): Implemented 340 logic cells
     Info (21065): Implemented 2 PLLs
 Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 208 warnings
-    Info: Peak virtual memory: 1078 megabytes
-    Info: Processing ended: Thu Jul 29 09:57:52 2021
+    Info: Peak virtual memory: 1084 megabytes
+    Info: Processing ended: Sun Aug  1 07:27:55 2021
     Info: Elapsed time: 00:00:13
     Info: Total CPU time (on all processors): 00:00:28
 

output_files/max80.map.summary

@@ -1,4 +1,4 @@
-Analysis & Synthesis Status : Successful - Thu Jul 29 09:57:52 2021
+Analysis & Synthesis Status : Successful - Sun Aug  1 07:27:55 2021
 Quartus Prime Version : 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 Revision Name : max80
 Top-level Entity Name : max80

output_files/max80.pow.rpt

@@ -1,5 +1,5 @@
 Power Analyzer report for max80
-Thu Jul 29 09:58:06 2021
+Sun Aug  1 07:28:10 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -58,22 +58,22 @@ https://fpgasoftware.intel.com/eula.
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   1.2%      ;
+;     Processor 2            ;   1.5%      ;
 +----------------------------+-------------+
 
 
 +-------------------------------------------------------------------------------------------+
 ; Power Analyzer Summary                                                                    ;
 +----------------------------------------+--------------------------------------------------+
-; Power Analyzer Status                  ; Successful - Thu Jul 29 09:58:06 2021            ;
+; Power Analyzer Status                  ; Successful - Sun Aug  1 07:28:10 2021            ;
 ; Quartus Prime Version                  ; 18.1.1 Build 646 04/11/2019 SJ Lite Edition      ;
 ; Revision Name                          ; max80                                            ;
 ; Top-level Entity Name                  ; max80                                            ;
 ; Family                                 ; Cyclone IV E                                     ;
 ; Device                                 ; EP4CE15F17C8                                     ;
 ; Power Models                           ; Final                                            ;
-; Total Thermal Power Dissipation        ; 214.72 mW                                        ;
-; Core Dynamic Thermal Power Dissipation ; 39.23 mW                                         ;
+; Total Thermal Power Dissipation        ; 213.53 mW                                        ;
+; Core Dynamic Thermal Power Dissipation ; 38.05 mW                                         ;
 ; Core Static Thermal Power Dissipation  ; 60.18 mW                                         ;
 ; I/O Thermal Power Dissipation          ; 115.30 mW                                        ;
 ; Power Estimation Confidence            ; Low: user provided insufficient toggle rate data ;
@@ -211,7 +211,7 @@ https://fpgasoftware.intel.com/eula.
 ;     2.5 V I/O Standard                  ; 2.5 V                      ;
 ;     LVDS I/O Standard                   ; 2.5 V                      ;
 ;                                         ;                            ;
-; Auto computed junction temperature      ; 31.4 degrees Celsius       ;
+; Auto computed junction temperature      ; 31.3 degrees Celsius       ;
 ;     Ambient temperature                 ; 25.0 degrees Celsius       ;
 ;     Junction-to-Case thermal resistance ; 7.30 degrees Celsius/Watt  ;
 ;     Case-to-Ambient thermal resistance  ; 22.30 degrees Celsius/Watt ;
@@ -233,7 +233,7 @@ https://fpgasoftware.intel.com/eula.
 +---------------------------------------+-----------------------------------+-----------------------------+--------------------------------+-------------------------------+-----------------------------------------------------------+
 ; Block Type                            ; Total Thermal Power by Block Type ; Block Thermal Dynamic Power ; Block Thermal Static Power (1) ; Routing Thermal Dynamic Power ; Block Average Toggle Rate (millions of transitions / sec) ;
 +---------------------------------------+-----------------------------------+-----------------------------+--------------------------------+-------------------------------+-----------------------------------------------------------+
-; PLL                                   ; 23.74 mW                          ; 23.74 mW                    ; --                             ; 0.00 mW                       ;  111.003                                                  ;
+; PLL                                   ; 22.56 mW                          ; 22.56 mW                    ; --                             ; 0.00 mW                       ;  111.003                                                  ;
 ; Combinational cell                    ; 0.42 mW                           ; 0.35 mW                     ; --                             ; 0.07 mW                       ;    8.056                                                  ;
 ; Clock control block                   ; 12.52 mW                          ; 0.00 mW                     ; --                             ; 12.52 mW                      ;  180.003                                                  ;
 ; Register cell                         ; 2.56 mW                           ; 1.99 mW                     ; --                             ; 0.57 mW                       ;   13.191                                                  ;
@@ -249,7 +249,7 @@ https://fpgasoftware.intel.com/eula.
 +-----------------------------------------------------------------+--------------------------------------+---------------------------------+-----------------------------------+-----------------------------------+--------------------------------------------------------------------------------------------------------------------+
 ; Compilation Hierarchy Node                                      ; Total Thermal Power by Hierarchy (1) ; Block Thermal Dynamic Power (1) ; Block Thermal Static Power (1)(2) ; Routing Thermal Dynamic Power (1) ; Full Hierarchy Name                                                                                                ;
 +-----------------------------------------------------------------+--------------------------------------+---------------------------------+-----------------------------------+-----------------------------------+--------------------------------------------------------------------------------------------------------------------+
-; |max80                                                          ; 128.16 mW (91.35 mW)                 ; 30.35 mW (4.25 mW)              ; 84.65 mW (84.65 mW)               ; 13.16 mW (2.45 mW)                ; |max80                                                                                                             ;
+; |max80                                                          ; 126.98 mW (91.35 mW)                 ; 29.17 mW (4.25 mW)              ; 84.65 mW (84.65 mW)               ; 13.16 mW (2.45 mW)                ; |max80                                                                                                             ;
 ;     |hard_block:auto_generated_inst                             ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |max80|hard_block:auto_generated_inst                                                                              ;
 ;     |tmdsenc:hdmitmds[0].enc                                    ; 0.17 mW (0.17 mW)                    ; 0.14 mW (0.14 mW)               ; --                                ; 0.03 mW (0.03 mW)                 ; |max80|tmdsenc:hdmitmds[0].enc                                                                                     ;
 ;     |tmdsenc:hdmitmds[1].enc                                    ; 0.15 mW (0.15 mW)                    ; 0.12 mW (0.12 mW)               ; --                                ; 0.03 mW (0.03 mW)                 ; |max80|tmdsenc:hdmitmds[1].enc                                                                                     ;
@@ -270,9 +270,9 @@ https://fpgasoftware.intel.com/eula.
 ;                 |hdmitx_shift_reg1:shift_reg26                  ; 0.12 mW (0.12 mW)                    ; 0.08 mW (0.08 mW)               ; --                                ; 0.04 mW (0.04 mW)                 ; |max80|hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26   ;
 ;                 |hdmitx_shift_reg1:shift_reg27                  ; 0.14 mW (0.14 mW)                    ; 0.10 mW (0.10 mW)               ; --                                ; 0.04 mW (0.04 mW)                 ; |max80|hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27   ;
 ;                 |hdmitx_shift_reg1:shift_reg28                  ; 0.13 mW (0.13 mW)                    ; 0.09 mW (0.09 mW)               ; --                                ; 0.04 mW (0.04 mW)                 ; |max80|hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28   ;
-;     |pll:pll                                                    ; 16.58 mW (0.00 mW)                   ; 12.39 mW (0.00 mW)              ; --                                ; 4.19 mW (0.00 mW)                 ; |max80|pll:pll                                                                                                     ;
-;         |altpll:altpll_component                                ; 16.58 mW (0.00 mW)                   ; 12.39 mW (0.00 mW)              ; --                                ; 4.19 mW (0.00 mW)                 ; |max80|pll:pll|altpll:altpll_component                                                                             ;
-;             |pll_altpll:auto_generated                          ; 16.58 mW (16.58 mW)                  ; 12.39 mW (12.39 mW)             ; --                                ; 4.19 mW (4.19 mW)                 ; |max80|pll:pll|altpll:altpll_component|pll_altpll:auto_generated                                                   ;
+;     |pll:pll                                                    ; 15.40 mW (0.00 mW)                   ; 11.21 mW (0.00 mW)              ; --                                ; 4.19 mW (0.00 mW)                 ; |max80|pll:pll                                                                                                     ;
+;         |altpll:altpll_component                                ; 15.40 mW (0.00 mW)                   ; 11.21 mW (0.00 mW)              ; --                                ; 4.19 mW (0.00 mW)                 ; |max80|pll:pll|altpll:altpll_component                                                                             ;
+;             |pll_altpll:auto_generated                          ; 15.40 mW (15.40 mW)                  ; 11.21 mW (11.21 mW)             ; --                                ; 4.19 mW (4.19 mW)                 ; |max80|pll:pll|altpll:altpll_component|pll_altpll:auto_generated                                                   ;
 ;                 |pll_altpll_dyn_phase_le:altpll_dyn_phase_le2   ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |max80|pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le:altpll_dyn_phase_le2      ;
 ;                 |pll_altpll_dyn_phase_le1:altpll_dyn_phase_le4  ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |max80|pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le1:altpll_dyn_phase_le4     ;
 ;                 |pll_altpll_dyn_phase_le12:altpll_dyn_phase_le5 ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |max80|pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le12:altpll_dyn_phase_le5    ;
@@ -289,7 +289,7 @@ https://fpgasoftware.intel.com/eula.
 +-----------------------------------------------------------------------------------------------------+-----------------------+--------------------------+
 ; Clock Domain                                                                                        ; Clock Frequency (MHz) ; Total Core Dynamic Power ;
 +-----------------------------------------------------------------------------------------------------+-----------------------+--------------------------+
-; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]                          ; 96.00                 ; 13.64                    ;
+; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]                          ; 96.00                 ; 12.46                    ;
 ; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1]                          ; 96.00                 ; 2.66                     ;
 ; pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2]                          ; 36.00                 ; 1.43                     ;
 ; clock_48                                                                                            ; 48.00                 ; 0.00                     ;
@@ -307,8 +307,8 @@ https://fpgasoftware.intel.com/eula.
 +----------------+-------------------------+---------------------------+--------------------------+----------------------------------+
 ; VCCINT         ; 53.80 mA                ; 13.77 mA                  ; 40.03 mA                 ; 53.80 mA                         ;
 ; VCCIO          ; 28.12 mA                ; 1.01 mA                   ; 27.11 mA                 ; 28.12 mA                         ;
-; VCCA           ; 22.36 mA                ; 4.08 mA                   ; 18.28 mA                 ; 22.36 mA                         ;
-; VCCD           ; 19.07 mA                ; 11.29 mA                  ; 7.78 mA                  ; 19.07 mA                         ;
+; VCCA           ; 21.83 mA                ; 3.55 mA                   ; 18.28 mA                 ; 21.83 mA                         ;
+; VCCD           ; 19.19 mA                ; 11.40 mA                  ; 7.78 mA                  ; 19.19 mA                         ;
 +----------------+-------------------------+---------------------------+--------------------------+----------------------------------+
 (1) Currents reported in columns "Total Current Drawn", "Dynamic Current Drawn", and "Static Current Drawn" are sufficient for user operation of the device.  
 (2) Currents reported in column "Minimum Power Supply Current" are sufficient for power-up, configuration, and user operation of the device.
@@ -383,7 +383,7 @@ https://fpgasoftware.intel.com/eula.
 Info: *******************************************************************
 Info: Running Quartus Prime Power Analyzer
     Info: Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
-    Info: Processing started: Thu Jul 29 09:58:04 2021
+    Info: Processing started: Sun Aug  1 07:28:08 2021
 Info: Command: quartus_pow --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (21077): Low junction temperature is 0 degrees C
@@ -422,10 +422,10 @@ Info (218000): Using Advanced I/O Power to simulate I/O buffers with the specifi
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (215049): Average toggle rate for this design is 11.008 millions of transitions / sec
-Info (215031): Total thermal power estimate for the design is 214.72 mW
+Info (215031): Total thermal power estimate for the design is 213.53 mW
 Info: Quartus Prime Power Analyzer was successful. 0 errors, 11 warnings
-    Info: Peak virtual memory: 1265 megabytes
-    Info: Processing ended: Thu Jul 29 09:58:06 2021
+    Info: Peak virtual memory: 1264 megabytes
+    Info: Processing ended: Sun Aug  1 07:28:10 2021
     Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:02
 

output_files/max80.pow.summary

@@ -1,12 +1,12 @@
-Power Analyzer Status : Successful - Thu Jul 29 09:58:06 2021
+Power Analyzer Status : Successful - Sun Aug  1 07:28:10 2021
 Quartus Prime Version : 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 Revision Name : max80
 Top-level Entity Name : max80
 Family : Cyclone IV E
 Device : EP4CE15F17C8
 Power Models : Final
-Total Thermal Power Dissipation : 214.72 mW
-Core Dynamic Thermal Power Dissipation : 39.23 mW
+Total Thermal Power Dissipation : 213.53 mW
+Core Dynamic Thermal Power Dissipation : 38.05 mW
 Core Static Thermal Power Dissipation : 60.18 mW
 I/O Thermal Power Dissipation : 115.30 mW
 Power Estimation Confidence : Low: user provided insufficient toggle rate data

output_files/max80.sta.rpt

@@ -1,5 +1,5 @@
 Timing Analyzer report for max80
-Thu Jul 29 09:58:09 2021
+Sun Aug  1 07:28:12 2021
 Quartus Prime Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
 
 
@@ -123,7 +123,7 @@ https://fpgasoftware.intel.com/eula.
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   2.8%      ;
+;     Processor 2            ;   2.7%      ;
 +----------------------------+-------------+
 
 
@@ -132,7 +132,7 @@ https://fpgasoftware.intel.com/eula.
 +---------------+--------+--------------------------+
 ; SDC File Path ; Status ; Read at                  ;
 +---------------+--------+--------------------------+
-; max80.sdc     ; OK     ; Thu Jul 29 09:58:07 2021 ;
+; max80.sdc     ; OK     ; Sun Aug  1 07:28:11 2021 ;
 +---------------+--------+--------------------------+
 
 
@@ -179,7 +179,7 @@ HTML report is unavailable in plain text report export.
 ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 1.779  ; 0.000         ;
 ; pll|altpll_component|auto_generated|pll1|clk[1]               ; 4.943  ; 0.000         ;
 ; pll|altpll_component|auto_generated|pll1|clk[2]               ; 18.707 ; 0.000         ;
-; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 22.654 ; 0.000         ;
+; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 22.634 ; 0.000         ;
 +---------------------------------------------------------------+--------+---------------+
 
 
@@ -550,36 +550,36 @@ No paths to report.
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 ; Slack  ; From Node                                                                                ; To Node                                                                                  ; Launch Clock                                                  ; Latch Clock                                                   ; Relationship ; Clock Skew ; Data Delay ;
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
-; 22.654 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.649     ; 2.008      ;
-; 22.693 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.980      ;
-; 22.701 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.972      ;
-; 22.710 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.959      ;
-; 22.764 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.909      ;
-; 22.795 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.878      ;
-; 22.817 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.856      ;
-; 22.844 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.825      ;
-; 22.849 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.820      ;
-; 22.876 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.797      ;
-; 22.885 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.649     ; 1.777      ;
-; 22.904 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.765      ;
-; 23.022 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.645     ; 1.644      ;
-; 23.058 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.615      ;
-; 23.079 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.645     ; 1.587      ;
-; 23.083 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.643     ; 1.585      ;
-; 23.238 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.435      ;
-; 23.245 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.428      ;
-; 23.258 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.415      ;
-; 23.258 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.415      ;
-; 23.264 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.645     ; 1.402      ;
-; 23.281 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.392      ;
-; 23.286 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.387      ;
-; 23.287 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.643     ; 1.381      ;
-; 23.339 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 1.331      ;
-; 23.389 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.284      ;
-; 23.400 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 1.270      ;
-; 23.448 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.225      ;
-; 23.581 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 1.089      ;
-; 23.789 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 0.881      ;
+; 22.634 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.649     ; 2.008      ;
+; 22.673 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.980      ;
+; 22.681 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.972      ;
+; 22.690 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.959      ;
+; 22.744 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.909      ;
+; 22.775 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.878      ;
+; 22.797 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.856      ;
+; 22.824 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.825      ;
+; 22.829 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.820      ;
+; 22.856 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.797      ;
+; 22.865 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.649     ; 1.777      ;
+; 22.884 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.642     ; 1.765      ;
+; 23.002 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.645     ; 1.644      ;
+; 23.038 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.615      ;
+; 23.059 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.645     ; 1.587      ;
+; 23.063 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.643     ; 1.585      ;
+; 23.218 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.435      ;
+; 23.225 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.428      ;
+; 23.238 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.415      ;
+; 23.238 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.415      ;
+; 23.244 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.645     ; 1.402      ;
+; 23.261 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.392      ;
+; 23.266 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.387      ;
+; 23.267 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.643     ; 1.381      ;
+; 23.319 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 1.331      ;
+; 23.369 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.284      ;
+; 23.380 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 1.270      ;
+; 23.428 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.638     ; 1.225      ;
+; 23.561 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 1.089      ;
+; 23.769 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.641     ; 0.881      ;
 ; 25.093 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 27.778       ; -0.079     ; 2.607      ;
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 
@@ -592,24 +592,23 @@ No paths to report.
 ; 0.466 ; rst_ctr[0]               ; rst_ctr[0]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.758      ;
 ; 0.467 ; led_ctr[0]               ; led_ctr[0]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 0.758      ;
 ; 0.736 ; led_ctr[14]              ; led_ctr[14]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.027      ;
-; 0.737 ; rst_ctr[10]              ; rst_ctr[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.029      ;
-; 0.737 ; rst_ctr[4]               ; rst_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.029      ;
-; 0.737 ; rst_ctr[2]               ; rst_ctr[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.029      ;
 ; 0.737 ; led_ctr[12]              ; led_ctr[12]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.028      ;
 ; 0.737 ; led_ctr[4]               ; led_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.028      ;
 ; 0.737 ; led_ctr[2]               ; led_ctr[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.028      ;
+; 0.737 ; rst_ctr[10]              ; rst_ctr[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.029      ;
+; 0.737 ; rst_ctr[4]               ; rst_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.029      ;
+; 0.737 ; rst_ctr[2]               ; rst_ctr[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.029      ;
 ; 0.738 ; led_ctr[26]~_Duplicate_1 ; led_ctr[26]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.029      ;
 ; 0.738 ; led_ctr[20]              ; led_ctr[20]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.029      ;
 ; 0.738 ; led_ctr[18]              ; led_ctr[18]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.029      ;
 ; 0.738 ; led_ctr[16]              ; led_ctr[16]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.029      ;
 ; 0.738 ; led_ctr[10]              ; led_ctr[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.029      ;
-; 0.739 ; rst_ctr[8]               ; rst_ctr[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.031      ;
-; 0.739 ; rst_ctr[6]               ; rst_ctr[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.031      ;
-; 0.739 ; rst_ctr[5]               ; rst_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.031      ;
 ; 0.739 ; led_ctr[28]~_Duplicate_1 ; led_ctr[28]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.030      ;
 ; 0.739 ; led_ctr[8]               ; led_ctr[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.030      ;
 ; 0.739 ; led_ctr[6]               ; led_ctr[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.030      ;
-; 0.740 ; rst_ctr[3]               ; rst_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.032      ;
+; 0.739 ; rst_ctr[8]               ; rst_ctr[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.031      ;
+; 0.739 ; rst_ctr[6]               ; rst_ctr[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.031      ;
+; 0.739 ; rst_ctr[5]               ; rst_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.031      ;
 ; 0.740 ; led_ctr[24]              ; led_ctr[24]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.031      ;
 ; 0.740 ; led_ctr[22]              ; led_ctr[22]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.031      ;
 ; 0.740 ; led_ctr[21]              ; led_ctr[21]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.031      ;
@@ -617,14 +616,15 @@ No paths to report.
 ; 0.740 ; led_ctr[15]              ; led_ctr[15]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.031      ;
 ; 0.740 ; led_ctr[13]              ; led_ctr[13]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.031      ;
 ; 0.740 ; led_ctr[5]               ; led_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.031      ;
-; 0.741 ; rst_ctr[11]              ; rst_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.033      ;
-; 0.741 ; rst_ctr[9]               ; rst_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.033      ;
-; 0.741 ; rst_ctr[7]               ; rst_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.033      ;
+; 0.740 ; rst_ctr[3]               ; rst_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.032      ;
 ; 0.741 ; led_ctr[19]              ; led_ctr[19]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.032      ;
 ; 0.741 ; led_ctr[11]              ; led_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.032      ;
 ; 0.741 ; led_ctr[9]               ; led_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.032      ;
 ; 0.741 ; led_ctr[7]               ; led_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.032      ;
 ; 0.741 ; led_ctr[3]               ; led_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.032      ;
+; 0.741 ; rst_ctr[11]              ; rst_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.033      ;
+; 0.741 ; rst_ctr[9]               ; rst_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.033      ;
+; 0.741 ; rst_ctr[7]               ; rst_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.033      ;
 ; 0.742 ; led_ctr[27]~_Duplicate_1 ; led_ctr[27]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.033      ;
 ; 0.742 ; led_ctr[25]              ; led_ctr[25]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.033      ;
 ; 0.742 ; led_ctr[23]              ; led_ctr[23]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.033      ;
@@ -633,62 +633,62 @@ No paths to report.
 ; 0.955 ; led_ctr[1]               ; led_ctr[1]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.246      ;
 ; 0.996 ; rst_ctr[1]               ; rst_ctr[1]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.288      ;
 ; 1.090 ; led_ctr[14]              ; led_ctr[15]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.382      ;
-; 1.092 ; rst_ctr[4]               ; rst_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.384      ;
-; 1.092 ; rst_ctr[2]               ; rst_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.384      ;
-; 1.092 ; rst_ctr[10]              ; rst_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.384      ;
 ; 1.092 ; led_ctr[16]              ; led_ctr[17]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.383      ;
 ; 1.092 ; led_ctr[12]              ; led_ctr[13]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.383      ;
 ; 1.092 ; led_ctr[4]               ; led_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.383      ;
 ; 1.092 ; led_ctr[2]               ; led_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.383      ;
-; 1.093 ; rst_ctr[8]               ; rst_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.385      ;
-; 1.093 ; rst_ctr[6]               ; rst_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.385      ;
+; 1.092 ; rst_ctr[4]               ; rst_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.384      ;
+; 1.092 ; rst_ctr[2]               ; rst_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.384      ;
+; 1.092 ; rst_ctr[10]              ; rst_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.384      ;
 ; 1.093 ; led_ctr[20]              ; led_ctr[21]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.384      ;
 ; 1.093 ; led_ctr[18]              ; led_ctr[19]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.384      ;
 ; 1.093 ; led_ctr[10]              ; led_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.384      ;
 ; 1.093 ; led_ctr[8]               ; led_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.384      ;
 ; 1.093 ; led_ctr[6]               ; led_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.384      ;
 ; 1.093 ; led_ctr[26]~_Duplicate_1 ; led_ctr[27]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.384      ;
+; 1.093 ; rst_ctr[8]               ; rst_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.385      ;
+; 1.093 ; rst_ctr[6]               ; rst_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.385      ;
 ; 1.094 ; led_ctr[24]              ; led_ctr[25]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.385      ;
 ; 1.094 ; led_ctr[22]              ; led_ctr[23]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.385      ;
 ; 1.100 ; rst_ctr[0]               ; rst_ctr[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.392      ;
 ; 1.100 ; rst_ctr[5]               ; rst_ctr[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.392      ;
-; 1.101 ; rst_ctr[3]               ; rst_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.393      ;
 ; 1.101 ; led_ctr[13]              ; led_ctr[14]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.392      ;
 ; 1.101 ; led_ctr[0]               ; led_ctr[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.392      ;
 ; 1.101 ; led_ctr[17]              ; led_ctr[18]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.392      ;
 ; 1.101 ; led_ctr[15]              ; led_ctr[16]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.392      ;
 ; 1.101 ; led_ctr[5]               ; led_ctr[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.392      ;
 ; 1.101 ; led_ctr[21]              ; led_ctr[22]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.392      ;
-; 1.102 ; rst_ctr[9]               ; rst_ctr[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.394      ;
-; 1.102 ; rst_ctr[7]               ; rst_ctr[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.394      ;
+; 1.101 ; rst_ctr[3]               ; rst_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.393      ;
 ; 1.102 ; led_ctr[11]              ; led_ctr[12]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.393      ;
 ; 1.102 ; led_ctr[3]               ; led_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.393      ;
 ; 1.102 ; led_ctr[19]              ; led_ctr[20]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.393      ;
 ; 1.102 ; led_ctr[9]               ; led_ctr[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.393      ;
 ; 1.102 ; led_ctr[7]               ; led_ctr[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.393      ;
+; 1.102 ; rst_ctr[9]               ; rst_ctr[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.394      ;
+; 1.102 ; rst_ctr[7]               ; rst_ctr[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.394      ;
 ; 1.103 ; led_ctr[25]              ; led_ctr[26]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.394      ;
 ; 1.103 ; led_ctr[27]~_Duplicate_1 ; led_ctr[28]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.394      ;
 ; 1.103 ; led_ctr[23]              ; led_ctr[24]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.394      ;
+; 1.109 ; led_ctr[13]              ; led_ctr[15]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.401      ;
 ; 1.109 ; rst_ctr[0]               ; rst_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.401      ;
 ; 1.109 ; rst_ctr[5]               ; rst_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.401      ;
-; 1.109 ; led_ctr[13]              ; led_ctr[15]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.401      ;
-; 1.110 ; rst_ctr[3]               ; rst_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.402      ;
 ; 1.110 ; led_ctr[15]              ; led_ctr[17]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.401      ;
 ; 1.110 ; led_ctr[0]               ; led_ctr[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.401      ;
 ; 1.110 ; led_ctr[17]              ; led_ctr[19]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.401      ;
 ; 1.110 ; led_ctr[5]               ; led_ctr[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.401      ;
 ; 1.110 ; led_ctr[21]              ; led_ctr[23]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.401      ;
-; 1.111 ; rst_ctr[9]               ; rst_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.403      ;
-; 1.111 ; rst_ctr[7]               ; rst_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.403      ;
+; 1.110 ; rst_ctr[3]               ; rst_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.402      ;
 ; 1.111 ; led_ctr[11]              ; led_ctr[13]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.402      ;
 ; 1.111 ; led_ctr[3]               ; led_ctr[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.402      ;
 ; 1.111 ; led_ctr[19]              ; led_ctr[21]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.402      ;
 ; 1.111 ; led_ctr[9]               ; led_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.402      ;
 ; 1.111 ; led_ctr[7]               ; led_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.402      ;
+; 1.111 ; rst_ctr[9]               ; rst_ctr[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.403      ;
+; 1.111 ; rst_ctr[7]               ; rst_ctr[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.403      ;
 ; 1.112 ; led_ctr[25]              ; led_ctr[27]~_Duplicate_1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.403      ;
 ; 1.112 ; led_ctr[23]              ; led_ctr[25]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.403      ;
 ; 1.221 ; led_ctr[14]              ; led_ctr[16]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.513      ;
-; 1.222 ; rst_ctr[2]               ; rst_ctr[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 1.514      ;
+; 1.222 ; led_ctr[12]              ; led_ctr[14]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.079      ; 1.513      ;
 +-------+--------------------------+--------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
 
 
@@ -914,36 +914,36 @@ No paths to report.
 ; Slack ; From Node                                                                                ; To Node                                                                                  ; Launch Clock                                                  ; Latch Clock                                                   ; Relationship ; Clock Skew ; Data Delay ;
 +-------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 ; 2.160 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 0.000        ; 0.079      ; 2.451      ;
-; 2.980 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 0.794      ;
-; 3.203 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 1.017      ;
-; 3.340 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.156      ;
-; 3.374 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 1.188      ;
-; 3.413 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.229      ;
-; 3.444 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 1.258      ;
-; 3.472 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.288      ;
-; 3.477 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.293      ;
-; 3.494 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.310      ;
-; 3.496 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.145     ; 1.305      ;
-; 3.498 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.143     ; 1.309      ;
-; 3.506 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.322      ;
-; 3.515 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.331      ;
-; 3.526 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.342      ;
-; 3.672 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.145     ; 1.481      ;
-; 3.679 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.143     ; 1.490      ;
-; 3.732 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.548      ;
-; 3.771 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.145     ; 1.580      ;
-; 3.801 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.614      ;
-; 3.844 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.657      ;
-; 3.849 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.148     ; 1.655      ;
-; 3.855 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.668      ;
-; 3.887 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.703      ;
-; 3.909 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.725      ;
-; 3.914 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.730      ;
-; 3.987 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.800      ;
-; 4.007 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.823      ;
-; 4.016 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.832      ;
-; 4.033 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.849      ;
-; 4.080 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.148     ; 1.886      ;
+; 2.970 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 0.794      ;
+; 3.193 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 1.017      ;
+; 3.330 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.156      ;
+; 3.364 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 1.188      ;
+; 3.403 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.229      ;
+; 3.434 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.140     ; 1.258      ;
+; 3.462 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.288      ;
+; 3.467 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.293      ;
+; 3.484 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.310      ;
+; 3.486 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.145     ; 1.305      ;
+; 3.488 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.143     ; 1.309      ;
+; 3.496 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.322      ;
+; 3.505 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.331      ;
+; 3.516 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.342      ;
+; 3.662 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.145     ; 1.481      ;
+; 3.669 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.143     ; 1.490      ;
+; 3.722 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.548      ;
+; 3.761 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.145     ; 1.580      ;
+; 3.791 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.614      ;
+; 3.834 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.657      ;
+; 3.839 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.148     ; 1.655      ;
+; 3.845 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.668      ;
+; 3.877 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.703      ;
+; 3.899 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.725      ;
+; 3.904 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.730      ;
+; 3.977 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.141     ; 1.800      ;
+; 3.997 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.823      ;
+; 4.006 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.832      ;
+; 4.023 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.138     ; 1.849      ;
+; 4.070 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.148     ; 1.886      ;
 +-------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 
 
@@ -974,7 +974,7 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp
 ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 2.014  ; 0.000         ;
 ; pll|altpll_component|auto_generated|pll1|clk[1]               ; 5.426  ; 0.000         ;
 ; pll|altpll_component|auto_generated|pll1|clk[2]               ; 19.293 ; 0.000         ;
-; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 22.954 ; 0.000         ;
+; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 22.934 ; 0.000         ;
 +---------------------------------------------------------------+--------+---------------+
 
 
@@ -1045,8 +1045,8 @@ No paths to report.
 ; 2.730 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a                               ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11                                       ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.164     ; 2.663      ;
 ; 2.741 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a                               ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[1]        ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.166     ; 2.650      ;
 ; 2.742 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a                               ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[0]        ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.166     ; 2.649      ;
-; 2.856 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[0] ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|ddio_outa_1~DFFLO   ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.110     ; 2.465      ;
 ; 2.856 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[0]      ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[2]        ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.070     ; 2.631      ;
+; 2.856 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[0] ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|ddio_outa_1~DFFLO   ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.110     ; 2.465      ;
 ; 2.900 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22                                     ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.071     ; 2.586      ;
 ; 2.959 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[0]       ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[0]         ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.070     ; 2.528      ;
 ; 2.978 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[2]      ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[2]        ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 5.555        ; -0.070     ; 2.509      ;
@@ -1345,36 +1345,36 @@ No paths to report.
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 ; Slack  ; From Node                                                                                ; To Node                                                                                  ; Launch Clock                                                  ; Latch Clock                                                   ; Relationship ; Clock Skew ; Data Delay ;
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
-; 22.954 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.456     ; 1.902      ;
-; 22.995 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.871      ;
-; 22.996 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.869      ;
-; 23.006 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.857      ;
-; 23.071 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.794      ;
-; 23.086 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.779      ;
-; 23.102 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.763      ;
-; 23.123 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.740      ;
-; 23.129 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.734      ;
-; 23.170 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.456     ; 1.686      ;
-; 23.179 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.684      ;
-; 23.184 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.681      ;
-; 23.304 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.453     ; 1.555      ;
-; 23.344 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.522      ;
-; 23.354 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.453     ; 1.505      ;
-; 23.360 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.451     ; 1.501      ;
-; 23.499 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.367      ;
-; 23.509 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.357      ;
-; 23.521 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.345      ;
-; 23.527 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.339      ;
-; 23.528 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.453     ; 1.331      ;
-; 23.546 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.320      ;
-; 23.547 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.319      ;
-; 23.556 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.451     ; 1.305      ;
-; 23.597 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.448     ; 1.267      ;
-; 23.668 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.198      ;
-; 23.682 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.181      ;
-; 23.707 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.159      ;
-; 23.848 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.015      ;
-; 24.068 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 0.795      ;
+; 22.934 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.456     ; 1.902      ;
+; 22.975 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.871      ;
+; 22.976 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.869      ;
+; 22.986 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.857      ;
+; 23.051 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.794      ;
+; 23.066 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.779      ;
+; 23.082 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.763      ;
+; 23.103 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.740      ;
+; 23.109 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.734      ;
+; 23.150 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.456     ; 1.686      ;
+; 23.159 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.684      ;
+; 23.164 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.447     ; 1.681      ;
+; 23.284 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.453     ; 1.555      ;
+; 23.324 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.522      ;
+; 23.334 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.453     ; 1.505      ;
+; 23.340 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.451     ; 1.501      ;
+; 23.479 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.367      ;
+; 23.489 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.357      ;
+; 23.501 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.345      ;
+; 23.507 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.339      ;
+; 23.508 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.453     ; 1.331      ;
+; 23.526 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.320      ;
+; 23.527 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.319      ;
+; 23.536 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.451     ; 1.305      ;
+; 23.577 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.448     ; 1.267      ;
+; 23.648 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.198      ;
+; 23.662 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.181      ;
+; 23.687 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.446     ; 1.159      ;
+; 23.828 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 1.015      ;
+; 24.048 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -1.449     ; 0.795      ;
 ; 25.300 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 27.778       ; -0.070     ; 2.410      ;
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 
@@ -1709,36 +1709,36 @@ No paths to report.
 ; Slack ; From Node                                                                                ; To Node                                                                                  ; Launch Clock                                                  ; Latch Clock                                                   ; Relationship ; Clock Skew ; Data Delay ;
 +-------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 ; 2.012 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 0.000        ; 0.070      ; 2.277      ;
-; 2.810 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 0.738      ;
-; 3.010 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 0.938      ;
-; 3.124 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.054      ;
-; 3.154 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.082      ;
-; 3.198 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.129      ;
-; 3.198 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.126      ;
-; 3.223 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.153      ;
-; 3.228 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.158      ;
-; 3.242 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.172      ;
-; 3.246 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.012     ; 1.171      ;
-; 3.251 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.182      ;
-; 3.257 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.010     ; 1.184      ;
-; 3.260 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.191      ;
-; 3.276 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.206      ;
-; 3.416 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.013     ; 1.340      ;
-; 3.419 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.010     ; 1.346      ;
-; 3.475 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.405      ;
-; 3.508 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.012     ; 1.433      ;
-; 3.517 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.445      ;
-; 3.553 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.481      ;
-; 3.563 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.491      ;
-; 3.567 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.015     ; 1.489      ;
-; 3.605 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.535      ;
-; 3.620 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.551      ;
-; 3.650 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.581      ;
-; 3.694 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.622      ;
-; 3.715 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.646      ;
-; 3.737 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.668      ;
-; 3.746 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.677      ;
-; 3.792 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.015     ; 1.714      ;
+; 2.800 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 0.738      ;
+; 3.000 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 0.938      ;
+; 3.114 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.054      ;
+; 3.144 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.082      ;
+; 3.188 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.129      ;
+; 3.188 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.126      ;
+; 3.213 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.153      ;
+; 3.218 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.158      ;
+; 3.232 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.172      ;
+; 3.236 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.012     ; 1.171      ;
+; 3.241 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.182      ;
+; 3.247 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.010     ; 1.184      ;
+; 3.250 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.191      ;
+; 3.266 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.206      ;
+; 3.406 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.013     ; 1.340      ;
+; 3.409 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.010     ; 1.346      ;
+; 3.465 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.405      ;
+; 3.498 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.012     ; 1.433      ;
+; 3.507 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.445      ;
+; 3.543 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.481      ;
+; 3.553 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.491      ;
+; 3.557 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.015     ; 1.489      ;
+; 3.595 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.007     ; 1.535      ;
+; 3.610 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.551      ;
+; 3.640 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.581      ;
+; 3.684 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.009     ; 1.622      ;
+; 3.705 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.646      ;
+; 3.727 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.668      ;
+; 3.736 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.006     ; 1.677      ;
+; 3.782 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -1.015     ; 1.714      ;
 +-------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 
 
@@ -1756,7 +1756,7 @@ No synchronizer chains to report.
 ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 3.799  ; 0.000         ;
 ; pll|altpll_component|auto_generated|pll1|clk[1]               ; 8.053  ; 0.000         ;
 ; pll|altpll_component|auto_generated|pll1|clk[2]               ; 23.683 ; 0.000         ;
-; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 24.637 ; 0.000         ;
+; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 24.617 ; 0.000         ;
 +---------------------------------------------------------------+--------+---------------+
 
 
@@ -2127,36 +2127,36 @@ No paths to report.
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 ; Slack  ; From Node                                                                                ; To Node                                                                                  ; Launch Clock                                                  ; Latch Clock                                                   ; Relationship ; Clock Skew ; Data Delay ;
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
-; 24.637 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.773     ; 0.887      ;
-; 24.656 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.878      ;
-; 24.659 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.875      ;
-; 24.673 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.858      ;
-; 24.691 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.843      ;
-; 24.695 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.839      ;
-; 24.706 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.825      ;
-; 24.718 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.813      ;
-; 24.720 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.814      ;
-; 24.722 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.773     ; 0.802      ;
-; 24.731 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.803      ;
-; 24.737 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.794      ;
-; 24.808 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.770     ; 0.719      ;
-; 24.838 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.770     ; 0.689      ;
-; 24.839 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.695      ;
-; 24.842 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.768     ; 0.687      ;
-; 24.897 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.770     ; 0.630      ;
-; 24.900 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.634      ;
-; 24.902 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.632      ;
-; 24.909 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.625      ;
-; 24.910 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.624      ;
-; 24.916 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.618      ;
-; 24.919 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.615      ;
-; 24.919 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.767     ; 0.611      ;
-; 24.953 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.579      ;
-; 24.983 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.549      ;
-; 25.002 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.532      ;
-; 25.017 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.517      ;
-; 25.069 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.463      ;
-; 25.160 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.372      ;
+; 24.617 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.773     ; 0.887      ;
+; 24.636 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.878      ;
+; 24.639 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.875      ;
+; 24.653 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.858      ;
+; 24.671 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.843      ;
+; 24.675 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.839      ;
+; 24.686 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.825      ;
+; 24.698 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.813      ;
+; 24.700 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.814      ;
+; 24.702 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.773     ; 0.802      ;
+; 24.711 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.803      ;
+; 24.717 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.766     ; 0.794      ;
+; 24.788 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.770     ; 0.719      ;
+; 24.818 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.770     ; 0.689      ;
+; 24.819 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.695      ;
+; 24.822 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.768     ; 0.687      ;
+; 24.877 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.770     ; 0.630      ;
+; 24.880 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.634      ;
+; 24.882 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.632      ;
+; 24.889 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.625      ;
+; 24.890 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.624      ;
+; 24.896 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.618      ;
+; 24.899 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.615      ;
+; 24.899 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.767     ; 0.611      ;
+; 24.933 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.579      ;
+; 24.963 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.549      ;
+; 24.982 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.532      ;
+; 24.997 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.763     ; 0.517      ;
+; 25.049 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.463      ;
+; 25.140 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 26.390       ; -0.765     ; 0.372      ;
 ; 26.653 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 27.778       ; -0.035     ; 1.077      ;
 +--------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 
@@ -2491,36 +2491,36 @@ No paths to report.
 ; Slack ; From Node                                                                                ; To Node                                                                                  ; Launch Clock                                                  ; Latch Clock                                                   ; Relationship ; Clock Skew ; Data Delay ;
 +-------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 ; 0.891 ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 0.000        ; 0.035      ; 1.010      ;
-; 2.013 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.314      ;
-; 2.095 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.396      ;
-; 2.150 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.453      ;
-; 2.157 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.458      ;
-; 2.163 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.466      ;
-; 2.198 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.499      ;
-; 2.216 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.519      ;
-; 2.218 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.521      ;
-; 2.221 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.524      ;
-; 2.224 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.527     ; 0.523      ;
-; 2.228 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.531      ;
-; 2.230 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.533      ;
-; 2.230 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.533      ;
-; 2.234 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.529     ; 0.531      ;
-; 2.294 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.527     ; 0.593      ;
-; 2.299 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.602      ;
-; 2.306 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.529     ; 0.603      ;
-; 2.325 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.529     ; 0.622      ;
-; 2.373 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.673      ;
-; 2.386 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.686      ;
-; 2.395 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.695      ;
-; 2.397 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.532     ; 0.691      ;
-; 2.399 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.702      ;
-; 2.400 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.703      ;
-; 2.407 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.710      ;
-; 2.428 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.731      ;
-; 2.438 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.741      ;
-; 2.443 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.743      ;
-; 2.455 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.758      ;
-; 2.482 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.532     ; 0.776      ;
+; 2.003 ; tmdsenc:hdmitmds[1].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.314      ;
+; 2.085 ; tmdsenc:hdmitmds[2].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.396      ;
+; 2.140 ; tmdsenc:hdmitmds[2].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.453      ;
+; 2.147 ; tmdsenc:hdmitmds[2].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.458      ;
+; 2.153 ; tmdsenc:hdmitmds[0].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.466      ;
+; 2.188 ; tmdsenc:hdmitmds[2].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.525     ; 0.499      ;
+; 2.206 ; tmdsenc:hdmitmds[1].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.519      ;
+; 2.208 ; tmdsenc:hdmitmds[2].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.521      ;
+; 2.211 ; tmdsenc:hdmitmds[2].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.524      ;
+; 2.214 ; tmdsenc:hdmitmds[0].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.527     ; 0.523      ;
+; 2.218 ; tmdsenc:hdmitmds[1].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.531      ;
+; 2.220 ; tmdsenc:hdmitmds[2].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.533      ;
+; 2.220 ; tmdsenc:hdmitmds[0].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.533      ;
+; 2.224 ; tmdsenc:hdmitmds[0].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.529     ; 0.531      ;
+; 2.284 ; tmdsenc:hdmitmds[0].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.527     ; 0.593      ;
+; 2.289 ; tmdsenc:hdmitmds[2].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.602      ;
+; 2.296 ; tmdsenc:hdmitmds[0].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.529     ; 0.603      ;
+; 2.315 ; tmdsenc:hdmitmds[0].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.529     ; 0.622      ;
+; 2.363 ; tmdsenc:hdmitmds[1].enc|qreg[4]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.673      ;
+; 2.376 ; tmdsenc:hdmitmds[2].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.686      ;
+; 2.385 ; tmdsenc:hdmitmds[0].enc|qreg[6]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.695      ;
+; 2.387 ; tmdsenc:hdmitmds[0].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.532     ; 0.691      ;
+; 2.389 ; tmdsenc:hdmitmds[1].enc|qreg[5]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.702      ;
+; 2.390 ; tmdsenc:hdmitmds[1].enc|qreg[0]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.703      ;
+; 2.397 ; tmdsenc:hdmitmds[1].enc|qreg[3]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.710      ;
+; 2.418 ; tmdsenc:hdmitmds[2].enc|qreg[2]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.731      ;
+; 2.428 ; tmdsenc:hdmitmds[1].enc|qreg[1]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]   ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.741      ;
+; 2.433 ; tmdsenc:hdmitmds[1].enc|qreg[7]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.526     ; 0.743      ;
+; 2.445 ; tmdsenc:hdmitmds[1].enc|qreg[9]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.523     ; 0.758      ;
+; 2.472 ; tmdsenc:hdmitmds[0].enc|qreg[8]                                                          ; hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[2]               ; hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; -1.388       ; -0.532     ; 0.776      ;
 +-------+------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+--------------+------------+------------+
 
 
@@ -2538,7 +2538,7 @@ No synchronizer chains to report.
 ; Worst-case Slack                                               ; 1.779  ; 0.194 ; N/A      ; N/A     ; 2.476               ;
 ;  clock_48                                                      ; N/A    ; N/A   ; N/A      ; N/A     ; 10.004              ;
 ;  hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] ; 1.779  ; 0.194 ; N/A      ; N/A     ; 2.476               ;
-;  hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 22.654 ; 0.891 ; N/A      ; N/A     ; 13.589              ;
+;  hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] ; 22.634 ; 0.891 ; N/A      ; N/A     ; 13.589              ;
 ;  pll|altpll_component|auto_generated|pll1|clk[1]               ; 4.943  ; 0.194 ; N/A      ; N/A     ; 4.908               ;
 ;  pll|altpll_component|auto_generated|pll1|clk[2]               ; 18.707 ; 0.211 ; N/A      ; N/A     ; 13.587              ;
 ;  rtc_32khz                                                     ; N/A    ; N/A   ; N/A      ; N/A     ; 30513.579           ;
@@ -3203,7 +3203,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 Info: *******************************************************************
 Info: Running Quartus Prime Timing Analyzer
     Info: Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
-    Info: Processing started: Thu Jul 29 09:58:07 2021
+    Info: Processing started: Sun Aug  1 07:28:10 2021
 Info: Command: quartus_sta max80 -c max80
 Info: qsta_default_script.tcl version: #1
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -3247,7 +3247,7 @@ Info (332146): Worst-case setup slack is 1.779
     Info (332119):     1.779               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] 
     Info (332119):     4.943               0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
     Info (332119):    18.707               0.000 pll|altpll_component|auto_generated|pll1|clk[2] 
-    Info (332119):    22.654               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] 
+    Info (332119):    22.634               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] 
 Info (332146): Worst-case hold slack is 0.466
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
@@ -3276,7 +3276,7 @@ Info (332146): Worst-case setup slack is 2.014
     Info (332119):     2.014               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] 
     Info (332119):     5.426               0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
     Info (332119):    19.293               0.000 pll|altpll_component|auto_generated|pll1|clk[2] 
-    Info (332119):    22.954               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] 
+    Info (332119):    22.934               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] 
 Info (332146): Worst-case hold slack is 0.417
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
@@ -3303,7 +3303,7 @@ Info (332146): Worst-case setup slack is 3.799
     Info (332119):     3.799               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0] 
     Info (332119):     8.053               0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
     Info (332119):    23.683               0.000 pll|altpll_component|auto_generated|pll1|clk[2] 
-    Info (332119):    24.637               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] 
+    Info (332119):    24.617               0.000 hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1] 
 Info (332146): Worst-case hold slack is 0.194
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
@@ -3325,8 +3325,8 @@ Info (332146): Worst-case minimum pulse width slack is 2.564
 Info (332102): Design is not fully constrained for setup requirements
 Info (332102): Design is not fully constrained for hold requirements
 Info: Quartus Prime Timing Analyzer was successful. 0 errors, 10 warnings
-    Info: Peak virtual memory: 895 megabytes
-    Info: Processing ended: Thu Jul 29 09:58:09 2021
+    Info: Peak virtual memory: 894 megabytes
+    Info: Processing ended: Sun Aug  1 07:28:12 2021
     Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:02
 

output_files/max80.sta.summary

@@ -15,7 +15,7 @@ Slack : 18.707
 TNS   : 0.000
 
 Type  : Slow 1200mV 85C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
-Slack : 22.654
+Slack : 22.634
 TNS   : 0.000
 
 Type  : Slow 1200mV 85C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[1]'
@@ -71,7 +71,7 @@ Slack : 19.293
 TNS   : 0.000
 
 Type  : Slow 1200mV 0C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
-Slack : 22.954
+Slack : 22.934
 TNS   : 0.000
 
 Type  : Slow 1200mV 0C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[1]'
@@ -127,7 +127,7 @@ Slack : 23.683
 TNS   : 0.000
 
 Type  : Fast 1200mV 0C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
-Slack : 24.637
+Slack : 24.617
 TNS   : 0.000
 
 Type  : Fast 1200mV 0C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'