 H. Peter Anvin
|
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
|
2 years ago |
|
H. Peter Anvin
|
bec7285913
esplink: fix handshake between ESP and FPGA
|
2 years ago |
|
H. Peter Anvin
|
3847060a6e
Merge esplink work with mainline
|
2 years ago |
|
H. Peter Anvin
|
50f7f572a3
WIP: ringbuffer system between ESP32 and FPGA
|
2 years ago |
|
H. Peter Anvin
|
c4320f1f4f
esplink: better error checking, test ESP -> FPGA write direction
|
2 years ago |
|
H. Peter Anvin
|
065742e213
esplink: fix startup time race condition on ESP32 side
|
2 years ago |
|
H. Peter Anvin
|
d8e0e2d6ac
esplink: handle arbitrary byte ranges; allow ESP to query status
|
2 years ago |
|
H. Peter Anvin
|
832c07c31f
Have ESP issue a handshake interrupt; some common link code
|
2 years ago |
|
H. Peter Anvin
|
1725fbb91d
ESP32 code for FPGA link; test code and fixes
|
2 years ago |
|
H. Peter Anvin
|
aac953ed19
Implement FPGA <-> ESP32 communication path
|
2 years ago |
|
H. Peter Anvin
|
f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
|
2 years ago |
