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- #ifndef IODEV_H
- #define IODEV_H
- /* Address for I/O device d, subregister r, offset o */
- #define IODEVA(d,r,o) (0xfffff800+((d) << 7)+((r) << 2)+(o))
- #ifdef __ASSEMBLY__
- /*
- * The I/O device range is designed so that it can be addressed via
- * negative offsets from the zero register, so no explicit base
- * pointer register is necesary.
- */
- #define IODEVV(d,r) IODEVA(d,r,0)(zero)
- #define IODEVB(d,r) IODEVV(d,r,0)
- #define IODEVH(d,r) IODEVV(d,r,0)
- #define IODEVL(d,r) IODEVV(d,r,0)
- #else
- #include <stdint.h>
- /* Writable registers */
- #define IODEVV(d,r) (*(volatile void *)IODEVA(d,r,0))
- #define IODEVB(d,r) (*(volatile uint8_t *)IODEVA(d,r,0))
- #define IODEVB0(d,r) (*(volatile uint8_t *)IODEVA(d,r,0))
- #define IODEVB1(d,r) (*(volatile uint8_t *)IODEVA(d,r,1))
- #define IODEVB2(d,r) (*(volatile uint8_t *)IODEVA(d,r,2))
- #define IODEVB3(d,r) (*(volatile uint8_t *)IODEVA(d,r,3))
- #define IODEVH(d,r) (*(volatile uint16_t *)IODEVA(d,r,0))
- #define IODEVH0(d,r) (*(volatile uint16_t *)IODEVA(d,r,0))
- #define IODEVH1(d,r) (*(volatile uint16_t *)IODEVA(d,r,2))
- #define IODEVL(d,r) (*(volatile uint32_t *)IODEVA(d,r,0))
- /* Readonly registers */
- #define IODEVRV(d,r) (*(const volatile void *)IODEVA(d,r,0))
- #define IODEVRB(d,r) (*(const volatile uint8_t *)IODEVA(d,r,0))
- #define IODEVRB0(d,r) (*(const volatile uint8_t *)IODEVA(d,r,0))
- #define IODEVRB1(d,r) (*(const volatile uint8_t *)IODEVA(d,r,1))
- #define IODEVRB2(d,r) (*(const volatile uint8_t *)IODEVA(d,r,2))
- #define IODEVRB3(d,r) (*(const volatile uint8_t *)IODEVA(d,r,3))
- #define IODEVRH(d,r) (*(const volatile uint16_t *)IODEVA(d,r,0))
- #define IODEVRH0(d,r) (*(const volatile uint16_t *)IODEVA(d,r,0))
- #define IODEVRH1(d,r) (*(const volatile uint16_t *)IODEVA(d,r,2))
- #define IODEVRL(d,r) (*(const volatile uint32_t *)IODEVA(d,r,0))
- #endif
- #define CPU_HZ 84000000
- #define LED_DEV 0
- #define LED IODEVB(LED_DEV,0)
- #define RESET_DEV 1
- #define RESET_CMD IODEVL(RESET_DEV,0)
- #define ROMCOPY_DEV 2
- #define ROMCOPY_DONE IODEVRL(ROMCOPY_DEV,0)
- #define CON_DEV 3
- #define CONSOLE IODEVB(CON_DEV,0)
- #define CON_BAUDDIV IODEVL(CON_DEV,1)
- #define CON_BAUD_BASE (CPU_HZ >> 4)
- #define CON_BAUD_BITS 24
- #define CON_STATUS IODEVRL(CON_DEV,2)
- #define CON_IRQEN IODEVL(CON_DEV,3)
- #define SD_DEV 4
- #define SD_CTL IODEVL(SD_DEV,0)
- #define SD_CTL_SPEED IODEVB0(SD_DEV,0)
- #define SD_CTL_CLRCRC IODEVB1(SD_DEV,0)
- #define SD_CRC7_RD IODEVRB0(SD_DEV,2)
- #define SD_CRC16_RD IODEVRH1(SD_DEV,2)
- #define SD_CRC7_WR IODEVRB0(SD_DEV,3)
- #define SD_CRC16_WR IODEVRH1(SD_DEV,3)
- /* Speed values, not including -1 adjustment */
- #define SD_SLOW 128 /* 328 kHz */
- #define SD_20MHZ 3 /* Really 14 MHz */
- #define SD_25MHZ 2 /* Really 21 MHz */
- #define SD_50MHZ 1 /* Really 42 MHz */
- #define SYSCLOCK_DEV 5
- #define SYSCLOCK_DATETIME IODEVL(SYSCLOCK_DEV,0)
- #define SYSCLOCK_TICK IODEVL(SYSCLOCK_DEV,1)
- #define SYSCLOCK_TICK_HOLD IODEVH0(SYSCLOCK_DEV,1)
- #define SYSCLOCK_TICK_NOW IODEVH1(SYSCLOCK_DEV,1)
- #endif /* IODEV_H */
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