H. Peter Anvin 2016fa2500 usbparam.vh: corect Verilog `define syntax %!s(int64=2) %!d(string=hai) anos
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usb_fs_phy a99616cbc5 WIP: restructure USB using interfaces to be able to create more endpoints %!s(int64=3) %!d(string=hai) anos
usb_serial 5328aa117d fpga: parameterize USB max packet size %!s(int64=2) %!d(string=hai) anos
.gitignore c21293d687 usb: use generated USB descriptors %!s(int64=3) %!d(string=hai) anos
Makefile 5328aa117d fpga: parameterize USB max packet size %!s(int64=2) %!d(string=hai) anos
usb.sv af2600349c usb: enable four ACM devices %!s(int64=2) %!d(string=hai) anos
usb_desc.conf 5328aa117d fpga: parameterize USB max packet size %!s(int64=2) %!d(string=hai) anos
usb_desc.v 969d145878 fw: propagate board_info from ESP32 to FPGA %!s(int64=2) %!d(string=hai) anos
usbparam.vh 2016fa2500 usbparam.vh: corect Verilog `define syntax %!s(int64=2) %!d(string=hai) anos