max80_fw/fpga/bypass.pins

#
# This intentionally only containts the pins that cannot be
# "reserved as input with weak pullup" or are needed for
# communications with flash or esp.
#

# Bank 1
b1	abc_xm_x
c2	abc_host_v12
c1	flash_io[0]
d2	flash_cs_n
h1	flash_sck
h2	flash_io[1]

# Bank 2
l3	abc_out_n[3]
k1	abc_a[11]
l2	abc_inp_n[0]
l1	abc_a[12]
k2	abc_out_n[4]
n2	abc_a[14]
n1	abc_a[15]
k5	abc_out_n[2]
l4	abc_a[10]

# Bank 3
p6	spi_clk
m7	spi_miso
r5	abc_d_oe
r6	abc_resin_x
m8	spi_mosi
n8	spi_cs_esp_n
p8	esp_int
n6	spi_cs_flash_n

# Bank 4
t13	led_2
t10	abc_host_v1
k10	board_id
r13	hdmi_sda
t14	led_1_v1
p14	led_1_v2
r14	led_0

# Bank 5 (2.5 V)
m15	clock_in

# Bank 6
e15	rtc_32khz

# Bank 7

# Bank 8
b4	abc_rdy_x
a2	abc_int800_x
a3	abc_nmi_x
b3	abc_int80_x