| .. |
|
bsdl
|
50f7f572a3
WIP: ringbuffer system between ESP32 and FPGA
|
2 years ago |
|
ip
|
80ad2f4a50
fpga: dirty bit tracking for SDRAM
|
1 year ago |
|
output
|
09273c35a8
Wire up Smartaid Magnum in the FPGA
|
1 year ago |
|
scripts
|
fcbaca5e17
iodevs.conf: move iodevs.conf into common/
|
1 year ago |
|
simulation
|
f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
|
3 years ago |
|
usb
|
fcbaca5e17
iodevs.conf: move iodevs.conf into common/
|
1 year ago |
|
.gitignore
|
dd3e36cf74
fpga: remove intermediate files; update .fw files
|
1 year ago |
|
Makefile
|
fcbaca5e17
iodevs.conf: move iodevs.conf into common/
|
1 year ago |
|
abcbus.sv
|
09273c35a8
Wire up Smartaid Magnum in the FPGA
|
1 year ago |
|
assignment_defaults.qdf
|
75a6dbc7fa
fpga: infrastructure for building v1 and v2 FPGA
|
3 years ago |
|
bootldr.sv
|
e05dbe6f40
v2boot: simple boot loader connecting ESP32-SPI to flash-SPI
|
2 years ago |
|
bypass.pins
|
f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
|
2 years ago |
|
bypass.qsf
|
0cf5cc5926
Update binaries
|
1 year ago |
|
bypass.sdc
|
f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
|
2 years ago |
|
bypass.sv
|
f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
|
2 years ago |
|
bypass_description.txt
|
f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
|
2 years ago |
|
bypass_main.qsf
|
3b452dc33e
fpga: factor bypass.qsf like the other .qsf files
|
1 year ago |
|
clkbuf.sv
|
808ba7c43c
usb: use a direct interface between the CPU and the USB FIFOs
|
3 years ago |
|
dcpktfifo.sv
|
bddbff2298
usb: don't remove "empty" or "last" while a packet is in progress
|
2 years ago |
|
deglitch.sv
|
a69847d434
fpga: add deglitcher core
|
2 years ago |
|
dirty.sv
|
80ad2f4a50
fpga: dirty bit tracking for SDRAM
|
1 year ago |
|
esp.sv
|
54aa67c9dd
esplink: change to 7 interrupt/status bits per direction
|
2 years ago |
|
fast_mem.sv
|
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
|
2 years ago |
|
fpgarst.sv
|
ee45852b85
Full infrastructure for updating flash via JTAG SVF
|
2 years ago |
|
functions.sv
|
54aa67c9dd
esplink: change to 7 interrupt/status bits per direction
|
2 years ago |
|
i2c.sv
|
4970fb6ef6
rtc: issue dummy clock cycles if SDA appears stuck
|
3 years ago |
|
iodevs.vh
|
f9a7f7cbdb
Update generated files
|
1 year ago |
|
jic.cof.xml
|
ee45852b85
Full infrastructure for updating flash via JTAG SVF
|
2 years ago |
|
max80.qpf
|
09273c35a8
Wire up Smartaid Magnum in the FPGA
|
1 year ago |
|
max80.qsf
|
80ad2f4a50
fpga: dirty bit tracking for SDRAM
|
1 year ago |
|
max80.sdc
|
8b67b5db30
spirom: fix SPI ROM I/O and data downloading
|
2 years ago |
|
max80.sv
|
09273c35a8
Wire up Smartaid Magnum in the FPGA
|
1 year ago |
|
picorv32.v
|
78fb11f073
fpga, rv32: Add custom atomic instructions lw.l/sw.u
|
1 year ago |
|
pof.cof.xml
|
ee45852b85
Full infrastructure for updating flash via JTAG SVF
|
2 years ago |
|
reconfig.svf
|
4803e910d3
fpga: .svf file to force a FPGA reconfiguration
|
2 years ago |
|
rng.sv
|
de1566292f
clocks: centralize strobes; rng: shut down when not in use
|
3 years ago |
|
sam.sv
|
0f24359f94
sam.sv: correct A0 -> bank[0], A1 -> bank[1]
|
1 year ago |
|
sdcard.sv
|
ec99762a84
Use waitirq rather than suspending a memory transaction for SD card
|
3 years ago |
|
sdram.sv
|
80ad2f4a50
fpga: dirty bit tracking for SDRAM
|
1 year ago |
|
serial.sv
|
f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
|
2 years ago |
|
spi_master.sv
|
062a3d9eb1
Reorganize tree so a single Makefile can do the right thing
|
3 years ago |
|
spirom.sv
|
ee45852b85
Full infrastructure for updating flash via JTAG SVF
|
2 years ago |
|
synchro.sv
|
4e65673781
spirom: add support for sending arbitrary SPI commands
|
3 years ago |
|
sysclock.sv
|
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
|
2 years ago |
|
tmdsenc.sv
|
74d9da52b0
hdmi/tmds: fix symbol data ordering
|
3 years ago |
|
transpose.sv
|
510e702728
video: initial simple video generator; add support for HDMI TERC4
|
3 years ago |
|
ub.tcl
|
2ec75f1807
fpga: virtual JTAG interface
|
2 years ago |
|
v1.pins
|
aac953ed19
Implement FPGA <-> ESP32 communication path
|
2 years ago |
|
v1.qsf
|
f40bb6e0be
Rebuild binaries with the proper version of the tools
|
1 year ago |
|
v1.sv
|
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
|
2 years ago |
|
v1_description.txt
|
75a6dbc7fa
fpga: infrastructure for building v1 and v2 FPGA
|
3 years ago |
|
v1_main.qsf
|
bddbff2298
usb: don't remove "empty" or "last" while a packet is in progress
|
2 years ago |
|
v2.pins
|
aac953ed19
Implement FPGA <-> ESP32 communication path
|
2 years ago |
|
v2.qsf
|
f40bb6e0be
Rebuild binaries with the proper version of the tools
|
1 year ago |
|
v2.sv
|
e05dbe6f40
v2boot: simple boot loader connecting ESP32-SPI to flash-SPI
|
2 years ago |
|
v2.vh
|
aac953ed19
Implement FPGA <-> ESP32 communication path
|
2 years ago |
|
v2_description.txt
|
75a6dbc7fa
fpga: infrastructure for building v1 and v2 FPGA
|
3 years ago |
|
v2_main.qsf
|
bddbff2298
usb: don't remove "empty" or "last" while a packet is in progress
|
2 years ago |
|
v2boot.sv
|
e05dbe6f40
v2boot: simple boot loader connecting ESP32-SPI to flash-SPI
|
2 years ago |
|
video.sv
|
980eaf0400
Restructure clock tree; better sdram timing; random number generator
|
3 years ago |
|
vjtag_max80.sv
|
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
|
2 years ago |
H. Peter Anvin
09273c35a8
Wire up Smartaid Magnum in the FPGA