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@@ -98,11 +98,25 @@ index 03a1b12..1b01446 100644
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GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
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|
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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+diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
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+index a4317e4..7165538 100644
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+--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
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++++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
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+@@ -614,7 +614,8 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, ui
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+ HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
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+ /* Non-Blocking mode: DMA */
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+ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
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+-HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
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++HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
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++HAL_StatusTypeDef HAL_SD_WriteBlocks_Data(SD_HandleTypeDef *hsd, uint8_t *pData);
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+
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+ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
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+
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diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
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-index c966c906..9d709100 100644
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|
+index 181b4b7..d71c37b 100644
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--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
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+++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
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-@@ -1074,6 +1074,7 @@ uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
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+@@ -1064,6 +1064,7 @@ uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
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uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
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uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
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uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
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@@ -110,44 +124,8 @@ index c966c906..9d709100 100644
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uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
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uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
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uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
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-diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
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-index 4f23a455..614b6dce 100644
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---- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
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-+++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
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|
-@@ -606,6 +606,31 @@ uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
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- return errorstate;
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|
- }
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|
-
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|
|
-+/**
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|
-+ * @brief Set the count of a multi-block write command
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|
-+ * @param SDIOx: Pointer to SDIO register base
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|
-+ * @retval HAL status
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|
-+ */
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-+uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount)
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-+{
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-+ SDIO_CmdInitTypeDef sdmmc_cmdinit;
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|
-+ uint32_t errorstate;
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-+
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|
-+ errorstate = SDMMC_CmdAppCommand(SDIOx, appCmdArg);
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|
-+ if(errorstate == HAL_SD_ERROR_NONE)
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|
-+ {
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|
-+ sdmmc_cmdinit.Argument = blockCount;
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-+ sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT;
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|
-+ sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
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-+ sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
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-+ sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
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|
-+ (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
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|
-+ errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);
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|
|
-+ }
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|
-+
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|
|
-+ return errorstate;
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|
|
-+}
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|
-+
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|
|
- /**
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|
|
- * @brief Send the Write Multi Block command and check the response
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|
- * @param SDIOx: Pointer to SDIO register base
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diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
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-index d2a88d75..1a09028f 100644
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|
+index 569c8b1..b10dd0e 100644
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--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
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+++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
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@@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
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@@ -161,7 +139,7 @@ index d2a88d75..1a09028f 100644
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/* Identify card operating voltage */
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errorstate = SD_PowerON(hsd);
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if(errorstate != HAL_SD_ERROR_NONE)
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-@@ -1247,22 +1251,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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+@@ -1227,22 +1231,21 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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else
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{
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/* Enable SD DMA transfer */
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@@ -172,7 +150,7 @@ index d2a88d75..1a09028f 100644
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{
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add *= 512U;
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- }
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-
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+-
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- /* Set Block Size for Card */
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- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
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- if(errorstate != HAL_SD_ERROR_NONE)
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@@ -195,7 +173,7 @@ index d2a88d75..1a09028f 100644
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}
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/* Configure the SD DPSM (Data Path State Machine) */
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-@@ -1272,6 +1276,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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+@@ -1252,6 +1255,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO;
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config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
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config.DPSM = SDIO_DPSM_ENABLE;
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@@ -207,10 +185,31 @@ index d2a88d75..1a09028f 100644
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(void)SDIO_ConfigData(hsd->Instance, &config);
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/* Read Blocks in DMA mode */
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-@@ -1343,6 +1352,19 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+@@ -1301,18 +1309,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
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+ * @param NumberOfBlocks: Number of blocks to write
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+ * @retval HAL status
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+ */
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+-HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
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++HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks)
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+ {
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+- SDIO_DataInitTypeDef config;
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+ uint32_t errorstate;
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+ uint32_t add = BlockAdd;
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+
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+- if(NULL == pData)
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+- {
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+- hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
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+- return HAL_ERROR;
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+- }
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+-
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|
+ if(hsd->State == HAL_SD_STATE_READY)
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+ {
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+ hsd->ErrorCode = HAL_SD_ERROR_NONE;
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+@@ -1323,15 +1324,29 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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return HAL_ERROR;
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}
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|
+- hsd->State = HAL_SD_STATE_BUSY;
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+ if(NumberOfBlocks > 1U && hsd->SdCard.CardType == CARD_SDHC_SDXC)
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+ {
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+ /* MM: Prepare for write */
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@@ -224,15 +223,26 @@ index d2a88d75..1a09028f 100644
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+ }
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+ }
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+
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- hsd->State = HAL_SD_STATE_BUSY;
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++ // hsd->State = HAL_SD_STATE_BUSY;
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/* Initialize data control register */
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-@@ -1367,17 +1389,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+ hsd->Instance->DCTRL = 0U;
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+
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+ /* Enable SD Error interrupts */
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+- __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR));
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|
++ __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR | SDIO_IT_DATAEND));
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+
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+ /* Set the DMA transfer complete callback */
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|
++ // This callback now doesn't do anything - enabling DATAEND interrupt is set above to avoid race conditions
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+ hsd->hdmatx->XferCpltCallback = SD_DMATransmitCplt;
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+
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+ /* Set the DMA error callback */
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+@@ -1343,17 +1358,16 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
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{
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add *= 512U;
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|
- }
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-
|
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+-
|
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|
- /* Set Block Size for Card */
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|
- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
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|
- if(errorstate != HAL_SD_ERROR_NONE)
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@@ -255,16 +265,72 @@ index d2a88d75..1a09028f 100644
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}
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|
|
|
/* Write Blocks in Polling mode */
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|
-@@ -1406,7 +1428,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+@@ -1381,11 +1395,55 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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|
+ return HAL_ERROR;
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|
}
|
|
|
|
|
|
- /* Enable SDIO DMA transfer */
|
|
|
+- /* Enable SDIO DMA transfer */
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|
- __HAL_SD_DMA_ENABLE(hsd);
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|
-+ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
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|
++ return HAL_OK;
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|
|
++ }
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++ else
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|
++ {
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|
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++ return HAL_BUSY;
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|
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++ }
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|
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++}
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++
|
|
|
++/**
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|
++ * @brief Writes block(s) to a specified address in a card. The Data transfer
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++ * is managed by DMA mode.
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++ * @note This API should be followed by a check on the card state through
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++ * HAL_SD_GetCardState().
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++ * @note You could also check the DMA transfer process through the SD Tx
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++ * interrupt event.
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++ * @param hsd: Pointer to SD handle
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++ * @param pData: Pointer to the buffer that will contain the data to transmit
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++ * @param BlockAdd: Block Address where data will be written
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|
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++ * @param NumberOfBlocks: Number of blocks to write
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++ * @retval HAL status
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++ */
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++HAL_StatusTypeDef HAL_SD_WriteBlocks_Data(SD_HandleTypeDef *hsd, uint8_t *pData)
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|
++{
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|
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++ SDIO_DataInitTypeDef config;
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++
|
|
|
++ if(hsd->State == HAL_SD_STATE_READY)
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|
++ {
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|
|
++ hsd->ErrorCode = HAL_SD_ERROR_NONE;
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++
|
|
|
++ hsd->State = HAL_SD_STATE_BUSY;
|
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++
|
|
|
++ /* Initialize data control register */
|
|
|
++ hsd->Instance->DCTRL = 0U;
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++
|
|
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++ /* Enable SD Error interrupts */
|
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++ __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR | SDIO_IT_DATAEND));
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++
|
|
|
++ /* Set the DMA transfer complete callback */
|
|
|
++ // This callback now doesn't do anything - enabling DATAEND interrupt is set above to avoid race conditions
|
|
|
++ hsd->hdmatx->XferCpltCallback = SD_DMATransmitCplt;
|
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++
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|
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++ /* Set the DMA error callback */
|
|
|
++ hsd->hdmatx->XferErrorCallback = SD_DMAError;
|
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|
++
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|
|
++ /* Set the DMA Abort callback */
|
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++ hsd->hdmatx->XferAbortCallback = NULL;
|
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|
|
|
|
/* Enable the DMA Channel */
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|
- if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
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-@@ -1431,6 +1453,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+- if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
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++ if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE)/4U) != HAL_OK)
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|
|
+ {
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|
|
+ __HAL_SD_DISABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR));
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|
|
+ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
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|
+@@ -1398,11 +1456,16 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
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+ {
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|
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+ /* Configure the SD DPSM (Data Path State Machine) */
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|
|
+ config.DataTimeOut = SDMMC_DATATIMEOUT;
|
|
|
+- config.DataLength = BLOCKSIZE * NumberOfBlocks;
|
|
|
++ config.DataLength = BLOCKSIZE;
|
|
|
+ config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
|
|
|
config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD;
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|
|
config.TransferMode = SDIO_TRANSFER_MODE_BLOCK;
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|
|
config.DPSM = SDIO_DPSM_ENABLE;
|
|
|
@@ -276,14 +342,84 @@ index d2a88d75..1a09028f 100644
|
|
|
(void)SDIO_ConfigData(hsd->Instance, &config);
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|
|
|
|
return HAL_OK;
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|
|
-@@ -1632,6 +1659,10 @@ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd)
|
|
|
- HAL_SD_ErrorCallback(hsd);
|
|
|
- #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
|
|
|
- }
|
|
|
+@@ -1588,16 +1651,8 @@ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd)
|
|
|
+ {
|
|
|
+ if((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)
|
|
|
+ {
|
|
|
+- errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
|
|
|
+- if(errorstate != HAL_SD_ERROR_NONE)
|
|
|
+- {
|
|
|
+- hsd->ErrorCode |= errorstate;
|
|
|
+-#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
|
|
|
+- hsd->ErrorCallback(hsd);
|
|
|
+-#else
|
|
|
+- HAL_SD_ErrorCallback(hsd);
|
|
|
+-#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
|
|
|
+- }
|
|
|
+ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
|
|
|
-+
|
|
|
-+ hsd->State = HAL_SD_STATE_READY;
|
|
|
-+ hsd->Context = SD_CONTEXT_NONE;
|
|
|
++ __HAL_SD_DMA_DISABLE(hsd);
|
|
|
}
|
|
|
if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) == 0U) && ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) == 0U))
|
|
|
{
|
|
|
+@@ -2354,7 +2409,7 @@ HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd)
|
|
|
+ hsd->Context = SD_CONTEXT_NONE;
|
|
|
+
|
|
|
+ CardState = HAL_SD_GetCardState(hsd);
|
|
|
+- if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING))
|
|
|
++ if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING) || (CardState == HAL_SD_CARD_PROGRAMMING))
|
|
|
+ {
|
|
|
+ hsd->ErrorCode = SDMMC_CmdStopTransfer(hsd->Instance);
|
|
|
+ }
|
|
|
+@@ -2460,10 +2515,13 @@ HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd)
|
|
|
+ */
|
|
|
+ static void SD_DMATransmitCplt(DMA_HandleTypeDef *hdma)
|
|
|
+ {
|
|
|
+- SD_HandleTypeDef* hsd = (SD_HandleTypeDef* )(hdma->Parent);
|
|
|
++ // SD_HandleTypeDef* hsd = (SD_HandleTypeDef* )(hdma->Parent);
|
|
|
+
|
|
|
+ /* Enable DATAEND Interrupt */
|
|
|
+- __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
|
|
|
++ // __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
|
|
|
++ //WHAT IF IT ALREADY TRIGGERED ? Maybe it can't due to interrupt priorities ?
|
|
|
++ // Easier to just ignore it.
|
|
|
++ // __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
|
|
|
+ }
|
|
|
+
|
|
|
+ /**
|
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+diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
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+index b060eae..de39f9d 100644
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+--- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
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++++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
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+@@ -606,6 +606,32 @@ uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
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+ return errorstate;
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+ }
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+
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++/**
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++ * @brief Set the count of a multi-block write command
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++ * @param SDIOx: Pointer to SDIO register base
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++ * @retval HAL status
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++ */
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++uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount)
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++{
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++ SDIO_CmdInitTypeDef sdmmc_cmdinit;
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++ uint32_t errorstate;
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++
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++ errorstate = SDMMC_CmdAppCommand(SDIOx, appCmdArg);
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++ if(errorstate == HAL_SD_ERROR_NONE)
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++ {
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++ sdmmc_cmdinit.Argument = blockCount;
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++ sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT;
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++ sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
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++ sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
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++ sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
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++ (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
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++ errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);
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++ }
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++
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++ return errorstate;
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++}
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++
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++
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+ /**
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+ * @brief Send the Write Multi Block command and check the response
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+ * @param SDIOx: Pointer to SDIO register base
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