Fixed parity handling to respect the --no-parity config option.

- Automatically disable parity checks for old SASI/SCSI1 hosts.
- Add scsi disconnect/reconnect support for long SD card writes.

lib/SCSI2SD/CHANGELOG

@@ -4,6 +4,7 @@
 	multiple devices on the SCSI bus.
 	- Re-add parity checking. This can be disabled using scsi2sd-config if
 	required.
+	- Added disconnect/reconnect support during SD card writes.
 
 20140718		3.5.2
 	- Fix blank SCSI ID in scsi2sd-config output.

lib/SCSI2SD/readme.txt

@@ -73,6 +73,9 @@ Compatibility
     Microvax 3100 Model 80 running VMS 7.3 (needs patch against v3.5.2 firmware) 
     Amiga 500+ with GVP A530
     Atari TT030 System V 
+    Atari MEGA STE
+        needs J3 TERMPWR jumper
+        1GB limit (--blocks=2048000)
 
 Samplers
 
@@ -93,5 +96,5 @@ Samplers
 
 Other
 
-    HP 16601A logic analyzer
+    HP 16601A, 16700A logic analyzers
     Fluke 9100 series 

lib/SCSI2SD/software/SCSI2SD/src/disk.c

@@ -22,6 +22,7 @@
 #include "config.h"
 #include "disk.h"
 #include "sd.h"
+#include "time.h"
 
 #include <string.h>
 
@@ -56,7 +57,7 @@ static void doFormatUnitSkipData(int bytes)
 	int i;
 	for (i = 0; i < bytes; ++i)
 	{
-		scsiReadByte();	
+		scsiReadByte();
 	}
 }
 
@@ -80,7 +81,7 @@ static void doFormatUnitHeader(void)
 {
 	int IP = (scsiDev.data[1] & 0x08) ? 1 : 0;
 	int DSP = (scsiDev.data[1] & 0x04) ? 1 : 0;
-	
+
 	if (! DSP) // disable save parameters
 	{
 		configSave(); // Save the "MODE SELECT savable parameters"
@@ -520,15 +521,18 @@ void scsiDiskPoll()
 		transfer.currentBlock != transfer.blocks)
 	{
 		scsiEnterPhase(DATA_OUT);
-		
+
 		int totalSDSectors = transfer.blocks * SDSectorsPerSCSISector();
 		int buffers = sizeof(scsiDev.data) / SD_SECTOR_SIZE;
 		int prep = 0;
 		int i = 0;
+		int scsiDisconnected = 0;
+		volatile uint32_t lastActivityTime = getTime_ms();
 		int scsiActive = 0;
 		int sdActive = 0;
+		
 		while ((i < totalSDSectors) &&
-			(scsiDev.phase == DATA_OUT) &&
+			(scsiDev.phase == DATA_OUT) && // scsiDisconnect keeps our phase.
 			!scsiDev.resetFlag)
 		{
 			if ((sdActive == 1) && sdWriteSectorDMAPoll())
@@ -547,8 +551,12 @@ void scsiDiskPoll()
 			{
 				scsiActive = 0;
 				++prep;
+				lastActivityTime = getTime_ms();
 			}
-			else if ((scsiActive == 0) && ((prep - i) < buffers) && (prep < totalSDSectors))
+			else if ((scsiActive == 0) &&
+				((prep - i) < buffers) &&
+				(prep < totalSDSectors) &&
+				!scsiDisconnected)
 			{
 				int dmaBytes = SD_SECTOR_SIZE;
 				if (prep % SDSectorsPerSCSISector() == SDSectorsPerSCSISector() - 1)
@@ -559,11 +567,62 @@ void scsiDiskPoll()
 				scsiReadDMA(&scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)], dmaBytes);
 				scsiActive = 1;
 			}
+			else if (
+				(scsiActive == 0) &&
+				!scsiDisconnected &&
+				scsiDev.discPriv &&
+				(diffTime_ms(lastActivityTime, getTime_ms()) >= 20) &&
+				(scsiDev.phase == DATA_OUT))
+			{
+				// We're transferring over the SCSI bus faster than the SD card
+				// can write.  There is no more buffer space once we've finished
+				// this SCSI transfer.
+				// The NCR 53C700 interface chips have a 250ms "byte-to-byte"
+				// timeout buffer. SD card writes are supposed to complete
+				// within 200ms, but sometimes they don't.
+				// The NCR 53C700 series is used on HP 9000 workstations.
+				scsiDisconnect();
+				scsiDisconnected = 1;
+				lastActivityTime = getTime_ms();
+			}
+			else if (scsiDisconnected &&
+				(
+					(prep == i) || // Buffers empty.
+					// Send some messages every 100ms so we don't timeout.
+					// At a minimum, a reselection involves an IDENTIFY message.
+					(diffTime_ms(lastActivityTime, getTime_ms()) >= 100)
+				))
+			{
+				int reconnected = scsiReconnect();
+				if (reconnected)
+				{
+					scsiDisconnected = 0;
+					lastActivityTime = getTime_ms(); // Don't disconnect immediately.
+				}
+				else if (diffTime_ms(lastActivityTime, getTime_ms()) >= 10000)
+				{
+					// Give up after 10 seconds of trying to reconnect.
+					scsiDev.resetFlag = 1;
+				}
+			}
 		}
-		
+
+		while (
+			!scsiDev.resetFlag &&
+			scsiDisconnected &&
+			(diffTime_ms(lastActivityTime, getTime_ms()) <= 10000))
+		{
+			scsiDisconnected = !scsiReconnect();
+		}
+		if (scsiDisconnected)
+		{
+			// Failed to reconnect
+			scsiDev.resetFlag = 1;
+		}
+
 		if (scsiDev.phase == DATA_OUT)
 		{
-			if (scsiDev.parityError)
+			if (scsiDev.parityError && config->enableParity && !scsiDev.compatMode)
 			{
 				scsiDev.sense.code = ABORTED_COMMAND;
 				scsiDev.sense.asc = SCSI_PARITY_ERROR;

lib/SCSI2SD/software/SCSI2SD/src/main.c

@@ -21,11 +21,13 @@
 #include "config.h"
 #include "disk.h"
 #include "led.h"
+#include "time.h"
 
 const char* Notice = "Copyright (C) 2014 Michael McMaster <michael@codesrc.com>";
 
 int main()
 {
+	timeInit();
 	ledInit();
 
 	// Enable global interrupts.

lib/SCSI2SD/software/SCSI2SD/src/scsi.c

@@ -26,6 +26,7 @@
 #include "led.h"
 #include "mode.h"
 #include "disk.h"
+#include "time.h"
 
 #include <string.h>
 
@@ -197,7 +198,7 @@ static void process_DataOut()
 		scsiRead(scsiDev.data + scsiDev.dataPtr, len);
 		scsiDev.dataPtr += len;
 
-		if (scsiDev.parityError && config->enableParity)
+		if (scsiDev.parityError && config->enableParity && !scsiDev.compatMode)
 		{
 			scsiDev.sense.code = ABORTED_COMMAND;
 			scsiDev.sense.asc = SCSI_PARITY_ERROR;
@@ -255,7 +256,7 @@ static void process_Command()
 		memset(scsiDev.cdb, 0xff, sizeof(scsiDev.cdb));
 		return;
 	}
-	else if (scsiDev.parityError)
+	else if (scsiDev.parityError && config->enableParity && !scsiDev.compatMode)
 	{
 		scsiDev.sense.code = ABORTED_COMMAND;
 		scsiDev.sense.asc = SCSI_PARITY_ERROR;
@@ -464,6 +465,8 @@ static void enter_SelectionPhase()
 	scsiDev.status = GOOD;
 	scsiDev.phase = SELECTION;
 	scsiDev.lun = -1;
+	scsiDev.discPriv = 0;
+	scsiDev.compatMode = 0;
 
 	transfer.blocks = 0;
 	transfer.currentBlock = 0;
@@ -481,21 +484,26 @@ static void process_SelectionPhase()
 	uint8 mask = scsiReadDBxPins();
 	int maskBitCount = countBits(mask);
 	int goodParity = (Lookup_OddParity[mask] == SCSI_ReadPin(SCSI_In_DBP));
+	int atnFlag = SCSI_ReadFilt(SCSI_Filt_ATN);
 
 	if (!bsy && sel &&
 		(mask & scsiDev.scsiIdMask) &&
-		(goodParity || !config->enableParity) && (maskBitCount <= 2))
+		(goodParity || !config->enableParity || !atnFlag) &&
+		(maskBitCount <= 2))
 	{
 		// Do we enter MESSAGE OUT immediately ? SCSI 1 and 2 standards says
 		// move to MESSAGE OUT if ATN is true before we assert BSY.
 		// The initiator should assert ATN with SEL.
-		scsiDev.atnFlag = SCSI_ReadFilt(SCSI_Filt_ATN);
-		
-		// Unit attention breaks many older SCSI hosts. Disable it completely for
-		// SCSI-1 (and older) hosts, regardless of our configured setting.
+		scsiDev.atnFlag = atnFlag;
+
+		// Unit attention breaks many older SCSI hosts. Disable it completely
+		// for SCSI-1 (and older) hosts, regardless of our configured setting.
+		// Enable the compatability mode also as many SASI and SCSI1
+		// controllers don't generate parity bits.
 		if (!scsiDev.atnFlag)
 		{
 			scsiDev.unitAttention = 0;
+			scsiDev.compatMode = 1;
 		}
 
 		// We've been selected!
@@ -557,7 +565,7 @@ static void process_MessageOut()
 	scsiDev.msgOut = scsiReadByte();
 	scsiDev.msgCount++;
 
-	if (scsiDev.parityError)
+	if (scsiDev.parityError && config->enableParity && !scsiDev.compatMode)
 	{
 		// Skip the remaining message bytes, and then start the MESSAGE_OUT
 		// phase again from the start. The initiator will re-send the
@@ -630,7 +638,6 @@ static void process_MessageOut()
 	else if (scsiDev.msgOut & 0x80) // 0x80 -> 0xFF
 	{
 		// IDENTIFY
-		// We don't disconnect, so ignore disconnect privilege.
 		if ((scsiDev.msgOut & 0x18) || // Reserved bits set.
 			(scsiDev.msgOut & 0x20))  // We don't have any target routines!
 		{
@@ -638,7 +645,9 @@ static void process_MessageOut()
 		}
 
 		scsiDev.lun = scsiDev.msgOut & 0x7;
-		//scsiDev.allowDisconnect = scsiDev.msgOut & 0x40;
+		scsiDev.discPriv =
+			((scsiDev.msgOut & 0x40) && (scsiDev.initiatorId >= 0))
+				? 1 : 0;
 	}
 	else if (scsiDev.msgOut >= 0x20 && scsiDev.msgOut <= 0x2F)
 	{
@@ -811,3 +820,105 @@ void scsiInit()
 	scsiDev.unitAttention = POWER_ON_RESET;
 }
 
+void scsiDisconnect()
+{
+	scsiEnterPhase(MESSAGE_IN);
+	scsiWriteByte(0x02); // save data pointer
+	scsiWriteByte(0x04); // disconnect msg.
+
+	// For now, the caller is responsible for tracking the disconnected
+	// state, and calling scsiReconnect.
+	// Ideally the client would exit their loop and we'd implement this
+	// as part of scsiPoll
+	int phase = scsiDev.phase;
+	enter_BusFree();
+	scsiDev.phase = phase;
+}
+
+int scsiReconnect()
+{
+	int reconnected = 0;
+
+	int sel = SCSI_ReadFilt(SCSI_Filt_SEL);
+	int bsy = SCSI_ReadFilt(SCSI_Filt_BSY);
+	if (!sel && !bsy)
+	{
+		CyDelayUs(1);
+		sel = SCSI_ReadFilt(SCSI_Filt_SEL);
+		bsy = SCSI_ReadFilt(SCSI_Filt_BSY);
+	}
+
+	if (!sel && !bsy)
+	{
+		// Arbitrate.
+		ledOn();
+		SCSI_Out_Bits_Write(scsiDev.scsiIdMask);
+		SCSI_Out_Ctl_Write(1); // Write bits manually.
+		SCSI_SetPin(SCSI_Out_BSY);
+
+		CyDelayUs(3); // arbitrate delay. 2.4us.
+
+		uint8_t dbx = scsiReadDBxPins();
+		sel = SCSI_ReadFilt(SCSI_Filt_SEL);
+		if (sel || ((dbx ^ scsiDev.scsiIdMask) > scsiDev.scsiIdMask))
+		{
+			// Lost arbitration.
+			SCSI_Out_Ctl_Write(0);
+			SCSI_ClearPin(SCSI_Out_BSY);
+			ledOff();
+		}
+		else
+		{
+			// Won arbitration
+			SCSI_SetPin(SCSI_Out_SEL);
+			CyDelayUs(1); // Bus clear + Bus settle.
+
+			// Reselection phase
+			SCSI_CTL_PHASE_Write(__scsiphase_io);
+			SCSI_Out_Bits_Write(scsiDev.scsiIdMask | (1 << scsiDev.initiatorId));
+			scsiDeskewDelay(); // 2 deskew delays
+			scsiDeskewDelay(); // 2 deskew delays
+			SCSI_ClearPin(SCSI_Out_BSY);
+			CyDelayUs(1);  // Bus Settle Delay
+
+			uint32_t waitStart_ms = getTime_ms();
+			bsy = SCSI_ReadFilt(SCSI_Filt_BSY);
+			// Wait for initiator.
+			while (
+				!bsy &&
+				!scsiDev.resetFlag &&
+				(diffTime_ms(waitStart_ms, getTime_ms()) < 250))
+			{
+				bsy = SCSI_ReadFilt(SCSI_Filt_BSY);
+			}
+
+			if (bsy)
+			{
+				SCSI_SetPin(SCSI_Out_BSY);
+				scsiDeskewDelay(); // 2 deskew delays
+				scsiDeskewDelay(); // 2 deskew delays
+				SCSI_ClearPin(SCSI_Out_SEL);
+
+				// Prepare for the initial IDENTIFY message.
+				SCSI_Out_Ctl_Write(0);
+				scsiEnterPhase(MESSAGE_IN);
+
+				// Send identify command
+				scsiWriteByte(0x80);
+
+				scsiEnterPhase(scsiDev.phase);
+				reconnected = 1;
+			}
+			else
+			{
+				// reselect timeout.
+				SCSI_Out_Ctl_Write(0);
+				SCSI_ClearPin(SCSI_Out_SEL);
+				SCSI_CTL_PHASE_Write(0);
+				ledOff();
+			}
+		}
+	}
+	return reconnected;
+}
+

lib/SCSI2SD/software/SCSI2SD/src/scsi.h

@@ -85,6 +85,8 @@ typedef struct
 	uint8 cdb[12]; // command descriptor block
 	uint8 cdbLen; // 6, 10, or 12 byte message.
 	int8 lun; // Target lun, set by IDENTIFY message.
+	uint8 discPriv; // Disconnect priviledge.
+	uint8_t compatMode; // true for SCSI1 and SASI hosts.
 
 	// Only let the reserved initiator talk to us.
 	// A 3rd party may be sending the RESERVE/RELEASE commands
@@ -93,7 +95,7 @@ typedef struct
 	int reserverId; // 0 -> 7 if reserved. -1 if not reserved.
 
 	// SCSI_STATUS value.
-	// Change to SCSI_STATUS_CHECK_CONDITION when setting a SENSE value
+	// Change to CHECK_CONDITION when setting a SENSE value
 	uint8 status;
 
 	ScsiSense sense;
@@ -118,6 +120,7 @@ extern ScsiDevice scsiDev;
 
 void scsiInit(void);
 void scsiPoll(void);
-
+void scsiDisconnect(void);
+int scsiReconnect(void);
 
 #endif

lib/SCSI2SD/software/SCSI2SD/src/scsiPhy.h

@@ -60,6 +60,10 @@ enum FilteredInputs
 #define SCSI_ReadFilt(filt) \
 	((SCSI_Filtered_Read() & (filt)) == 0)
 
+// SCSI delays, as referenced to the cpu clock
+#define CPU_CLK_PERIOD_NS (1000000000U / BCLK__BUS_CLK__HZ)
+#define scsiDeskewDelay() CyDelayCycles((55 / CPU_CLK_PERIOD_NS) + 1)
+
 // Contains the odd-parity flag for a given 8-bit value.
 extern const uint8_t Lookup_OddParity[256];
 

lib/SCSI2SD/software/SCSI2SD/src/time.c

@@ -0,0 +1,56 @@
+//	Copyright (C) 2014 Michael McMaster <michael@codesrc.com>
+//
+//	This file is part of SCSI2SD.
+//
+//	SCSI2SD is free software: you can redistribute it and/or modify
+//	it under the terms of the GNU General Public License as published by
+//	the Free Software Foundation, either version 3 of the License, or
+//	(at your option) any later version.
+//
+//	SCSI2SD is distributed in the hope that it will be useful,
+//	but WITHOUT ANY WARRANTY; without even the implied warranty of
+//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//	GNU General Public License for more details.
+//
+//	You should have received a copy of the GNU General Public License
+//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+
+#include "time.h"
+#include "limits.h"
+
+static volatile uint32_t counter = 0;
+
+CY_ISR_PROTO(TickISR);
+CY_ISR(TickISR)
+{
+	// Should be atomic at 32bit word size. Limits runtime to 49 days.
+	++counter;
+}
+
+void timeInit()
+{
+	// Interrupt 15. SysTick_IRQn is -1.
+	// The SysTick timer is integrated into the Arm Cortex M3
+	CyIntSetSysVector((SysTick_IRQn + 16), TickISR);
+
+	// Ensure the cycle count is < 24bit.
+	// At 50MHz bus clock, counter is 50000.
+	SysTick_Config((BCLK__BUS_CLK__HZ + 999u) / 1000u);
+}
+
+uint32_t getTime_ms()
+{
+	return counter;
+}
+
+uint32_t diffTime_ms(uint32_t start, uint32_t end)
+{
+	if (end >= start)
+	{
+		return 	end - start;
+	}
+	else
+	{
+		return (UINT_MAX - start) + end;
+	}
+}

lib/SCSI2SD/software/SCSI2SD/src/time.h

@@ -0,0 +1,26 @@
+//	Copyright (C) 2014 Michael McMaster <michael@codesrc.com>
+//
+//	This file is part of SCSI2SD.
+//
+//	SCSI2SD is free software: you can redistribute it and/or modify
+//	it under the terms of the GNU General Public License as published by
+//	the Free Software Foundation, either version 3 of the License, or
+//	(at your option) any later version.
+//
+//	SCSI2SD is distributed in the hope that it will be useful,
+//	but WITHOUT ANY WARRANTY; without even the implied warranty of
+//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//	GNU General Public License for more details.
+//
+//	You should have received a copy of the GNU General Public License
+//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+#ifndef TIME_H
+#define TIME_H
+
+#include "device.h"
+
+void timeInit(void);
+uint32_t getTime_ms(void); // Returns milliseconds since init
+uint32_t diffTime_ms(uint32_t start, uint32_t end);
+
+#endif

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoCCreatorExportIDE.xml

@@ -18,7 +18,7 @@
       <Tool Name="postbuild" Command="" Options="" />
     </Toolchain>
   </Toolchains>
-  <Project Name="SCSI2SD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" Version="4.0" Type="Bootloadable">
+  <Project Name="SCSI2SD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" Version="4.0" Type="Bootloadable">
     <CMSIS_SVD_File>SCSI2SD.svd</CMSIS_SVD_File>
     <Datasheet />
     <LinkerFiles>
@@ -27,8 +27,8 @@
       <LinkerFile Toolchain="IAR EWARM">.\Generated_Source\PSoC5\Cm3Iar.icf</LinkerFile>
     </LinkerFiles>
     <Folders>
-      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\src">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\src">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="">..\..\src\main.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\diagnostic.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\disk.c</File>
@@ -41,6 +41,7 @@
           <File BuildType="BUILD" Toolchain="">..\..\src\sd.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\config.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\led.c</File>
+          <File BuildType="BUILD" Toolchain="">..\..\src\time.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\diagnostic.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\disk.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\geometry.h</File>
@@ -53,15 +54,16 @@
           <File BuildType="BUILD" Toolchain="">..\..\src\bits.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\sd.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\config.h</File>
+          <File BuildType="BUILD" Toolchain="">..\..\src\time.h</File>
         </Files>
       </Folder>
-      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="">.\device.h</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cyfitter_cfg.h</File>
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cyfitter_cfg.c</File>
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cydevice.h</File>
@@ -209,41 +211,41 @@
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\libelf.dll</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5\ARM_GCC">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5\ARM_GCC">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="ARM GCC">.\Generated_Source\PSoC5\ARM_GCC\CyComponentLibrary.a</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5\ARM_Keil_MDK">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5\ARM_Keil_MDK">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="ARM Keil MDK">.\Generated_Source\PSoC5\ARM_Keil_MDK\CyComponentLibrary.a</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5\IAR">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn\Generated_Source\PSoC5\IAR">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="IAR">.\Generated_Source\PSoC5\IAR\CyComponentLibrary.a</File>
         </Files>
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\codegentemp">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\ARM_GCC_441">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\ARM_GCC_473">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\DP8051_Keil_951">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\DP8051">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\CortexM0">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\CortexM3">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\SCSI2SD.cydsn" />
       </Folder>
     </Folders>
   </Project>

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cyprj

@@ -102,6 +102,13 @@
 <build_action v="C_FILE" />
 <PropertyDeltas />
 </CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="time.c" persistent="..\..\src\time.c">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="C_FILE" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
 </dependencies>
 </CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
 </CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
@@ -210,6 +217,13 @@
 <build_action v="NONE" />
 <PropertyDeltas />
 </CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="time.h" persistent="..\..\src\time.h">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="NONE" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
 </dependencies>
 </CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
 </CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>

lib/SCSI2SD/software/SCSI2SD/v3/USB_Bootloader.cydsn/Generated_Source/PSoCCreatorExportIDE.xml

@@ -18,7 +18,7 @@
       <Tool Name="postbuild" Command="" Options="" />
     </Toolchain>
   </Toolchains>
-  <Project Name="USB_Bootloader" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" Version="4.0" Type="Bootloader">
+  <Project Name="USB_Bootloader" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" Version="4.0" Type="Bootloader">
     <CMSIS_SVD_File>USB_Bootloader.svd</CMSIS_SVD_File>
     <Datasheet />
     <LinkerFiles>
@@ -27,13 +27,13 @@
       <LinkerFile Toolchain="IAR EWARM">.\Generated_Source\PSoC5\Cm3Iar.icf</LinkerFile>
     </LinkerFiles>
     <Folders>
-      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
+      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
           <File BuildType="BUILD" Toolchain="">.\main.c</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cyfitter_cfg.h</File>
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cyfitter_cfg.c</File>
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cymetadata.c</File>
@@ -111,41 +111,41 @@
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\libelf.dll</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5\ARM_GCC">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5\ARM_GCC">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
           <File BuildType="BUILD" Toolchain="ARM GCC">.\Generated_Source\PSoC5\ARM_GCC\CyComponentLibrary.a</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5\ARM_Keil_MDK">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5\ARM_Keil_MDK">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
           <File BuildType="BUILD" Toolchain="ARM Keil MDK">.\Generated_Source\PSoC5\ARM_Keil_MDK\CyComponentLibrary.a</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5\IAR">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5\IAR">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn">
           <File BuildType="BUILD" Toolchain="IAR">.\Generated_Source\PSoC5\IAR\CyComponentLibrary.a</File>
         </Files>
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\codegentemp">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\ARM_GCC_441">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\ARM_GCC_473">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\DP8051_Keil_951">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\DP8051">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\CortexM0">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\CortexM3">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn" />
       </Folder>
     </Folders>
   </Project>

lib/SCSI2SD/software/SCSI2SD/v3/USB_Bootloader.cydsn/USB_Bootloader.cyprj.Micha_000

@@ -1082,6 +1082,7 @@
 <name_val_pair name="Z:\projects\SCSI2SD\git-3.5\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.hex" v="&quot;-mthumb &quot;&quot;-march=armv7-m &quot;&quot;-mfix-cortex-m3-ldrd &quot;&quot;-T &quot;&quot;.\Generated_Source\PSoC5\cm3gcc.ld &quot;&quot;-g &quot;&quot;-Wl,-Map,${OutputDir}\${ProjectShortName}.map &quot;&quot;-specs=nano.specs &quot;&quot;-Wl,--gc-sections &quot;" />
 <name_val_pair name="Z:\projects\SCSI2SD\git\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.hex" v="&quot;-mthumb &quot;&quot;-march=armv7-m &quot;&quot;-mfix-cortex-m3-ldrd &quot;&quot;-T &quot;&quot;.\Generated_Source\PSoC5\cm3gcc.ld &quot;&quot;-g &quot;&quot;-Wl,-Map,${OutputDir}\${ProjectShortName}.map &quot;&quot;-specs=nano.specs &quot;&quot;-Wl,--gc-sections &quot;" />
 <name_val_pair name="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.hex" v="&quot;-mthumb &quot;&quot;-march=armv7-m &quot;&quot;-mfix-cortex-m3-ldrd &quot;&quot;-T &quot;&quot;.\Generated_Source\PSoC5\cm3gcc.ld &quot;&quot;-g &quot;&quot;-Wl,-Map,${OutputDir}\${ProjectShortName}.map &quot;&quot;-specs=nano.specs &quot;&quot;-Wl,--gc-sections &quot;" />
+<name_val_pair name="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.hex" v="&quot;-mthumb &quot;&quot;-march=armv7-m &quot;&quot;-mfix-cortex-m3-ldrd &quot;&quot;-T &quot;&quot;.\Generated_Source\PSoC5\cm3gcc.ld &quot;&quot;-g &quot;&quot;-Wl,-Map,${OutputDir}\${ProjectShortName}.map &quot;&quot;-specs=nano.specs &quot;&quot;-Wl,--gc-sections &quot;" />
 </name>
 <name v="c9323d49-d323-40b8-9b59-cc008d68a989@Debug@CortexM3">
 <name_val_pair name=".\main.c" v="&quot;-I. &quot;&quot;-I./Generated_Source/PSoC5 &quot;&quot;-Wno-main &quot;&quot;-mcpu=cortex-m3 &quot;&quot;-mthumb &quot;&quot;-Wall &quot;&quot;-g &quot;&quot;-D &quot;&quot;DEBUG &quot;&quot;-Wa,-alh=${OutputDir}\${CompileFile}.lst &quot;&quot;-ffunction-sections &quot;" />
@@ -1115,7 +1116,7 @@
 <name_val_pair name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Debug\USB_Bootloader.hex" v="&quot;-mthumb &quot;&quot;-march=armv7-m &quot;&quot;-mfix-cortex-m3-ldrd &quot;&quot;-T &quot;&quot;.\Generated_Source\PSoC5\cm3gcc.ld &quot;&quot;-g &quot;&quot;-Wl,-Map,${OutputDir}\${ProjectShortName}.map &quot;&quot;-specs=nano.specs &quot;&quot;-Wl,--gc-sections &quot;" />
 </name>
 </genericCmdLineData>
-<codeGenCmdLineTag v="&quot;-.appdatapath&quot; &quot;C:\Users\Micha_000\AppData\Local\Cypress Semiconductor\PSoC Creator\3.0&quot; &quot;-.fdsnotice&quot; &quot;-.fdswarpdepfile=warp_dependencies.txt&quot; &quot;-.fdselabdepfile=elab_dependencies.txt&quot; &quot;-.fdsbldfile=generated_files.txt&quot; &quot;-p&quot; &quot;Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj&quot; &quot;-d&quot; &quot;CY8C5267AXI-LP051&quot; &quot;-s&quot; &quot;Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5&quot; &quot;--&quot; &quot;-yv2&quot; &quot;-v3&quot; &quot;-ygs&quot; &quot;-q10&quot; &quot;-o2&quot; &quot;-.fftcfgtype=LE&quot; " />
+<codeGenCmdLineTag v="&quot;-.appdatapath&quot; &quot;C:\Users\Micha_000\AppData\Local\Cypress Semiconductor\PSoC Creator\3.0&quot; &quot;-.fdsnotice&quot; &quot;-.fdswarpdepfile=warp_dependencies.txt&quot; &quot;-.fdselabdepfile=elab_dependencies.txt&quot; &quot;-.fdsbldfile=generated_files.txt&quot; &quot;-p&quot; &quot;Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj&quot; &quot;-d&quot; &quot;CY8C5267AXI-LP051&quot; &quot;-s&quot; &quot;Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5&quot; &quot;--&quot; &quot;-yv2&quot; &quot;-v3&quot; &quot;-ygs&quot; &quot;-q10&quot; &quot;-o2&quot; &quot;-.fftcfgtype=LE&quot; " />
 </CyGuid_b0374e30-ce3a-47f2-ad85-821643292c68>
 </dataGuid>
 <dataGuid v="597c5b74-0c46-4204-8b7f-96f3570671dc">
@@ -1668,14 +1669,14 @@
 <v>C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif</v>
 <v>C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif</v>
 </warp_dep>
-<deps_time v="130537023991022657" />
+<deps_time v="130571566842994698" />
 <top_block v="TopDesign" />
 <last_generation v="0" />
 </CyGuid_925cc1e1-309e-4e08-b0a1-09a83c35b157>
 </dataGuid>
 <dataGuid v="769d31ea-68b1-4f0c-b90a-7c10a43ee563">
 <CyGuid_769d31ea-68b1-4f0c-b90a-7c10a43ee563 type_name="CyDesigner.Common.ProjMgmt.Model.CyLinkCustomData" version="1">
-<deps_time v="130537025103831962" />
+<deps_time v="130571567839248780" />
 </CyGuid_769d31ea-68b1-4f0c-b90a-7c10a43ee563>
 </dataGuid>
 <dataGuid v="bf610382-39c6-441f-80b8-b04622ea7845">

lib/SCSI2SD/software/SCSI2SD/v3/USB_Bootloader.cydsn/USB_Bootloader.rpt

@@ -1,2695 +0,0 @@
-Loading plugins phase: Elapsed time ==> 0s.529ms
-Initializing data phase: Elapsed time ==> 4s.249ms
-<CYPRESSTAG name="CyDsfit arguments...">
-cydsfit arguments: -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -p Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 -s Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\Generated_Source\PSoC5 -- -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE</CYPRESSTAG>
-<CYPRESSTAG name="Design elaboration results...">
-</CYPRESSTAG>
-Elaboration phase: Elapsed time ==> 8s.312ms
-<CYPRESSTAG name="HDL generation results...">
-</CYPRESSTAG>
-HDL generation phase: Elapsed time ==> 1s.015ms
-<CYPRESSTAG name="Synthesis results...">
-
-     | | | | | | |
-   _________________
-  -|               |-
-  -|               |-
-  -|               |-
-  -|    CYPRESS    |-
-  -|               |-
-  -|               |-   Warp Verilog Synthesis Compiler: Version 6.3 IR 41
-  -|               |-   Copyright (C) 1991-2001 Cypress Semiconductor
-   |_______________|
-     | | | | | | |
-
-======================================================================
-Compiling:  USB_Bootloader.v
-Program  :   C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
-======================================================================
-
-======================================================================
-Compiling:  USB_Bootloader.v
-Program  :   C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
-======================================================================
-
-======================================================================
-Compiling:  USB_Bootloader.v
-Program  :   vlogfe
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
-======================================================================
-
-vlogfe V6.3 IR 41:  Verilog parser
-Thu Aug 28 22:24:58 2014
-
-
-======================================================================
-Compiling:  USB_Bootloader.v
-Program  :   vpp
-Options  :    -yv2 -q10 USB_Bootloader.v
-======================================================================
-
-vpp V6.3 IR 41:  Verilog Pre-Processor
-Thu Aug 28 22:24:59 2014
-
-
-vpp:  No errors.
-
-Library 'work' => directory 'lcpsoc3'
-General_symbol_table
-General_symbol_table
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\work\cypress.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
-Using control file 'USB_Bootloader.ctl'.
-
-vlogfe:  No errors.
-
-
-======================================================================
-Compiling:  USB_Bootloader.v
-Program  :   tovif
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
-======================================================================
-
-tovif V6.3 IR 41:  High-level synthesis
-Thu Aug 28 22:25:00 2014
-
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\work\cypress.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
-Linking 'Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
-Linking 'Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
-
-tovif:  No errors.
-
-
-======================================================================
-Compiling:  USB_Bootloader.v
-Program  :   topld
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
-======================================================================
-
-topld V6.3 IR 41:  Synthesis and optimization
-Thu Aug 28 22:25:02 2014
-
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\work\cypress.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
-Linking 'Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
-Linking 'Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\lcpsoc3\stdlogic\cpsoc3.vif'.
-
-----------------------------------------------------------
-Detecting unused logic.
-----------------------------------------------------------
-
-
-
-------------------------------------------------------
-Alias Detection
-------------------------------------------------------
-Aliasing one to \USBFS:tmpOE__Dm_net_0\
-Aliasing \USBFS:tmpOE__Dp_net_0\ to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_7 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_6 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_5 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_4 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_3 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_2 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_1 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_DBx_net_0 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_9 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_8 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_7 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_6 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_5 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_4 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_3 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_2 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_1 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SCSI_Out_net_0 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SD_PULLUP_net_4 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SD_PULLUP_net_3 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SD_PULLUP_net_2 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SD_PULLUP_net_1 to \USBFS:tmpOE__Dm_net_0\
-Aliasing tmpOE__SD_PULLUP_net_0 to \USBFS:tmpOE__Dm_net_0\
-Removing Rhs of wire one[37] = \USBFS:tmpOE__Dm_net_0\[32]
-Removing Lhs of wire \USBFS:tmpOE__Dp_net_0\[40] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_7[49] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_6[50] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_5[51] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_4[52] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_3[53] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_2[54] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_1[55] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_0[56] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_9[84] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_8[85] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_7[86] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_6[87] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_5[88] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_4[89] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_3[90] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_2[91] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_1[92] = one[37]
-Removing Lhs of wire tmpOE__SCSI_Out_net_0[93] = one[37]
-Removing Lhs of wire tmpOE__SD_PULLUP_net_4[127] = one[37]
-Removing Lhs of wire tmpOE__SD_PULLUP_net_3[128] = one[37]
-Removing Lhs of wire tmpOE__SD_PULLUP_net_2[129] = one[37]
-Removing Lhs of wire tmpOE__SD_PULLUP_net_1[130] = one[37]
-Removing Lhs of wire tmpOE__SD_PULLUP_net_0[131] = one[37]
-
-------------------------------------------------------
-Aliased 0 equations, 25 wires.
-------------------------------------------------------
-
-----------------------------------------------------------
-Circuit simplification
-----------------------------------------------------------
-
-Substituting virtuals - pass 1:
-
-
-----------------------------------------------------------
-Circuit simplification results:
-
-	Expanded 0 signals.
-	Turned 0 signals into soft nodes.
-	Maximum default expansion cost was set at 3.
-----------------------------------------------------------
-
-topld:  No errors.
-
-CYPRESS_DIR    : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp
-Warp Program   : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe
-Warp Arguments : -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
-</CYPRESSTAG>
-Warp synthesis phase: Elapsed time ==> 10s.236ms
-<CYPRESSTAG name="Fitter results...">
-<CYPRESSTAG name="Fitter startup details...">
-cyp3fit: V3.0.0.1539, Family: PSoC3, Started at: Thursday, 28 August 2014 22:25:08
-Options: -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v3\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 USB_Bootloader.v -verilog
-</CYPRESSTAG>
-<CYPRESSTAG name="Design parsing">
-Design parsing phase: Elapsed time ==> 0s.344ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Tech mapping">
-<CYPRESSTAG name="Initial Mapping" icon="FILE_RPT_TECHM">
-Assigning clock USBFS_Clock_vbus to clock BUS_CLK because it is a pass-through
-<CYPRESSTAG name="Global Clock Selection" icon="FILE_RPT_TECHM">
-</CYPRESSTAG>
-<CYPRESSTAG name="UDB Clock/Enable Remapping Results">
-</CYPRESSTAG>
-<CYPRESSTAG name="Duplicate Macrocell detection">
-</CYPRESSTAG>
-</CYPRESSTAG>
-<CYPRESSTAG name="Duplicate Macrocell detection">
-</CYPRESSTAG>
-<CYPRESSTAG name="Design Equations" icon="FILE_RPT_EQUATION">
-
-------------------------------------------------------------
-Design Equations
-------------------------------------------------------------
-    <CYPRESSTAG name="Pin listing">
-
-    ------------------------------------------------------------
-    Pin listing
-    ------------------------------------------------------------
-
-    Pin : Name = SCSI_Out(0)
-        Attributes:
-            Alias: DBP_raw
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(0)__PA ,
-            pad => SCSI_Out(0)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(1)
-        Attributes:
-            Alias: ATN
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(1)__PA ,
-            pad => SCSI_Out(1)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(2)
-        Attributes:
-            Alias: BSY
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(2)__PA ,
-            pad => SCSI_Out(2)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(3)
-        Attributes:
-            Alias: ACK
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(3)__PA ,
-            pad => SCSI_Out(3)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(4)
-        Attributes:
-            Alias: RST
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(4)__PA ,
-            pad => SCSI_Out(4)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(5)
-        Attributes:
-            Alias: MSG
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(5)__PA ,
-            pad => SCSI_Out(5)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(6)
-        Attributes:
-            Alias: SEL
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(6)__PA ,
-            pad => SCSI_Out(6)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(7)
-        Attributes:
-            Alias: CD
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(7)__PA ,
-            pad => SCSI_Out(7)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(8)
-        Attributes:
-            Alias: REQ
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(8)__PA ,
-            pad => SCSI_Out(8)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out(9)
-        Attributes:
-            Alias: IO_raw
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out(9)__PA ,
-            pad => SCSI_Out(9)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(0)
-        Attributes:
-            Alias: DB0
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(0)__PA ,
-            pad => SCSI_Out_DBx(0)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(1)
-        Attributes:
-            Alias: DB1
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(1)__PA ,
-            pad => SCSI_Out_DBx(1)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(2)
-        Attributes:
-            Alias: DB2
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(2)__PA ,
-            pad => SCSI_Out_DBx(2)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(3)
-        Attributes:
-            Alias: DB3
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(3)__PA ,
-            pad => SCSI_Out_DBx(3)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(4)
-        Attributes:
-            Alias: DB4
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(4)__PA ,
-            pad => SCSI_Out_DBx(4)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(5)
-        Attributes:
-            Alias: DB5
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(5)__PA ,
-            pad => SCSI_Out_DBx(5)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(6)
-        Attributes:
-            Alias: DB6
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(6)__PA ,
-            pad => SCSI_Out_DBx(6)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SCSI_Out_DBx(7)
-        Attributes:
-            Alias: DB7
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: NOSYNC
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: CMOS_OUT
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 0
-            IO Voltage: 5
-        PORT MAP (
-            pa_out => SCSI_Out_DBx(7)__PA ,
-            pad => SCSI_Out_DBx(7)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SD_PULLUP(0)
-        Attributes:
-            In Group/Port: True
-            In Sync Option: SYNC
-            Out Sync Option: AUTO
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: RES_PULL_UP
-            VTrip: CMOS
-            Slew: FAST
-            Input Sync needed: True
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: False
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 1
-            IO Voltage: 3.3
-        PORT MAP (
-            pa_out => SD_PULLUP(0)__PA ,
-            pad => SD_PULLUP(0)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SD_PULLUP(1)
-        Attributes:
-            In Group/Port: True
-            In Sync Option: SYNC
-            Out Sync Option: AUTO
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: RES_PULL_UP
-            VTrip: CMOS
-            Slew: FAST
-            Input Sync needed: True
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: False
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 1
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SD_PULLUP(1)__PA ,
-            pad => SD_PULLUP(1)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SD_PULLUP(2)
-        Attributes:
-            In Group/Port: True
-            In Sync Option: SYNC
-            Out Sync Option: AUTO
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: RES_PULL_UP
-            VTrip: CMOS
-            Slew: FAST
-            Input Sync needed: True
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: False
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 1
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SD_PULLUP(2)__PA ,
-            pad => SD_PULLUP(2)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SD_PULLUP(3)
-        Attributes:
-            In Group/Port: True
-            In Sync Option: SYNC
-            Out Sync Option: AUTO
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: RES_PULL_UP
-            VTrip: CMOS
-            Slew: FAST
-            Input Sync needed: True
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: False
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 1
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SD_PULLUP(3)__PA ,
-            pad => SD_PULLUP(3)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = SD_PULLUP(4)
-        Attributes:
-            In Group/Port: True
-            In Sync Option: SYNC
-            Out Sync Option: AUTO
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: RES_PULL_UP
-            VTrip: CMOS
-            Slew: FAST
-            Input Sync needed: True
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: False
-            Is OE Registered: False
-            Uses Analog: False
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: DIGITAL
-            Initial Value: 1
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => SD_PULLUP(4)__PA ,
-            pad => SD_PULLUP(4)_PAD );
-        Properties:
-        {
-        }
-
-    Pin : Name = \USBFS:Dm(0)\
-        Attributes:
-            In Group/Port: True
-            In Sync Option: AUTO
-            Out Sync Option: AUTO
-            Interrupt generated: False
-            Interrupt mode: NONE
-            Drive mode: HI_Z_ANALOG
-            VTrip: EITHER
-            Slew: FAST
-            Input Sync needed: False
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: True
-            Is OE Registered: False
-            Uses Analog: True
-            Can contain Digital: False
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: USB_D_MINUS
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => \USBFS:Dm(0)\__PA ,
-            analog_term => \USBFS:Net_597\ ,
-            pad => \USBFS:Dm(0)_PAD\ );
-        Properties:
-        {
-        }
-
-    Pin : Name = \USBFS:Dp(0)\
-        Attributes:
-            In Group/Port: True
-            In Sync Option: SYNC
-            Out Sync Option: AUTO
-            Interrupt generated: True
-            Interrupt mode: FALLING
-            Drive mode: HI_Z_ANALOG
-            VTrip: CMOS
-            Slew: FAST
-            Input Sync needed: True
-            Output Sync needed: False
-            SC shield enabled: False
-            POR State: ANY
-            LCD Mode: COMMON
-            Register Mode: RegComb
-            CaSense Mode: NEITHER
-            Treat as pin: False
-            Is OE Registered: False
-            Uses Analog: True
-            Can contain Digital: True
-            Is SIO: False
-            SIO Output Buf: NONREGULATED
-            SIO Input Buf: SINGLE_ENDED
-            SIO HiFreq: LOW
-            SIO Hyst: DISABLED
-            SIO Vtrip: MULTIPLIER_0_5
-            SIO RefSel: VCC_IO
-            Required Capabilitites: USB_D_PLUS
-            Initial Value: 0
-            IO Voltage: 0
-        PORT MAP (
-            pa_out => \USBFS:Dp(0)\__PA ,
-            analog_term => \USBFS:Net_1000\ ,
-            pad => \USBFS:Dp(0)_PAD\ );
-        Properties:
-        {
-        }
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Macrocell listing" icon="FILE_RPT_EQUATION">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Datapath listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Status register listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="StatusI register listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Sync listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Control register listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Count7 listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="DRQ listing">
-    </CYPRESSTAG>
-    <CYPRESSTAG name="Interrupt listing">
-
-    ------------------------------------------------------------
-    Interrupt listing
-    ------------------------------------------------------------
-
-    interrupt: Name =\USBFS:arb_int\
-        PORT MAP (
-            interrupt => \USBFS:Net_79\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-
-    interrupt: Name =\USBFS:bus_reset\
-        PORT MAP (
-            interrupt => \USBFS:Net_81\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-
-    interrupt: Name =\USBFS:dp_int\
-        PORT MAP (
-            interrupt => \USBFS:Net_1010\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-
-    interrupt: Name =\USBFS:ep_0\
-        PORT MAP (
-            interrupt => \USBFS:ept_int_0\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-
-    interrupt: Name =\USBFS:ep_1\
-        PORT MAP (
-            interrupt => \USBFS:ept_int_1\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-
-    interrupt: Name =\USBFS:ep_2\
-        PORT MAP (
-            interrupt => \USBFS:ept_int_2\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-
-    interrupt: Name =\USBFS:sof_int\
-        PORT MAP (
-            interrupt => Net_40 );
-        Properties:
-        {
-            int_type = "10"
-        }
-    </CYPRESSTAG>
-</CYPRESSTAG>
-<CYPRESSTAG name="Technology mapping summary" expanded>
-
-------------------------------------------------------------
-Technology mapping summary
-------------------------------------------------------------
-
-Resource Type                 : Used : Free :  Max :  % Used
-============================================================
-Digital clock dividers        :    0 :    8 :    8 :   0.00%
-Analog clock dividers         :    0 :    4 :    4 :   0.00%
-Pins                          :   28 :   44 :   72 :  38.89%
-UDB Macrocells                :    0 :  192 :  192 :   0.00%
-UDB Unique Pterms             :    0 :  384 :  384 :   0.00%
-UDB Datapath Cells            :    0 :   24 :   24 :   0.00%
-UDB Status Cells              :    0 :   24 :   24 :   0.00%
-UDB Control Cells             :    0 :   24 :   24 :   0.00%
-DMA Channels                  :    0 :   24 :   24 :   0.00%
-Interrupts                    :    7 :   25 :   32 :  21.88%
-VIDAC Fixed Blocks            :    0 :    1 :    1 :   0.00%
-Comparator Fixed Blocks       :    0 :    2 :    2 :   0.00%
-CapSense Buffers              :    0 :    2 :    2 :   0.00%
-I2C Fixed Blocks              :    0 :    1 :    1 :   0.00%
-Timer Fixed Blocks            :    0 :    4 :    4 :   0.00%
-USB Fixed Blocks              :    1 :    0 :    1 : 100.00%
-LCD Fixed Blocks              :    0 :    1 :    1 :   0.00%
-EMIF Fixed Blocks             :    0 :    1 :    1 :   0.00%
-LPF Fixed Blocks              :    0 :    2 :    2 :   0.00%
-SAR Fixed Blocks              :    0 :    1 :    1 :   0.00%
-</CYPRESSTAG>
-Technology Mapping: Elapsed time ==> 0s.406ms
-Tech mapping phase: Elapsed time ==> 0s.702ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Analog Placement">
-Initial Analog Placement Results:
-IO_3@[IOP=(4)][IoId=(3)] : SCSI_Out(0) (fixed)
-IO_2@[IOP=(4)][IoId=(2)] : SCSI_Out(1) (fixed)
-IO_7@[IOP=(0)][IoId=(7)] : SCSI_Out(2) (fixed)
-IO_6@[IOP=(0)][IoId=(6)] : SCSI_Out(3) (fixed)
-IO_5@[IOP=(0)][IoId=(5)] : SCSI_Out(4) (fixed)
-IO_4@[IOP=(0)][IoId=(4)] : SCSI_Out(5) (fixed)
-IO_3@[IOP=(0)][IoId=(3)] : SCSI_Out(6) (fixed)
-IO_2@[IOP=(0)][IoId=(2)] : SCSI_Out(7) (fixed)
-IO_1@[IOP=(0)][IoId=(1)] : SCSI_Out(8) (fixed)
-IO_0@[IOP=(0)][IoId=(0)] : SCSI_Out(9) (fixed)
-IO_3@[IOP=(6)][IoId=(3)] : SCSI_Out_DBx(0) (fixed)
-IO_2@[IOP=(6)][IoId=(2)] : SCSI_Out_DBx(1) (fixed)
-IO_1@[IOP=(6)][IoId=(1)] : SCSI_Out_DBx(2) (fixed)
-IO_0@[IOP=(6)][IoId=(0)] : SCSI_Out_DBx(3) (fixed)
-IO_7@[IOP=(4)][IoId=(7)] : SCSI_Out_DBx(4) (fixed)
-IO_6@[IOP=(4)][IoId=(6)] : SCSI_Out_DBx(5) (fixed)
-IO_5@[IOP=(4)][IoId=(5)] : SCSI_Out_DBx(6) (fixed)
-IO_4@[IOP=(4)][IoId=(4)] : SCSI_Out_DBx(7) (fixed)
-IO_1@[IOP=(3)][IoId=(1)] : SD_PULLUP(0) (fixed)
-IO_2@[IOP=(3)][IoId=(2)] : SD_PULLUP(1) (fixed)
-IO_3@[IOP=(3)][IoId=(3)] : SD_PULLUP(2) (fixed)
-IO_4@[IOP=(3)][IoId=(4)] : SD_PULLUP(3) (fixed)
-IO_5@[IOP=(3)][IoId=(5)] : SD_PULLUP(4) (fixed)
-IO_7@[IOP=(15)][IoId=(7)] : \USBFS:Dm(0)\ (fixed)
-IO_6@[IOP=(15)][IoId=(6)] : \USBFS:Dp(0)\ (fixed)
-USB[0]@[FFB(USB,0)] : \USBFS:USB\
-Analog Placement phase: Elapsed time ==> 0s.109ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Analog Routing">
-Analog Routing phase: Elapsed time ==> 0s.000ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Analog Code Generation">
-============ Analog Final Answer Routes ============
-Dump of CyAnalogRoutingResultsDB
-Map of net to items {
-}
-Map of item to net {
-}
-Mux Info {
-}
-Dump of CyP35AnalogRoutingResultsDB
-IsVddaHalfUsedForComp = False
-IsVddaHalfUsedForSar0 = False
-IsVddaHalfUsedForSar1 = False
-Analog Code Generation phase: Elapsed time ==> 1s.453ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Digital Placement">
-<CYPRESSTAG name="Detailed placement messages">
-I2659: No Constrained paths were found. The placer will run in non-timing driven mode.
-I2076: Total run-time: 4.1 sec.
-
-</CYPRESSTAG>
-<CYPRESSTAG name="PLD Packing">
-<CYPRESSTAG name="PLD Packing Summary">
-No PLDs were packed.
-</CYPRESSTAG>
-PLD Packing: Elapsed time ==> 0s.000ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Partitioning">
-<CYPRESSTAG name="Initial Partitioning Summary">
-Initial Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>
-<CYPRESSTAG name="Final Partitioning Summary">
-Final Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>
-Partitioning: Elapsed time ==> 0s.063ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Simulated Annealing">
-Annealing: Elapsed time ==> 0s.014ms
-<CYPRESSTAG name="Simulated Annealing Results">
-The seed used for moves was 114161200.
-Inital cost was 120, final cost is 120 (0.00% improvement).</CYPRESSTAG>
-</CYPRESSTAG>
-<CYPRESSTAG name="Final Placement Summary">
-
-------------------------------------------------------------
-Final Placement Summary
-------------------------------------------------------------
-
-       Resource Type :      Count : Avg Inputs : Avg Outputs
-    ========================================================
-                 UDB :          0 :       0.00 :       0.00
-<CYPRESSTAG name="Final Placement Details">
-<CYPRESSTAG name="Component Details">
-
-------------------------------------------------------------
-Component Placement Details
-------------------------------------------------------------
-UDB [UDB=(0,0)] is empty.
-UDB [UDB=(0,1)] is empty.
-UDB [UDB=(0,2)] is empty.
-UDB [UDB=(0,3)] is empty.
-UDB [UDB=(0,4)] is empty.
-UDB [UDB=(0,5)] is empty.
-UDB [UDB=(1,0)] is empty.
-UDB [UDB=(1,1)] is empty.
-UDB [UDB=(1,2)] is empty.
-UDB [UDB=(1,3)] is empty.
-UDB [UDB=(1,4)] is empty.
-UDB [UDB=(1,5)] is empty.
-UDB [UDB=(2,0)] is empty.
-UDB [UDB=(2,1)] is empty.
-UDB [UDB=(2,2)] is empty.
-UDB [UDB=(2,3)] is empty.
-UDB [UDB=(2,4)] is empty.
-UDB [UDB=(2,5)] is empty.
-UDB [UDB=(3,0)] is empty.
-UDB [UDB=(3,1)] is empty.
-UDB [UDB=(3,2)] is empty.
-UDB [UDB=(3,3)] is empty.
-UDB [UDB=(3,4)] is empty.
-UDB [UDB=(3,5)] is empty.
-Intr hod @ [IntrHod=(0)]: 
-  Intr@ [IntrHod=(0)][IntrId=(0)] 
-    interrupt: Name =\USBFS:ep_1\
-        PORT MAP (
-            interrupt => \USBFS:ept_int_1\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-  Intr@ [IntrHod=(0)][IntrId=(1)] 
-    interrupt: Name =\USBFS:ep_2\
-        PORT MAP (
-            interrupt => \USBFS:ept_int_2\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-  Intr@ [IntrHod=(0)][IntrId=(12)] 
-    interrupt: Name =\USBFS:dp_int\
-        PORT MAP (
-            interrupt => \USBFS:Net_1010\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-  Intr@ [IntrHod=(0)][IntrId=(21)] 
-    interrupt: Name =\USBFS:sof_int\
-        PORT MAP (
-            interrupt => Net_40 );
-        Properties:
-        {
-            int_type = "10"
-        }
-  Intr@ [IntrHod=(0)][IntrId=(22)] 
-    interrupt: Name =\USBFS:arb_int\
-        PORT MAP (
-            interrupt => \USBFS:Net_79\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-  Intr@ [IntrHod=(0)][IntrId=(23)] 
-    interrupt: Name =\USBFS:bus_reset\
-        PORT MAP (
-            interrupt => \USBFS:Net_81\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-  Intr@ [IntrHod=(0)][IntrId=(24)] 
-    interrupt: Name =\USBFS:ep_0\
-        PORT MAP (
-            interrupt => \USBFS:ept_int_0\ );
-        Properties:
-        {
-            int_type = "10"
-        }
-Drq hod @ [DrqHod=(0)]: empty
-Port 0 contains the following IO cells:
-[IoId=0]: 
-Pin : Name = SCSI_Out(9)
-    Attributes:
-        Alias: IO_raw
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(9)__PA ,
-        pad => SCSI_Out(9)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=1]: 
-Pin : Name = SCSI_Out(8)
-    Attributes:
-        Alias: REQ
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(8)__PA ,
-        pad => SCSI_Out(8)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=2]: 
-Pin : Name = SCSI_Out(7)
-    Attributes:
-        Alias: CD
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(7)__PA ,
-        pad => SCSI_Out(7)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=3]: 
-Pin : Name = SCSI_Out(6)
-    Attributes:
-        Alias: SEL
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(6)__PA ,
-        pad => SCSI_Out(6)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=4]: 
-Pin : Name = SCSI_Out(5)
-    Attributes:
-        Alias: MSG
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(5)__PA ,
-        pad => SCSI_Out(5)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=5]: 
-Pin : Name = SCSI_Out(4)
-    Attributes:
-        Alias: RST
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(4)__PA ,
-        pad => SCSI_Out(4)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=6]: 
-Pin : Name = SCSI_Out(3)
-    Attributes:
-        Alias: ACK
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(3)__PA ,
-        pad => SCSI_Out(3)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=7]: 
-Pin : Name = SCSI_Out(2)
-    Attributes:
-        Alias: BSY
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(2)__PA ,
-        pad => SCSI_Out(2)_PAD );
-    Properties:
-    {
-    }
-
-Port 1 is empty
-Port 2 is empty
-Port 3 contains the following IO cells:
-[IoId=1]: 
-Pin : Name = SD_PULLUP(0)
-    Attributes:
-        In Group/Port: True
-        In Sync Option: SYNC
-        Out Sync Option: AUTO
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: RES_PULL_UP
-        VTrip: CMOS
-        Slew: FAST
-        Input Sync needed: True
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: False
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 1
-        IO Voltage: 3.3
-    PORT MAP (
-        pa_out => SD_PULLUP(0)__PA ,
-        pad => SD_PULLUP(0)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=2]: 
-Pin : Name = SD_PULLUP(1)
-    Attributes:
-        In Group/Port: True
-        In Sync Option: SYNC
-        Out Sync Option: AUTO
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: RES_PULL_UP
-        VTrip: CMOS
-        Slew: FAST
-        Input Sync needed: True
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: False
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 1
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SD_PULLUP(1)__PA ,
-        pad => SD_PULLUP(1)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=3]: 
-Pin : Name = SD_PULLUP(2)
-    Attributes:
-        In Group/Port: True
-        In Sync Option: SYNC
-        Out Sync Option: AUTO
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: RES_PULL_UP
-        VTrip: CMOS
-        Slew: FAST
-        Input Sync needed: True
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: False
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 1
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SD_PULLUP(2)__PA ,
-        pad => SD_PULLUP(2)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=4]: 
-Pin : Name = SD_PULLUP(3)
-    Attributes:
-        In Group/Port: True
-        In Sync Option: SYNC
-        Out Sync Option: AUTO
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: RES_PULL_UP
-        VTrip: CMOS
-        Slew: FAST
-        Input Sync needed: True
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: False
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 1
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SD_PULLUP(3)__PA ,
-        pad => SD_PULLUP(3)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=5]: 
-Pin : Name = SD_PULLUP(4)
-    Attributes:
-        In Group/Port: True
-        In Sync Option: SYNC
-        Out Sync Option: AUTO
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: RES_PULL_UP
-        VTrip: CMOS
-        Slew: FAST
-        Input Sync needed: True
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: False
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 1
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SD_PULLUP(4)__PA ,
-        pad => SD_PULLUP(4)_PAD );
-    Properties:
-    {
-    }
-
-Port 4 contains the following IO cells:
-[IoId=2]: 
-Pin : Name = SCSI_Out(1)
-    Attributes:
-        Alias: ATN
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(1)__PA ,
-        pad => SCSI_Out(1)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=3]: 
-Pin : Name = SCSI_Out(0)
-    Attributes:
-        Alias: DBP_raw
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out(0)__PA ,
-        pad => SCSI_Out(0)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=4]: 
-Pin : Name = SCSI_Out_DBx(7)
-    Attributes:
-        Alias: DB7
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 5
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(7)__PA ,
-        pad => SCSI_Out_DBx(7)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=5]: 
-Pin : Name = SCSI_Out_DBx(6)
-    Attributes:
-        Alias: DB6
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(6)__PA ,
-        pad => SCSI_Out_DBx(6)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=6]: 
-Pin : Name = SCSI_Out_DBx(5)
-    Attributes:
-        Alias: DB5
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(5)__PA ,
-        pad => SCSI_Out_DBx(5)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=7]: 
-Pin : Name = SCSI_Out_DBx(4)
-    Attributes:
-        Alias: DB4
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(4)__PA ,
-        pad => SCSI_Out_DBx(4)_PAD );
-    Properties:
-    {
-    }
-
-Port 5 is empty
-Port 6 contains the following IO cells:
-[IoId=0]: 
-Pin : Name = SCSI_Out_DBx(3)
-    Attributes:
-        Alias: DB3
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(3)__PA ,
-        pad => SCSI_Out_DBx(3)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=1]: 
-Pin : Name = SCSI_Out_DBx(2)
-    Attributes:
-        Alias: DB2
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(2)__PA ,
-        pad => SCSI_Out_DBx(2)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=2]: 
-Pin : Name = SCSI_Out_DBx(1)
-    Attributes:
-        Alias: DB1
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(1)__PA ,
-        pad => SCSI_Out_DBx(1)_PAD );
-    Properties:
-    {
-    }
-
-[IoId=3]: 
-Pin : Name = SCSI_Out_DBx(0)
-    Attributes:
-        Alias: DB0
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: NOSYNC
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: CMOS_OUT
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: False
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: DIGITAL
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => SCSI_Out_DBx(0)__PA ,
-        pad => SCSI_Out_DBx(0)_PAD );
-    Properties:
-    {
-    }
-
-Port 12 is empty
-Port 15 generates interrupt for logical port:
-    logicalport: Name =\USBFS:Dp\
-        PORT MAP (
-            in_clock_en => one ,
-            in_reset => zero ,
-            out_clock_en => one ,
-            out_reset => zero ,
-            interrupt => \USBFS:Net_1010\ ,
-            in_clock => ClockBlock_BUS_CLK );
-        Properties:
-        {
-            drive_mode = "000"
-            ibuf_enabled = "0"
-            id = "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42"
-            init_dr_st = "0"
-            input_clk_en = 0
-            input_sync = "1"
-            input_sync_mode = "0"
-            intr_mode = "10"
-            invert_in_clock = 0
-            invert_in_clock_en = 0
-            invert_in_reset = 0
-            invert_out_clock = 0
-            invert_out_clock_en = 0
-            invert_out_reset = 0
-            io_voltage = ""
-            layout_mode = "CONTIGUOUS"
-            oe_conn = "0"
-            oe_reset = 0
-            oe_sync = "0"
-            output_clk_en = 0
-            output_clock_mode = "0"
-            output_conn = "0"
-            output_mode = "0"
-            output_reset = 0
-            output_sync = "0"
-            pa_in_clock = -1
-            pa_in_clock_en = -1
-            pa_in_reset = -1
-            pa_out_clock = -1
-            pa_out_clock_en = -1
-            pa_out_reset = -1
-            pin_aliases = ""
-            pin_mode = "I"
-            por_state = 4
-            port_alias_group = ""
-            port_alias_required = 0
-            sio_group_cnt = 0
-            sio_hifreq = ""
-            sio_hyst = "0"
-            sio_ibuf = "00000000"
-            sio_info = "00"
-            sio_obuf = "00000000"
-            sio_refsel = "00000000"
-            sio_vtrip = "00000000"
-            slew_rate = "0"
-            spanning = 0
-            sw_only = 0
-            use_annotation = "0"
-            vtrip = "00"
-            width = 1
-        }
-    and contains the following IO cells:
-[IoId=6]: 
-Pin : Name = \USBFS:Dp(0)\
-    Attributes:
-        In Group/Port: True
-        In Sync Option: SYNC
-        Out Sync Option: AUTO
-        Interrupt generated: True
-        Interrupt mode: FALLING
-        Drive mode: HI_Z_ANALOG
-        VTrip: CMOS
-        Slew: FAST
-        Input Sync needed: True
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: False
-        Is OE Registered: False
-        Uses Analog: True
-        Can contain Digital: True
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: USB_D_PLUS
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => \USBFS:Dp(0)\__PA ,
-        analog_term => \USBFS:Net_1000\ ,
-        pad => \USBFS:Dp(0)_PAD\ );
-    Properties:
-    {
-    }
-
-[IoId=7]: 
-Pin : Name = \USBFS:Dm(0)\
-    Attributes:
-        In Group/Port: True
-        In Sync Option: AUTO
-        Out Sync Option: AUTO
-        Interrupt generated: False
-        Interrupt mode: NONE
-        Drive mode: HI_Z_ANALOG
-        VTrip: EITHER
-        Slew: FAST
-        Input Sync needed: False
-        Output Sync needed: False
-        SC shield enabled: False
-        POR State: ANY
-        LCD Mode: COMMON
-        Register Mode: RegComb
-        CaSense Mode: NEITHER
-        Treat as pin: True
-        Is OE Registered: False
-        Uses Analog: True
-        Can contain Digital: False
-        Is SIO: False
-        SIO Output Buf: NONREGULATED
-        SIO Input Buf: SINGLE_ENDED
-        SIO HiFreq: LOW
-        SIO Hyst: DISABLED
-        SIO Vtrip: MULTIPLIER_0_5
-        SIO RefSel: VCC_IO
-        Required Capabilitites: USB_D_MINUS
-        Initial Value: 0
-        IO Voltage: 0
-    PORT MAP (
-        pa_out => \USBFS:Dm(0)\__PA ,
-        analog_term => \USBFS:Net_597\ ,
-        pad => \USBFS:Dm(0)_PAD\ );
-    Properties:
-    {
-    }
-
-Fixed Function block hod @ [FFB(CAN,0)]: empty
-Fixed Function block hod @ [FFB(Cache,0)]: empty
-Fixed Function block hod @ [FFB(CapSense,0)]: empty
-Fixed Function block hod @ [FFB(Clock,0)]: 
-    Clock Block @ [FFB(Clock,0)]: 
-    clockblockcell: Name =ClockBlock
-        PORT MAP (
-            clk_bus_glb => ClockBlock_BUS_CLK ,
-            clk_bus => ClockBlock_BUS_CLK_local ,
-            clk_sync => ClockBlock_MASTER_CLK ,
-            clk_32k_xtal => ClockBlock_XTAL_32KHZ ,
-            xtal => ClockBlock_XTAL ,
-            ilo => ClockBlock_ILO ,
-            clk_100k => ClockBlock_100k ,
-            clk_1k => ClockBlock_1k ,
-            clk_32k => ClockBlock_32k ,
-            pllout => ClockBlock_PLL_OUT ,
-            imo => ClockBlock_IMO );
-        Properties:
-        {
-        }
-Fixed Function block hod @ [FFB(Comparator,0)]: empty
-Fixed Function block hod @ [FFB(DFB,0)]: empty
-Fixed Function block hod @ [FFB(DSM,0)]: empty
-Fixed Function block hod @ [FFB(Decimator,0)]: empty
-Fixed Function block hod @ [FFB(EMIF,0)]: empty
-Fixed Function block hod @ [FFB(I2C,0)]: empty
-Fixed Function block hod @ [FFB(LCD,0)]: empty
-Fixed Function block hod @ [FFB(LVD,0)]: empty
-Fixed Function block hod @ [FFB(PM,0)]: empty
-Fixed Function block hod @ [FFB(SPC,0)]: empty
-Fixed Function block hod @ [FFB(Timer,0)]: empty
-Fixed Function block hod @ [FFB(USB,0)]: 
-    USB Block @ [FFB(USB,0)]: 
-    usbcell: Name =\USBFS:USB\
-        PORT MAP (
-            dp => \USBFS:Net_1000\ ,
-            dm => \USBFS:Net_597\ ,
-            sof_int => Net_40 ,
-            arb_int => \USBFS:Net_79\ ,
-            usb_int => \USBFS:Net_81\ ,
-            ept_int_8 => \USBFS:ept_int_8\ ,
-            ept_int_7 => \USBFS:ept_int_7\ ,
-            ept_int_6 => \USBFS:ept_int_6\ ,
-            ept_int_5 => \USBFS:ept_int_5\ ,
-            ept_int_4 => \USBFS:ept_int_4\ ,
-            ept_int_3 => \USBFS:ept_int_3\ ,
-            ept_int_2 => \USBFS:ept_int_2\ ,
-            ept_int_1 => \USBFS:ept_int_1\ ,
-            ept_int_0 => \USBFS:ept_int_0\ ,
-            ord_int => \USBFS:Net_95\ ,
-            dma_req_7 => \USBFS:dma_req_7\ ,
-            dma_req_6 => \USBFS:dma_req_6\ ,
-            dma_req_5 => \USBFS:dma_req_5\ ,
-            dma_req_4 => \USBFS:dma_req_4\ ,
-            dma_req_3 => \USBFS:dma_req_3\ ,
-            dma_req_2 => \USBFS:dma_req_2\ ,
-            dma_req_1 => \USBFS:dma_req_1\ ,
-            dma_req_0 => \USBFS:dma_req_0\ ,
-            dma_termin => \USBFS:Net_824\ );
-        Properties:
-        {
-            cy_registers = ""
-        }
-Fixed Function block hod @ [FFB(VIDAC,0)]: empty
-Fixed Function block hod @ [FFB(CsAbuf,0)]: empty
-Fixed Function block hod @ [FFB(Vref,0)]: empty
-Fixed Function block hod @ [FFB(LPF,0)]: empty
-Fixed Function block hod @ [FFB(SAR,0)]: empty
-</CYPRESSTAG>
-<CYPRESSTAG name="Port Configuration Details">
-
-------------------------------------------------------------
-Port Configuration report
-------------------------------------------------------------
-     |     |       | Interrupt |                  |                 | 
-Port | Pin | Fixed |      Type |       Drive Mode |            Name | Connections
------+-----+-------+-----------+------------------+-----------------+-------------------------
-   0 |   0 |     * |      NONE |         CMOS_OUT |     SCSI_Out(9) | 
-     |   1 |     * |      NONE |         CMOS_OUT |     SCSI_Out(8) | 
-     |   2 |     * |      NONE |         CMOS_OUT |     SCSI_Out(7) | 
-     |   3 |     * |      NONE |         CMOS_OUT |     SCSI_Out(6) | 
-     |   4 |     * |      NONE |         CMOS_OUT |     SCSI_Out(5) | 
-     |   5 |     * |      NONE |         CMOS_OUT |     SCSI_Out(4) | 
-     |   6 |     * |      NONE |         CMOS_OUT |     SCSI_Out(3) | 
-     |   7 |     * |      NONE |         CMOS_OUT |     SCSI_Out(2) | 
------+-----+-------+-----------+------------------+-----------------+-------------------------
-   3 |   1 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(0) | 
-     |   2 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(1) | 
-     |   3 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(2) | 
-     |   4 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(3) | 
-     |   5 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(4) | 
------+-----+-------+-----------+------------------+-----------------+-------------------------
-   4 |   2 |     * |      NONE |         CMOS_OUT |     SCSI_Out(1) | 
-     |   3 |     * |      NONE |         CMOS_OUT |     SCSI_Out(0) | 
-     |   4 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(7) | 
-     |   5 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(6) | 
-     |   6 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(5) | 
-     |   7 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(4) | 
------+-----+-------+-----------+------------------+-----------------+-------------------------
-   6 |   0 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(3) | 
-     |   1 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(2) | 
-     |   2 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(1) | 
-     |   3 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(0) | 
------+-----+-------+-----------+------------------+-----------------+-------------------------
-  15 |   6 |     * |   FALLING |      HI_Z_ANALOG |   \USBFS:Dp(0)\ | Analog(\USBFS:Net_1000\)
-     |   7 |     * |      NONE |      HI_Z_ANALOG |   \USBFS:Dm(0)\ | Analog(\USBFS:Net_597\)
-----------------------------------------------------------------------------------------------
-</CYPRESSTAG>
-</CYPRESSTAG>
-</CYPRESSTAG>
-Digital component placer commit/Report: Elapsed time ==> 0s.359ms
-Digital Placement phase: Elapsed time ==> 7s.578ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Digital Routing">
-Routing successful.
-Digital Routing phase: Elapsed time ==> 9s.796ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Bitstream and API generation">
-Bitstream and API generation phase: Elapsed time ==> 25s.390ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Bitstream verification">
-Bitstream verification phase: Elapsed time ==> 0s.158ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Static timing analysis">
-Timing report is in USB_Bootloader_timing.html.
-Static timing analysis phase: Elapsed time ==> 4s.278ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Data reporting">
-Data reporting phase: Elapsed time ==> 0s.000ms
-</CYPRESSTAG>
-<CYPRESSTAG name="Database update...">
-Design database save phase: Elapsed time ==> 0s.656ms
-</CYPRESSTAG>
-cydsfit: Elapsed time ==> 50s.921ms
-</CYPRESSTAG>
-Fitter phase: Elapsed time ==> 50s.997ms
-API generation phase: Elapsed time ==> 24s.640ms
-Dependency generation phase: Elapsed time ==> 0s.859ms
-Cleanup phase: Elapsed time ==> 0s.844ms

lib/SCSI2SD/software/SCSI2SD/v3/USB_Bootloader.cydsn/USB_Bootloader_timing.html

@@ -1,642 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Static Timing Analysis Report</title>
-<style type="text/css">
-<!--
-body { 
-    font:normal normal 100%/1.0 verdana, times new roman, serif, sans-serif; 
-}
-
-table.sta_tsu > thead > tr > th.Delay,
-table.sta_tsu > tbody > tr > td.Delay,
-table.sta_tscs > thead > tr > th.Period,
-table.sta_tscs > tbody > tr > td.Period,
-table.sta_tscs > thead > tr > th.MaxFreq,
-table.sta_tscs > tbody > tr > td.MaxFreq,
-table.sta_tscs > thead > tr > th.Frequency,
-table.sta_tscs > tbody > tr > td.Frequency,
-table.sta_tco > thead > tr > th.Delay,
-table.sta_tco > tbody > tr > td.Delay,
-table.sta_tpd > thead > tr > th.Delay,
-table.sta_tpd > tbody > tr > td.Delay,
-table.sta_toe > thead > tr > th.Delay,
-table.sta_toe > tbody > tr > td.Delay,
-table.sta_tcoe > thead > tr > th.Delay,
-table.sta_tcoe > tbody > tr > td.Delay,
-table.sta_path > thead > tr > th.Delay,
-table.sta_path > tbody > tr > td.Delay,
-table.sta_path > thead > tr > th.Total,
-table.sta_path > tbody > tr > td.Total,
-table.sta_clocksummary > thead > tr > th.ActualFreq,
-table.sta_clocksummary > tbody > tr > td.ActualFreq,
-table.sta_clocksummary > thead > tr > th.MaxFreq,
-table.sta_clocksummary > tbody > tr > td.MaxFreq,
-table > tbody > tr > td.number
-{
-	text-align: right;
-}
-
-
-table.sta_tsu {
-   border: solid 2px;
-   border-collapse: collapse;
-   width: 90%;
-}
-
-table.sta_tpd {
-   border: solid 2px;
-   border-collapse: collapse;
-   width: 90%;
-}
-
-table.sta_tscs {
-   border: solid 2px;
-   border-collapse: collapse;
-   width: 90%;
-}
-
-table.sta_tco {
-   border: solid 2px;
-   border-collapse: collapse;
-   width: 90%;
-}
-
-table.sta_toe {
-   border: solid 2px;
-   border-collapse: collapse;
-   width: 90%;
-}
-
-table.sta_tcoe {
-   border: solid 2px;
-   border-collapse: collapse;
-   width: 90%;
-}
-
-th {
-   border: solid 1px;
-   vertical-align: top;
-   font-family: monospace;
-   text-align: center;
-   white-space: pre-line;
-}
-
-td {
-   border: solid 1px;
-   vertical-align: top;
-   font-family: monospace;
-   white-space: pre-line;
-}
-
-table.sta_tpd > tbody > tr:hover,
-table.sta_tsu > tbody > tr:hover,
-table.sta_tscs > tbody > tr:hover,
-table.sta_tco > tbody > tr:hover,
-table.sta_toe > tbody > tr:hover,
-table.sta_tcoe > tbody > tr:hover
-{
-   background-color: #e8e8ff;
-}
-
-table.sta_path > tbody > tr:hover {
-   background-color: #e8e8ff;
-}
-
-table.sta_path {
-   background-color: #f8f8f8;
-   border: none;
-   border-collapse: collapse;
-   width: 90%;
-   margin-left: 1em;
-   margin-right: 1em;
-}
-
-table.sta_clocksummary {
-   border: solid 2px;
-   border-collapse: collapse;
-}
-
-div.sta_sec {
-   padding: 0.5em;
-}
-
-div.sta_sec div.sta_sec {
-   margin-left: 0.75em;
-}
-
-.proptext {
-   font:normal normal 100%/1.0 verdana, times new roman, serif, sans-serif;
-   border: 0px;
-}
-
-.prop {
-   font: normal normal 100%/1.0 verdana, times new roman, serif, sans-serif;
-   font-weight: bolder;
-   border: 0px;
-}
-
-.sec_head {
-   display: block;
-   font-size: 1.17em;
-   font-weight: bolder;
-   margin: .83em 0;
-}
-
-div.sta_secbody {
-   margin-left: 0.75em;
-}
-
-div.vio_sta_secbody {
-   margin-left: 0.75em;
-}
-
-.sta_sec_desc {
-   margin-bottom: 0.5em;
-   white-space: pre-line;
-}
-
-.violation_color {
-   color: red;
-   border-color: black;
-}
-
--->
-</style>   
-<script type="text/javascript">
-<!--
-
-function HideElement(element)  {
-    var headerDiv = getChildElementsByTagName(element, "div")[0];
-    var expandLink = getChildElementsByTagName(headerDiv, "a")[0];
-    expandLink.onclick = clicked;
-    var children = element.childNodes;
-    var secBody = null;
-    for (var j = 0; j < children.length; j++)
-    {
-        if (children[j].nodeType == document.ELEMENT_NODE &&
-            (children[j].className == "sta_secbody" ||
-             children[j].className == "vio_sta_secbody" ||
-             children[j].className == "sta_sec" )) 
-        {
-            secBody = children[j];
-            secBody.style.display = "none";
-        }
-    }
-}
-
-function HideElements(elements)  {
-    for( var i=0; i<elements.length; i++)
-        HideElement(elements[i]);
-}
-
-
-// Description : returns boolean indicating whether the object has the class name
-//    built with the understanding that there may be multiple classes
-//
-// Arguments:
-//    objElement              - element to check for.
-//    strClass                - class name to be checked.
-//
-function HasClassName(objElement, strClass)
-{
-    if ( objElement.className )
-    {
-        // the classes are just a space separated list, so first get the list
-        var arrList = objElement.className.split(' ');
-
-        for ( var i = 0; i < arrList.length; i++ )
-        {
-            if ( arrList[i] == strClass )
-            {
-                return true;
-            }
-        }
-    }
-    return false;
-}
-
-function initialize() {
-    if (document.ELEMENT_NODE == null)
-    {
-        /* Workaround for old IE */
-        document.ELEMENT_NODE = 1;
-        document.ATTRIBUTE_NODE = 2;
-        document.TEXT_NODE = 3;
-        document.CDATA_SECTION_MODE = 4;
-        document.ENTITY_REFERENCE_MODE = 5;
-        document.ENTITY_NODE = 6;
-        document.PROCESSING_INSTRUCTION_NODE = 7;
-        document.COMMENT_NODE = 8;
-        document.DOCUMENT_NODE = 9;
-        document.DOCUMENT_TYPE_NODE = 10;
-        document.DOCUMENT_FRAGMENT_NODE = 11;
-        document.NOTATION_NODE = 12;
-    }
-    
-    HideElements(getElementsByClass(document, 'div', 'sta_sec'));
-    toggleExpandSection(document.getElementById('clock_summary'));
-    toggleExpandSection(document.getElementById('violations'));
-
-    var allTD = document.getElementsByTagName("td");
-    for( var i=0; i< allTD.length; i++)
-    {
-        if(allTD[i].className != "proptext" && allTD[i].innerHTML.match(/^\s*[-]?[0-9]+[\.]?[0-9]*$/))
-        {
-            allTD[i].align = "right";
-            //allTD[i].style.textAlign = "right";
-        }
-    }
-
-    var allTables = document.getElementsByTagName("table");
-    for (var i = 0; i < allTables.length; i++)
-    {
-        var table = allTables[i];
-        if (table.className == "sta_tsu" ||
-            table.className == "sta_tscs" ||
-            table.className == "sta_tco" ||
-            table.className == "sta_toe" ||
-            table.className == "sta_tcoe")
-        {
-            var tbodyList = getChildElementsByTagName(table, "tbody");
-            if (tbodyList.length != 0)
-            {
-                for (var row = tbodyList[0].firstChild; row != null; row = row.nextSibling)
-                {
-                    if (row.nodeName.toLowerCase() == "tr")
-                    {
-                        if (HasClassName(row,"sta_path"))
-                        {
-                            row.style.display = "none";
-                        }
-                        else
-                        {
-                            row.style.cursor = "pointer";
-                            row.onclick = rowClicked;
-                        }
-                    }
-                }
-            }
-        }
-        else if(table.className == "sta_tpd" )
-        {
-            var tbodyList = getChildElementsByTagName(table, "tbody");
-            if (tbodyList.length != 0)
-            {
-                for (var row = tbodyList[0].firstChild; row != null; row = row.nextSibling)
-                {
-                    if (row.nodeName.toLowerCase() == "tr")
-                    {
-                        if(HasClassName(row, "sta_tv"))
-                        {
-                            row.style.cursor = "pointer";
-                            row.onclick = violationClicked;
-                        }
-                    }
-                }
-            }
-        }
-    }
-}
-
-function clicked()
-{
-    var parent = findAncestorByClass(this, "sta_sec");
-    toggleExpandSection(parent);
-    return false;
-}
-
-function toggleExpandSection(section)
-{
-    if (section == null)
-        return false;
-
-    var children = section.childNodes;
-    for (var i = 0; i < children.length; i++)
-    {
-        if (children[i].nodeType == document.ELEMENT_NODE &&
-            (children[i].className == "sta_secbody" ||
-             children[i].className == "vio_sta_secbody"))
-            toggleVisible(children[i]);
-    }
-}
-
-function findAncestorByClass(node, className)
-{
-    var parent;
-    for (parent = node; parent != null; parent = parent.parentNode)
-    {
-        if (parent.nodeType == document.ELEMENT_NODE &&
-            parent.className == className)
-        {
-            return parent;
-        }
-    }
-
-    return null;
-}
-
-function rowClicked()
-{
-    for (var next = this.nextSibling; next != null; next = next.nextSibling)
-    {
-        if (next.nodeType == document.ELEMENT_NODE &&
-            next.nodeName.toLowerCase() == "tr" &&
-            HasClassName(next,"sta_path"))
-        {
-            if (next.style.display == "none")
-                next.style.display = "table-row";
-            else
-                next.style.display = "none";
-            break;
-        }
-    }
-    return false;
-}
-function findPos(obj)
-{
-    var curtop = 0;
-    if (obj.offsetParent)
-    {
-        do
-        {
-            curtop += obj.offsetTop;
-        } while (obj = obj.offsetParent);
-        return [curtop];
-    }
-}
-
-function jumpto(ClassName)
-{
-    var classname = 'sta_path';
-    classname += ' ';
-    classname += ClassName;
-    if((obj = getElementsByClass(document, 'tr', classname)) &&
-            obj.length > 0 ){
-        window.scrollTo(0, findPos(obj[0]));
-    }
-}
-
-function violationClicked()
-{
-    expandAllSections(0);
-    expandViolations(1);
-    var ident=this.id;
-    var rlist= document.getElementsByTagName( "tr");
-
-    var clickedElementClassNames = this.className.split(' ');
-
-    //The second class name is to match the violation element with the
-    //corresponding path element in the detailed section.
-    var identificationClassValue = clickedElementClassNames[1];
-
-    for(var i=0 ; i < rlist.length ; i++)
-    {
-        if( rlist[i].nodeType == document.ELEMENT_NODE && HasClassName(rlist[i],"sta_path") )
-        {
-            var staPathClassNames = rlist[i].className.split(' ');
-            // Assumption: There will be two class names, one indicating
-            // style (sta_path), other to identify elements tv1.
-
-            if(staPathClassNames.length > 1)
-            {
-                // Matching second class Names of both elements.
-                if(staPathClassNames[1] == identificationClassValue)
-                {
-
-                    var parent= findAncestorByClass ( rlist[i] , "sta_tscs" );
-                    if(parent == null)
-                        parent= findAncestorByClass ( rlist[i] , "sta_tco" );
-                    for( ; (parent!= null && parent.nodeName!="body") ; parent= parent.parentNode )
-                    {
-                        if( parent.nodeType == document.ELEMENT_NODE && parent.className == "sta_secbody")
-                        {
-                            //parent.style.display = "block";
-                            visible(parent);
-                            rlist[i].style.display = "table-row" ;
-                            //alert(rlist[i].id);
-                        }
-                    }
-                }
-            }
-        }
-    }
-    //document.getElementById(this.id).scrollIntoView(true);
-    // location = location + this.id;
-    jumpto(identificationClassValue);
-    return false;
-}
-
-
-function toggleVisible(elem)
-{
-    if (elem.style.display == "none")
-        elem.style.display = "block";
-    else
-        elem.style.display = "none";
-
-    headerDiv = getChildElementsByTagName(elem.parentNode, "div")[0];
-    link = getChildElementsByTagName(headerDiv, "a")[0];
-    innerSpan = getChildElementsByTagName(link, "span")[0];
-    textNode = getChildElementsByTagName(innerSpan, "span")[0].firstChild;
-    textNode.data = (elem.style.display == "none") ? "+" : "-";
-}
-
-function visible(elem)
-{
-    elem.style.display = "block";
-
-    headerDiv = getChildElementsByTagName(elem.parentNode, "div")[0];
-    link = getChildElementsByTagName(headerDiv, "a")[0];
-    innerSpan = getChildElementsByTagName(link, "span")[0];
-    textNode = getChildElementsByTagName(innerSpan, "span")[0].firstChild;
-    textNode.data = (elem.style.display == "none") ? "+" : "-";
-}
-
-function getChildElementsByTagName(node, name)
-{
-    var result = new Array(), i = 0;
-    name = name.toLowerCase();
-    for (var child = node.firstChild; child != null; child = child.nextSibling)
-    {
-        if (child.nodeType == document.ELEMENT_NODE &&
-            child.nodeName.toLowerCase() == name)
-        {
-            result[i++] = child;
-        }
-    }
-
-    return result;
-}
-
-function expandAllPaths(rootNode, show)
-{
-    var show = show ? "table-row" : "none";
-    var elements = getElementsByClass(rootNode, "tr", "sta_path");
-    for (var i = 0; i < elements.length; i++)
-    {
-        elements[i].style.display = show;
-    }
-}
-
-function expandAllSections(show)
-{
-    var show = show ? "block" : "none";
-    var elements = getElementsByClass(document, "div", "sta_secbody");
-    for (var i = 0; i < elements.length; i++)
-    {
-        if (elements[i].style.display != show)
-            toggleVisible(elements[i]);
-    }
-
-    var elements1 = getElementsByClass(document, "div", "vio_sta_secbody");
-    for (var i = 0; i < elements1.length; i++)
-    {
-        if (elements1[i].style.display != show)
-            toggleVisible(elements1[i]);
-    }
-}
-
-function expandViolations(show)
-{
-    var show = show ? "block" : "none";
-    var elements = getElementsByClass(document, "div", "vio_sta_secbody");
-    for (var i = 0; i < elements.length; i++)
-    {
-        if (elements[i].style.display != show)
-            toggleVisible(elements[i]);
-    }
-}
-
-function expandViolationSections(show)
-{
-    var show =show ? "block" :"none" ;
-}
-
-function getElementsByClass(rootNode, elemName, className)
-{
-    var result = new Array(), idx = 0;
-    var elements = rootNode.getElementsByTagName(elemName);
-    for (var i = 0; i < elements.length; i++)
-    {
-        if (elements[i].className == className)
-            result[idx++] = elements[i];
-    }
-    return result;
-}
-
-//-->
-</script>
-</head>
-
-<body onload="initialize();">
-<noscript>
-<p style="display: block; border: 1px solid; margin: 4em; padding: 1.5em">View this file with a JavaScript-enabled browser to enable all features.</p>
-</noscript>
-<h1> Static Timing Analysis </h1>
-<table class="property">
-<tr> <td class="prop"> Project :</td>
-<td class="proptext"> USB_Bootloader</td></tr>
-<tr> <td class="prop"> Build Time :</td>
-<td class="proptext"> 08/28/14 22:25:58</td></tr>
-<tr> <td class="prop"> Device :</td>
-<td class="proptext"> CY8C5267AXI-LP051</td></tr>
-<tr> <td class="prop"> Temperature :</td>
-<td class="proptext"> -40C - 85/125C</td></tr>
-<tr> <td class="prop"> Vdda :</td>
-<td class="proptext"> 5.00</td></tr>
-<tr> <td class="prop"> Vddd :</td>
-<td class="proptext"> 5.00</td></tr>
-<tr> <td class="prop"> Vio0 :</td>
-<td class="proptext"> 5.00</td></tr>
-<tr> <td class="prop"> Vio1 :</td>
-<td class="proptext"> 5.00</td></tr>
-<tr> <td class="prop"> Vio2 :</td>
-<td class="proptext"> 5.00</td></tr>
-<tr> <td class="prop"> Vio3 :</td>
-<td class="proptext"> 5.00</td></tr>
-<tr> <td class="prop"> Voltage :</td>
-<td class="proptext"> 5.0</td></tr>
-<tr> <td class="prop"> Vusb :</td>
-<td class="proptext"> 5.00</td></tr>
-</table>
-<div>
-<a href="#" onclick="expandAllSections(1);return false;">Expand All</a> |
-<a href="#" onclick="expandAllSections(0);return false;">Collapse All</a> |
-<a href="#" onclick="expandAllPaths(document, 1);return false;">Show All Paths</a> |
-<a href="#" onclick="expandAllPaths(document, 0);return false;">Hide All Paths</a>
-</div>
-<div class="sta_sec" id="violations">
-<div>
-<a href="#" style="text-decoration: none; color: inherit;">
-<span class="sec_head"><span style="font-family: monospace;">+</span>
-Timing Violation Section</span>
-</a>
-</div><div class="vio_sta_secbody"><div class="sta_sec_desc">No Timing Violations</div>
-</div>
-</div>
-<div class="sta_sec" id="clock_summary">
-<div>
-<a href="#" style="text-decoration: none; color: inherit;">
-<span class="sec_head"><span style="font-family: monospace;">+</span>
-Clock Summary Section</span>
-</a>
-</div><div class="sta_secbody"><table class="sta_clocksummary">
- <thead> 
-<tr> 
-<th>Clock</th>
-<th>Domain</th>
-<th>Nominal Frequency</th>
-<th>Required Frequency</th>
-<th>Maximum Frequency</th>
-<th>Violation</th>
-</tr>
-</thead> 
-<tbody>
-<tr> 
- <td class = "text_info">CyILO</td>
- <td class = "text_info">CyILO</td>
- <td class = "number">100.000&nbsp;kHz</td>
- <td class = "number">100.000&nbsp;kHz</td>
- <td class = "number"> N/A </td>
- <td class = "text_info"> </td>
-</tr>
-<tr> 
- <td class = "text_info">CyIMO</td>
- <td class = "text_info">CyIMO</td>
- <td class = "number">24.000&nbsp;MHz</td>
- <td class = "number">24.000&nbsp;MHz</td>
- <td class = "number"> N/A </td>
- <td class = "text_info"> </td>
-</tr>
-<tr> 
- <td class = "text_info">CyMASTER_CLK</td>
- <td class = "text_info">CyMASTER_CLK</td>
- <td class = "number">64.000&nbsp;MHz</td>
- <td class = "number">64.000&nbsp;MHz</td>
- <td class = "number"> N/A </td>
- <td class = "text_info"> </td>
-</tr>
-<tr> 
- <td class = "text_info">CyBUS_CLK</td>
- <td class = "text_info">CyMASTER_CLK</td>
- <td class = "number">64.000&nbsp;MHz</td>
- <td class = "number">64.000&nbsp;MHz</td>
- <td class = "number"> N/A </td>
- <td class = "text_info"> </td>
-</tr>
-<tr> 
- <td class = "text_info">CyPLL_OUT</td>
- <td class = "text_info">CyPLL_OUT</td>
- <td class = "number">64.000&nbsp;MHz</td>
- <td class = "number">64.000&nbsp;MHz</td>
- <td class = "number"> N/A </td>
- <td class = "text_info"> </td>
-</tr>
-</tbody>
- </table> 
-</div>
-</div>
-</body>
-</html>

lib/SCSI2SD/software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoCCreatorExportIDE.xml

@@ -18,7 +18,7 @@
       <Tool Name="postbuild" Command="" Options="" />
     </Toolchain>
   </Toolchains>
-  <Project Name="SCSI2SD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" Version="4.0" Type="Bootloadable">
+  <Project Name="SCSI2SD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" Version="4.0" Type="Bootloadable">
     <CMSIS_SVD_File>SCSI2SD.svd</CMSIS_SVD_File>
     <Datasheet />
     <LinkerFiles>
@@ -27,8 +27,8 @@
       <LinkerFile Toolchain="IAR EWARM">.\Generated_Source\PSoC5\Cm3Iar.icf</LinkerFile>
     </LinkerFiles>
     <Folders>
-      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\src">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
+      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\src">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="">..\..\src\main.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\diagnostic.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\disk.c</File>
@@ -41,6 +41,7 @@
           <File BuildType="BUILD" Toolchain="">..\..\src\sd.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\config.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\led.c</File>
+          <File BuildType="BUILD" Toolchain="">..\..\src\time.c</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\diagnostic.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\disk.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\geometry.h</File>
@@ -53,15 +54,16 @@
           <File BuildType="BUILD" Toolchain="">..\..\src\bits.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\sd.h</File>
           <File BuildType="BUILD" Toolchain="">..\..\src\config.h</File>
+          <File BuildType="BUILD" Toolchain="">..\..\src\time.h</File>
         </Files>
       </Folder>
-      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
+      <Folder BuildType="BUILD" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="">.\device.h</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn\Generated_Source\PSoC5">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn\Generated_Source\PSoC5">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cyfitter_cfg.h</File>
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cyfitter_cfg.c</File>
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\cybootloader.c</File>
@@ -206,41 +208,41 @@
           <File BuildType="BUILD" Toolchain="">.\Generated_Source\PSoC5\libelf.dll</File>
         </Files>
       </Folder>
-      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn\Generated_Source\PSoC5\ARM_GCC">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
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+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="ARM GCC">.\Generated_Source\PSoC5\ARM_GCC\CyComponentLibrary.a</File>
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-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn\Generated_Source\PSoC5\ARM_Keil_MDK">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="ARM Keil MDK">.\Generated_Source\PSoC5\ARM_Keil_MDK\CyComponentLibrary.a</File>
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-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
+      <Folder BuildType="STRICT" Path="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn\Generated_Source\PSoC5\IAR">
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn">
           <File BuildType="BUILD" Toolchain="IAR">.\Generated_Source\PSoC5\IAR\CyComponentLibrary.a</File>
         </Files>
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\codegentemp">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
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       <Folder BuildType="EXCLUDE" Path=".\ARM_GCC_441">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
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       <Folder BuildType="EXCLUDE" Path=".\ARM_GCC_473">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\DP8051_Keil_951">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
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       <Folder BuildType="EXCLUDE" Path=".\DP8051">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
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       <Folder BuildType="EXCLUDE" Path=".\CortexM0">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
       </Folder>
       <Folder BuildType="EXCLUDE" Path=".\CortexM3">
-        <Files Root="Z:\projects\SCSI2SD\git-parity\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
+        <Files Root="Z:\projects\SCSI2SD\git-timeout\SCSI2SD\software\SCSI2SD\v4\SCSI2SD.cydsn" />
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     </Folders>
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lib/SCSI2SD/software/SCSI2SD/v4/SCSI2SD.cydsn/SCSI2SD.cyprj

@@ -102,6 +102,13 @@
 <build_action v="C_FILE" />
 <PropertyDeltas />
 </CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="time.c" persistent="..\..\src\time.c">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="C_FILE" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
 </dependencies>
 </CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
 </CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
@@ -210,6 +217,13 @@
 <build_action v="NONE" />
 <PropertyDeltas />
 </CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFile" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItem" version="2" name="time.h" persistent="..\..\src\time.h">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="NONE" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
 </dependencies>
 </CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
 </CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>